Data Sheet 29317.14D 2559 PROTECTED QUAD POWER DRIVER UDx2559B OUT4 1 16 IN 4 K 2 15 IN3 OUT3 3 14 ENABLE GROUND 4 13 GROUND GROUND 5 12 GROUND OUT2 6 11 V CC K 7 10 IN 2 OUT1 8 9 IN 1 Dwg. PP-017-1 ABSOLUTE MAXIMUM RATINGS at TA = 25C Output Voltage, VOUT . . . . . . . . . 60 V Over-Current Protected Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . 25 V Output Current, IOUT . . . . . . . . . 1.0 A* Supply Voltage, VCC . . . . . . . . . . 7.0 V Input Voltage, VIN or VEN . . . . . . 7.0 V Package Power Dissipation, PD . . . . . . . . . . . . . . . . See Graph Operating Temperature Range, TA Prefix `UDK' . . . . -40C to +125C Prefix `UDN' . . . . . -20C to +85C Prefix `UDQ' . . . . . -40C to +85C Storage Temperature Range, TS . . . . . . . . . . . . -55C to +150C *Outputs are peak current limited at approximately 1.0 A per driver. See Circuit Description and Application for further information. Providing improved output current limiting, the UDK, UDN, and UDQ2559B, EB, and LB quad power drivers combine AND logic gates and high-current bipolar outputs with complete output protection. Each of the four outputs will sink 700 mA in the on state. The outputs have a minimum breakdown voltage (load dump) of 60 V and a sustaining voltage of 40 V. The inputs are compatible with TTL and 5 V CMOS logic systems. Over-current protection for each channel has been designed into these devices and is activated at approximately 1 A. It protects each output from short circuits with supply voltages up to 25 V. When an output current trip point is reached, that output stage is driven linearly resulting in a reduced output current level. If an over-current or shortcircuit condition continues, the thermal-limiting circuits will first sense the rise in junction temperature and then the rise in chip temperature, further decreasing the output current. Under worst-case conditions, these devices will tolerate short circuits on all outputs, simultaneously. These devices can be used to drive various loads including incandescent lamps (without warming or limiting resistors) or inductive loads such as relays, solenoids, or dc stepping motors. The packages offer fused leads for enhanced thermal dissipation. Package B is a 16-pin power DIP with exposed tabs, EB is a 28-lead power PLCC, and LB is a 16-lead power wide-body SOIC for surfacemount applications. The lead (Pb) free versions have 100% matte tin leadframe plating. FEATURES 700 mA Output Current per Channel Independent Over-Current Protection for Each Driver Thermal Protection for Device and Each Driver Low Output-Saturation Voltage Integral Output Flyback Diodes TTL and 5 V CMOS Compatible Inputs 2559 PROTECTED QUAD POWER DRIVER Selection Guide Part Number Pb-free Package Ambient Temperature (C) UDN2559B UDN2559B-T UDN2559EB UDN2559EB-T UDN2559LB UDN2559LB-T - Yes - Yes Yes Yes 16-pin DIP, exposed tabs 16-pin DIP, exposed tabs 28-lead PLCC 16-pin DIP, exposed tabs 16-lead SOIC 16-lead SOIC UDQ2559B UDQ2559B-T UDQ2559LB UDQ2559LB-T - Yes - Yes 16-pin DIP, exposed tabs 16-pin DIP, exposed tabs 16-lead SOIC 16-lead SOIC UDK2559B UDK2559B-T UDK2559EB UDK2559EB-T UDK2559LB UDK2559LB-T - Yes - Yes - Yes 16-pin DIP, exposed tabs 16-pin DIP, exposed tabs 28-lead PLCC 28-lead PLCC 16-lead SOIC 16-pin DIP, exposed tabs -20 to 85 -40 to 85 -40 to 125 UDx2559LB OUT 4 1 16 IN 4 K 2 15 IN 3 OUT 3 3 14 ENABLE GROUND 4 13 GROUND GROUND 5 12 GROUND OUT 2 6 11 V CC K 7 10 IN 2 OUT 1 8 9 IN 1 Dwg. PP-017-6 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 11 2559 PROTECTED QUAD POWER DRIVER FUNCTIONAL BLOCK DIAGRAM (1 of 4 Channels) K V CC OUTN ENABLE IN N THERMAL LIMIT <<1 Dwg. FP-041 IN 2 ENABLE 27 26 NC 25 6 24 7 23 8 22 9 21 10 20 11 19 17 18 IN 3 SUPPLY 15 NO CONNECTION 16 14 OUT 4 IN 4 13 K GROUND GROUND VCC NC 12 GROUND 5 OUT 3 GROUND ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS IN 1 28 OUT1 2 NO CONNECTION K 3 1 OUT2 4 UDx2559EB 5 R JT = 6C/W 4 SUFFIX 'EB', R JA = 36C/W 3 SUFFIX 'B', R JA = 43C/W 2 1 SUFFIX 'LB', R JA = 90C/W 0 25 50 75 100 TEMPERATURE IN C 125 150 Dwg. GP-004-2B Dwg. PP-019-1 PD = (VOUT1 x IOUT1 x dc) + ... + (VOUTn x IOUTn x dc) + (VCC x ICC) = (TJ - TA)/RJA 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1995, 2002 Allegro MicroSystems, Inc. 2559 PROTECTED QUAD POWER DRIVER ELECTRICAL CHARACTERISTICS at TA = +25C (prefix `UDN') or over operating temperature range (prefix `UDK' or `UDQ'), VCC = 4.75 V to 5.25 V Limits Characteristic Output Leakage Current Symbol ICEX Test Conditions Min. Typ. Max. Units VOUT = 50 V, VIN = 0.8 V, VEN = 2.0 V -- <1.0 100 A VOUT = 50 V, VIN = 2.0 V, VEN = 0.8 V -- <1.0 100 A Output Sustaining Voltage VOUT(SUS) IOUT = 100 mA, VIN = VEN = 0.8 V 40 -- -- V Output Saturation Voltage VOUT(SAT) All Devices, IOUT = 100 mA -- -- 300 mV All Devices, IOUT = 400 mA -- -- 500 mV `B' & `EB' Packages Only, IOUT = 600 mA -- -- 700 mV -- 1.0 -- A Over-Current Trip Input Voltage Input Current Total Supply Current Clamp Diode Forward Voltage Clamp Diode Leakage Current Turn-On Delay Thermal Limit ITRIP Logic 1 VIN(1) or VEN(1) 2.0 -- -- V Logic 0 VIN(0) or VEN(0) -- -- 0.8 V Logic 1 VIN(1) or VEN(1) = 2.0 V -- -- 40 A Logic 0 VIN(0) or VEN(0) = 0.8 V -- -- -10 A All Outputs ON, VIN* = VEN = 2.0 V -- -- 80 mA All Outputs OFF -- -- 5.0 mA IF = 1.0 A -- -- 1.7 V IF = 1.5 A -- -- 2.1 V VR = 50 V, D1 + D2 or D3 + D4 -- -- 50 A tPHL IOUT = 500 mA -- -- 20 s tPLH IOUT = 500 mA -- -- 20 s -- 165 -- C ICC VF IR TJ Typical Data is for design information only. Negative current is defined as coming out of (sourcing) the specified terminal. As used here, -100 is defined as greater than +10 (absolute magnitude convention) and the minimum is implicitly zero. * All inputs simultaneously, all other tests are performed with each input tested separately. www.allegromicro.com 2559 PROTECTED QUAD POWER DRIVER TYPICAL OUTPUT CHARACTERISTIC OUTPUT VOLTAGE, V OUT J INCANDESCENT LAMP DRIVER High incandescent lamp turn-ON/in-rush currents can contribute to poor lamp reliability and destroy semiconductor lamp drivers. Warming or current-limiting resistors protect both driver and lamp but use significant power either when the lamp is OFF or when the lamp is ON, respectively. Lamps with steady-state current ratings up to 700 mA can be driven by these devices without the need for warming (parallel) or current-limiting (series) resistors. NOT TO SCALE TJ < 150C T CIRCUIT DESCRIPTION AND APPLICATION = 165C JUNCTION TEMP. LIMIT THERMAL GRADIENT SENSING I TRIP V OUT(SAT) OUTPUT CURRENT, I When an incandescent lamp is initially turned ON, the cold filament is at minimum resistance and would normally allow a 10x to 12x in-rush current. With these drivers, during turn-ON, the high in-rush current is sensed by the internal low-value sense resistor. Drive current to the output stage is then diverted by the shunting transistor, and the load current is momentarily limited to approximately 1.0 A. During this short transition period, the output current is reduced to a value dependent on supply voltage and filament resistance. During lamp warmup, the filament resistance increases to its maximum value, the output stage goes into saturation and applies maximum rated voltage to the lamp. OUT Dwg. GP-013 TYPICAL OUTPUT BEHAVIOR NORMAL LAMP IN-RUSH CURRENT INDUCTIVE LOAD DRIVER Bifilar (unipolar) stepper motors, relays, or solenoids can be driven directly. The internal flyback diodes prevent damage to the output transistors by suppressing the high-voltage spikes that occur when turning OFF an inductive load. For rapid current decay (fast turn-OFF speeds), the use of Zener diodes will raise the flyback voltage and inprove performance. However, the peak voltage must not exceed the specified minimum sustaining voltage (VSUPPLY + VZ + VF VOUT(SUS)). LAMP CURRENT NOT TO SCALE FAULT CONDITIONS In the event of a shorted load, the load current will attempt to increase. As described above, the drive current to the affected output stage is reduced, causing the output stage to go linear, limiting the peak output current to approximately 1 A. As the power dissipation of that output stage increases, a thermal gradient sensing circuit will become operational, further decreasing the drive current to the affected output stage and reducing the output current to a value dependent on supply voltage and load resistance. THERMAL GRADIENT SENSING CURRENT LIMIT ITRIP 0 TIME Dwg. WP-008 Continuous or multiple overload conditions causing the chip temperature to reach approximately 165C will result in an additional reduction in output current to maintain a safe level. If the fault condition is corrected, the output stage will return to its normal saturated condition. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 2559 PROTECTED QUAD POWER DRIVER B Package, 16-pin DIP with internally fused pins 4, 5, 12, and 13 and external thermal tabs Preliminary dimensions, for reference only Dimensions in inches Metric dimensions (mm) in brackets, for reference only (reference JEDEC MS-001 BB) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area .775 19.69 .735 18.67 A .014 0.36 .008 0.20 B 16 .280 7.11 .240 6.10 .430 10.92 MAX .300 .7.62 A 1 2 .195 4.95 .115 2.92 .015 0.38 MIN .005 0.13 MIN .070 1.78 .045 1.14 .100 .2.54 16X .022 .056 .014 .036 .010 [0.25] M C .150 3.81 .115 2.92 .210 5.33 MAX SEATING PLANE C 2559 PROTECTED QUAD POWER DRIVER EB Package, 28-pin PLCC with internally fused pins 5 through 11 and 19 through 25 .495 12.57 .485 12.32 .456 11.58 2X .450 11.43 .007 [0.18] H B A A .007 [0.18] H B A .002 [0.05] B .456 11.58 2X .450 11.43 B 2 .007 [0.18] H B 1 .020 0.51 28 .002 [0.05] B .219 5.56 .191 4.85 A .219 5.56 .191 4.85 .495 12.57 .485 12.32 .007 [0.18] H B A .020 0.51 MIN .120 3.05 .090 2.29 28X .180 4.57 .165 4.19 .032 0.81 .026 0.66 H .007 [0.18] C B A 28X SEATING PLANE .004 [0.10] C 28X .021 0.53 .013 0.33 .050 1.27 .007 [0.18] C B A .219 5.56 .191 4.85 Preliminary dimensions, for reference only (reference JEDEC MS-018 AB) Dimensions in inches Millimeters (mm) in brackets, for reference only Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area www.allegromicro.com .219 5.56 .191 4.85 C 2559 PROTECTED QUAD POWER DRIVER LB Package, 16-pin SOIC with internally fused pins 4 and 5, and 12 and 13 10.63 .419 9.97 .393 0.25 [.010] M B M 10.50 .614 10.10 .598 16 8 0 A B 0.33 .013 0.20 .008 7.60 .299 7.40 .291 A 1 1.27 .050 0.40 .016 2 0.25 .010 16X SEATING PLANE 0.10 [.004] C 16X 0.51 .020 0.31 .012 0.25 [.010] M C A B C SEATING PLANE GAUGE PLANE 2.65 .104 2.35 .093 1.27 .050 0.30 .012 0.10 .004 Preliminary dimensions, for reference only Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only (reference JEDEC MS-013 AA) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 2559 PROTECTED QUAD POWER DRIVER The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000