MX29GA129E C/F MX29GA257E C/F MX29GA129/257E C/F DATASHEET P/N:PM1503 REV. 1.0, NOV. 27, 2009 1 MX29GA129E C/F MX29GA257E C/F SINGLE VOLTAGE 3V ONLY FLASH MEMORY FEATURES GENERAL FEATURES * Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations * Word mode switchable - 16,777,216 x 16 - 8,388,608 x 16 * 64KW uniform sector architecture - MX29GA257E C/F: 256 equal sectors - MX29GA129E C/F: 128 equal sectors * 8-word page read buffer * 32-word write buffer * Latch-up protected to 100mA from -1V to 1.5xVcc * Low Vcc write inhibit : Vcc VLKO * Compatible with JEDEC standard - Pinout and software compatible to single power supply Flash * Deep power down mode PERFORMANCE * High Performance - MX29GA257E C/F: 90ns (Vcc=3.0~3.6V), 100ns (Vcc=2.7~3.6V) - MX29GA129E C/F: 90ns (Vcc=2.7~3.6V) - Page access time: 25ns - Fast program time: 11us/word - Fast erase time: 0.6s/sector * Low Power Consumption - Low active read current: 30mA (typical) at 5MHz - Low standby current: 30uA (typical) * Typical 100,000 erase/program cycle * 20 years data retention SOFTWARE FEATURES * Program/Erase Suspend & Program/Erase Resume - Suspends sector erase operation to read data from or program data to another sector which is not being erased - Suspends sector program operation to read data from another sector which is not being program * Status Reply - Data# Polling & Toggle bits provide detection of program and erase operation completion * Support Common Flash Interface (CFI) HARDWARE FEATURES * Ready/Busy# (RY/BY#) Output - Provides a hardware method of detecting program and erase operation completion * Hardware Reset (RESET#) Input - Provides a hardware method to reset the internal state machine to read mode * WP#/ACC input pin - Hardware write protect pin/Provides accelerated program capability SECURITY * Extra 128-word sector for security - Features factory locked and identifiable, and customer lockable * Advanced write protection function (Solid and Password Protect) - Provides sector protect/unprotect function to disable or enable program or erase operation in the sector P/N:PM1503 REV. 1.0, NOV. 27, 2009 2 MX29GA129E C/F MX29GA257E C/F * Advanced read protection function (Password protection & Crypto engine) - Provides read lock feature to protect sectors against the unauthorized reading of memory Please contact Macronix sales for specific information regarding this advanced sector write and read protection feature. PACKAGE * 64-Ball FBGA (10mm x 13mm) * All Pb-free devices are RoHS Compliant PIN CONFIGURATION 64 FBGA 1 2 3 4 5 6 7 8 A A0 A5 A7 WP#/ ACC A12 VCC A17 A21 B A1 GND A8 CE# A13 NC A18 NC C A2 A6 A9 A11 A14 NC A19 A20 D A3 A4 A10 RESET# NC NC A15 A16 E Q8 Q1 Q9 Q3 Q4 NC Q15 RY/ BY# F NC Q0 Q10 Q11 Q12 NC NC OE# G A22 NC Q2 VCC Q5 Q6 Q14 WE# H NC NC VCC GND Q13 GND Q7 A23* Notes: 1. A23 is NC for MX29GA129E P/N:PM1503 REV. 1.0, NOV. 27, 2009 3 MX29GA129E C/F MX29GA257E C/F PIN DESCRIPTION SYMBOL LOGIC SYMBOL PIN NAME A0~A23 Address Input/LSB addr Q0~Q15 Data Inputs/Outputs 24 A0-A23 CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input CE# Hardware Reset Pin, Active Low OE# Hardware Write Protect/Programming Acceleration input Read/Busy Output WE# VCC +3.0V single power supply WP#/ACC GND Device Ground VCC RESET# WP#/ACC RY/BY# NC RESET# 16 Q0-Q15 RY/BY# Pin Not Connected Internally P/N:PM1503 REV. 1.0, NOV. 27, 2009 4 MX29GA129E C/F MX29GA257E C/F BLOCK DIAGRAM CE# OE# WE# RESET# WP#/ACC CONTROL INPUT LOGIC PROGRAM/ERASE STATE HIGH VOLTAGE MACHINE (WSM) LATCH BUFFER Y-DECODER AND STATE X-DECODER ADDRESS A0-AM WRITE FLASH REGISTER ARRAY ARRAY Y-PASS GATE SOURCE HV COMMAND DATA DECODER SENSE AMPLIFIER PGM DATA HV COMMAND DATA LATCH PROGRAM DATA LATCH Q0-Q15 I/O BUFFER AM: MSB address P/N:PM1503 REV. 1.0, NOV. 27, 2009 5 MX29GA129E C/F MX29GA257E C/F BLOCK DIAGRAM DESCRIPTION The block diagram on Page 5 illustrates a simplified architecture of MX29GA256E C/F. Each block in the block diagram represents one or more circuit modules in the real chip used to access, erase, program, and read the memory array. The "CONTROL INPUT LOGIC" block receives input pins CE#, OE#, WE#, RESET#, and WP#/ACC. It creates internal timing control signals according to the input pins and outputs to the "ADDRESS LATCH AND BUFFER" to latch the external address pins A0-AM(A23). The internal addresses are output from this block to the main array and decoders composed of "X-DECODER", "Y-DECODER", "Y-PASS GATE", AND "FLASH ARRAY". The X-DECODER decodes the word-lines of the flash array, while the Y-DECODER decodes the bit-lines of the flash array. The bit lines are electrically connected to the "SENSE AMPLIFIER" and "PGM DATA HV" selectively through the Y-PASS GATES. SENSE AMPLIFIERS are used to read out the contents of the flash memory, while the "PGM DATA HV" block is used to selectively deliver high power to bit-lines during programming. The "I/O BUFFER" controls the input and output on the Q0-Q15 pads. During read operation, the I/O BUFFER receives data from SENSE AMPLIFIERS and drives the output pads accordingly. In the last cycle of program command, the I/O BUFFER transmits the data on Q0-Q15 to "PROGRAM DATA LATCH", which controls the high power drivers in "PGM DATA HV" to selectively program the bits in a word according to the user input pattern. The "PROGRAM/ERASE HIGH VOLTAGE" block comprises the circuits to generate and deliver the necessary high voltage to the X-DECODER, FLASH ARRAY, and "PGM DATA HV" blocks. The logic control module comprises of the "WRITE STATE MACHINE, WSM", "STATE REGISTER", "COMMAND DATA DECODER", and "COMMAND DATA LATCH". When the user issues a command by toggling WE#, the command on Q0-A15 is latched in the COMMAND DATA LATCH and is decoded by the COMMAND DATA DECODER. The STATE REGISTER receives the command and records the current state of the device. The WSM implements the internal algorithms for program or erase according to the current command state by controlling each block in the block diagram. ARRAY ARCHITECTURE The main flash memory array can be organized as Word mode (x16). The details of the address ranges and the corresponding sector addresses are shown in Table 1. P/N:PM1503 REV. 1.0, NOV. 27, 2009 6 MX29GA129E C/F MX29GA257E C/F BLOCK STRUCTURE Table 1-1: MX29GA129E C/F SECTOR ARCHITECTURE Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A22-A16 0000000 0000001 0000010 0000011 0000100 0000101 0000110 0000111 0001000 0001001 0001010 0001011 0001100 0001101 0001110 0001111 0010000 0010001 0010010 0010011 0010100 0010101 0010110 0010111 0011000 0011001 0011010 0011011 0011100 0011101 0011110 0011111 0100000 0100001 0100010 0100011 0100100 0100101 0100110 0100111 0101000 0101001 Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 P/N:PM1503 (x16) Address Range 000000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh 200000h-20FFFFh 210000h-21FFFFh 220000h-22FFFFh 230000h-23FFFFh 240000h-24FFFFh 250000h-25FFFFh 260000h-26FFFFh 270000h-27FFFFh 280000h-28FFFFh 290000h-29FFFFh REV. 1.0, NOV. 27, 2009 7 MX29GA129E C/F MX29GA257E C/F Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A22-A16 0101010 0101011 0101100 0101101 0101110 0101111 0110000 0110001 0110010 0110011 0110100 0110101 0110110 0110111 0111000 0111001 0111010 0111011 0111100 0111101 0111110 0111111 1000000 1000001 1000010 1000011 1000100 1000101 1000110 1000111 1001000 1001001 1001010 1001011 1001100 1001101 1001110 1001111 1010000 1010001 1010010 1010011 1010100 Sector SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 SA83 SA84 P/N:PM1503 (x16) Address Range 2A0000h-2AFFFFh 2B0000h-2BFFFFh 2C0000h-2CFFFFh 2D0000h-2DFFFFh 2E0000h-2EFFFFh 2F0000h-2FFFFFh 300000h-30FFFFh 310000h-31FFFFh 320000h-32FFFFh 330000h-33FFFFh 340000h-34FFFFh 350000h-35FFFFh 360000h-36FFFFh 370000h-37FFFFh 380000h-38FFFFh 390000h-39FFFFh 3A0000h-3AFFFFh 3B0000h-3BFFFFh 3C0000h-3CFFFFh 3D0000h-3DFFFFh 3E0000h-3EFFFFh 3F0000h-3FFFFFh 400000h-40FFFFh 410000h-41FFFFh 420000h-42FFFFh 430000h-43FFFFh 440000h-44FFFFh 450000h-45FFFFh 460000h-46FFFFh 470000h-47FFFFh 480000h-48FFFFh 490000h-49FFFFh 4A0000h-4AFFFFh 4B0000h-4BFFFFh 4C0000h-4CFFFFh 4D0000h-4DFFFFh 4E0000h-4EFFFFh 4F0000h-4FFFFFh 500000h-50FFFFh 510000h-51FFFFh 520000h-52FFFFh 530000h-53FFFFh 540000h-54FFFFh REV. 1.0, NOV. 27, 2009 8 MX29GA129E C/F MX29GA257E C/F Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A22-A16 1010101 1010110 1010111 1011000 1011001 1011010 1011011 1011100 1011101 1011110 1011111 1100000 1100001 1100010 1100011 1100100 1100101 1100110 1100111 1101000 1101001 1101010 1101011 1101100 1101101 1101110 1101111 1110000 1110001 1110010 1110011 1110100 1110101 1110110 1110111 1111000 1111001 1111010 1111011 1111100 1111101 1111110 1111111 Sector SA85 SA86 SA87 SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 SA126 SA127 P/N:PM1503 (x16) Address Range 550000h-55FFFFh 560000h-56FFFFh 570000h-57FFFFh 580000h-58FFFFh 590000h-59FFFFh 5A0000h-5AFFFFh 5B0000h-5BFFFFh 5C0000h-5CFFFFh 5D0000h-5DFFFFh 5E0000h-5EFFFFh 5F0000h-5FFFFFh 600000h-60FFFFh 610000h-61FFFFh 620000h-62FFFFh 630000h-63FFFFh 640000h-64FFFFh 650000h-65FFFFh 660000h-66FFFFh 670000h-67FFFFh 680000h-68FFFFh 690000h-69FFFFh 6A0000h-6AFFFFh 6B0000h-6BFFFFh 6C0000h-6CFFFFh 6D0000h-6DFFFFh 6E0000h-6EFFFFh 6F0000h-6FFFFFh 700000h-70FFFFh 710000h-71FFFFh 720000h-72FFFFh 730000h-73FFFFh 740000h-74FFFFh 750000h-75FFFFh 760000h-76FFFFh 770000h-77FFFFh 780000h-78FFFFh 790000h-79FFFFh 7A0000h-7AFFFFh 7B0000h-7BFFFFh 7C0000h-7CFFFFh 7D0000h-7DFFFFh 7E0000h-7EFFFFh 7F0000h-7FFFFFh REV. 1.0, NOV. 27, 2009 9 MX29GA129E C/F MX29GA257E C/F Table 1-2: MX29GA257E C/F SECTOR ARCHITECTURE Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A23-A16 00000000 00000001 00000010 00000011 00000100 00000101 00000110 00000111 00001000 00001001 00001010 00001011 00001100 00001101 00001110 00001111 00010000 00010001 00010010 00010011 00010100 00010101 00010110 00010111 00011000 00011001 00011010 00011011 00011100 00011101 00011110 00011111 00100000 00100001 00100010 00100011 00100100 00100101 00100110 00100111 Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 P/N:PM1503 (x16) Address Range 000000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh 200000h-20FFFFh 210000h-21FFFFh 220000h-22FFFFh 230000h-23FFFFh 240000h-24FFFFh 250000h-25FFFFh 260000h-26FFFFh 270000h-27FFFFh REV. 1.0, NOV. 27, 2009 10 MX29GA129E C/F MX29GA257E C/F Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A23-A16 00101000 00101001 00101010 00101011 00101100 00101101 00101110 00101111 00110000 00110001 00110010 00110011 00110100 00110101 00110110 00110111 00111000 00111001 00111010 00111011 00111100 00111101 00111110 00111111 01000000 01000001 01000010 01000011 01000100 01000101 01000110 01000111 01001000 01001001 01001010 01001011 01001100 01001101 01001110 01001111 01010000 01010001 01010010 Sector SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 SA78 SA79 SA80 SA81 SA82 P/N:PM1503 (x16) Address Range 280000h-28FFFFh 290000h-29FFFFh 2A0000h-2AFFFFh 2B0000h-2BFFFFh 2C0000h-2CFFFFh 2D0000h-2DFFFFh 2E0000h-2EFFFFh 2F0000h-2FFFFFh 300000h-30FFFFh 310000h-31FFFFh 320000h-32FFFFh 330000h-33FFFFh 340000h-34FFFFh 350000h-35FFFFh 360000h-36FFFFh 370000h-37FFFFh 380000h-38FFFFh 390000h-39FFFFh 3A0000h-3AFFFFh 3B0000h-3BFFFFh 3C0000h-3CFFFFh 3D0000h-3DFFFFh 3E0000h-3EFFFFh 3F0000h-3FFFFFh 400000h-40FFFFh 410000h-41FFFFh 420000h-42FFFFh 430000h-43FFFFh 440000h-44FFFFh 450000h-45FFFFh 460000h-46FFFFh 470000h-47FFFFh 480000h-48FFFFh 490000h-49FFFFh 4A0000h-4AFFFFh 4B0000h-4BFFFFh 4C0000h-4CFFFFh 4D0000h-4DFFFFh 4E0000h-4EFFFFh 4F0000h-4FFFFFh 500000h-50FFFFh 510000h-51FFFFh 520000h-52FFFFh REV. 1.0, NOV. 27, 2009 11 MX29GA129E C/F MX29GA257E C/F Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A23-A16 01010011 01010100 01010101 01010110 01010111 01011000 01011001 01011010 01011011 01011100 01011101 01011110 01011111 01100000 01100001 01100010 01100011 01100100 01100101 01100110 01100111 01101000 01101001 01101010 01101011 01101100 01101101 01101110 01101111 01110000 01110001 01110010 01110011 01110100 01110101 01110110 01110111 01111000 01111001 01111010 01111011 01111100 01111101 Sector SA83 SA84 SA85 SA86 SA87 SA88 SA89 SA90 SA91 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 SA103 SA104 SA105 SA106 SA107 SA108 SA109 SA110 SA111 SA112 SA113 SA114 SA115 SA116 SA117 SA118 SA119 SA120 SA121 SA122 SA123 SA124 SA125 P/N:PM1503 (x16) Address Range 530000h-53FFFFh 540000h-54FFFFh 550000h-55FFFFh 560000h-56FFFFh 570000h-57FFFFh 580000h-58FFFFh 590000h-59FFFFh 5A0000h-5AFFFFh 5B0000h-5BFFFFh 5C0000h-5CFFFFh 5D0000h-5DFFFFh 5E0000h-5EFFFFh 5F0000h-5FFFFFh 600000h-60FFFFh 610000h-61FFFFh 620000h-62FFFFh 630000h-63FFFFh 640000h-64FFFFh 650000h-65FFFFh 660000h-66FFFFh 670000h-67FFFFh 680000h-68FFFFh 690000h-69FFFFh 6A0000h-6AFFFFh 6B0000h-6BFFFFh 6C0000h-6CFFFFh 6D0000h-6DFFFFh 6E0000h-6EFFFFh 6F0000h-6FFFFFh 700000h-70FFFFh 710000h-71FFFFh 720000h-72FFFFh 730000h-73FFFFh 740000h-74FFFFh 750000h-75FFFFh 760000h-76FFFFh 770000h-77FFFFh 780000h-78FFFFh 790000h-79FFFFh 7A0000h-7AFFFFh 7B0000h-7BFFFFh 7C0000h-7CFFFFh 7D0000h-7DFFFFh REV. 1.0, NOV. 27, 2009 12 MX29GA129E C/F MX29GA257E C/F Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A23-A16 01111110 01111111 10000000 10000001 10000010 10000011 10000100 10000101 10000110 10000111 10001000 10001001 10001010 10001011 10001100 10001101 10001110 10001111 10010000 10010001 10010010 10010011 10010100 10010101 10010110 10010111 10011000 10011001 10011010 10011011 10011100 10011101 10011110 10011111 10100000 10100001 10100010 10100011 10100100 10100101 10100110 10100111 10101000 Sector SA126 SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 SA135 SA136 SA137 SA138 SA139 SA140 SA141 SA142 SA143 SA144 SA145 SA146 SA147 SA148 SA149 SA150 SA151 SA152 SA153 SA154 SA155 SA156 SA157 SA158 SA159 SA160 SA161 SA162 SA163 SA164 SA165 SA166 SA167 SA168 P/N:PM1503 (x16) Address Range 7E0000h-7EFFFFh 7F0000h-7FFFFFh 800000h-80FFFFh 810000h-81FFFFh 820000h-82FFFFh 830000h-83FFFFh 840000h-84FFFFh 850000h-85FFFFh 860000h-86FFFFh 870000h-87FFFFh 880000h-88FFFFh 890000h-89FFFFh 8A0000h-8AFFFFh 8B0000h-8BFFFFh 8C0000h-8CFFFFh 8D0000h-8DFFFFh 8E0000h-8EFFFFh 8F0000h-8FFFFFh 900000h-90FFFFh 910000h-91FFFFh 920000h-92FFFFh 930000h-93FFFFh 940000h-94FFFFh 950000h-95FFFFh 960000h-96FFFFh 970000h-97FFFFh 980000h-98FFFFh 990000h-99FFFFh 9A0000h-9AFFFFh 9B0000h-9BFFFFh 9C0000h-9CFFFFh 9D0000h-9DFFFFh 9E0000h-9EFFFFh 9F0000h-9FFFFFh A00000h-A0FFFFh A10000h-A1FFFFh A20000h-A2FFFFh A30000h-A3FFFFh A40000h-A4FFFFh A50000h-A5FFFFh A60000h-A6FFFFh A70000h-A7FFFFh A80000h-A8FFFFh REV. 1.0, NOV. 27, 2009 13 MX29GA129E C/F MX29GA257E C/F Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A23-A16 10101001 10101010 10101011 10101100 10101101 10101110 10101111 10110000 10110001 10110010 10110011 10110100 10110101 10110110 10110111 10111000 10111001 10111010 10111011 10111100 10111101 10111110 10111111 11000000 11000001 11000010 11000011 11000100 11000101 11000110 11000111 11001000 11001001 11001010 11001011 11001100 11001101 11001110 11001111 11010000 11010001 11010010 11010011 Sector SA169 SA170 SA171 SA172 SA173 SA174 SA175 SA176 SA177 SA178 SA179 SA180 SA181 SA182 SA183 SA184 SA185 SA186 SA187 SA188 SA189 SA190 SA191 SA192 SA193 SA194 SA195 SA196 SA197 SA198 SA199 SA200 SA201 SA202 SA203 SA204 SA205 SA206 SA207 SA208 SA209 SA210 SA211 P/N:PM1503 (x16) Address Range A90000h-A9FFFFh AA0000h-AAFFFFh AB0000h-ABFFFFh AC0000h-ACFFFFh AD0000h-ADFFFFh AE0000h-AEFFFFh AF0000h-AFFFFFh B00000h-B0FFFFh B10000h-B1FFFFh B20000h-B2FFFFh B30000h-B3FFFFh B40000h-B4FFFFh B50000h-B5FFFFh B60000h-B6FFFFh B70000h-B7FFFFh B80000h-B8FFFFh B90000h-B9FFFFh BA0000h-BAFFFFh BB0000h-BBFFFFh BC0000h-BCFFFFh BD0000h-BDFFFFh BE0000h-BEFFFFh BF0000h-BFFFFFh C00000h-C0FFFFh C10000h-C1FFFFh C20000h-C2FFFFh C30000h-C3FFFFh C40000h-C4FFFFh C50000h-C5FFFFh C60000h-C6FFFFh C70000h-C7FFFFh C80000h-C8FFFFh C90000h-C9FFFFh CA0000h-CAFFFFh CB0000h-CBFFFFh CC0000h-CCFFFFh CD0000h-CDFFFFh CE0000h-CEFFFFh CF0000h-CFFFFFh D00000h-D0FFFFh D10000h-D1FFFFh D20000h-D2FFFFh D30000h-D3FFFFh REV. 1.0, NOV. 27, 2009 14 MX29GA129E C/F MX29GA257E C/F Sector Size Kwords 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Sector Address A23-A16 11010100 11010101 11010110 11010111 11011000 11011001 11011010 11011011 11011100 11011101 11011110 11011111 11100000 11100001 11100010 11100011 11100100 11100101 11100110 11100111 11101000 11101001 11101010 11101011 11101100 11101101 11101110 11101111 11110000 11110001 11110010 11110011 11110100 11110101 11110110 11110111 11111000 11111001 11111010 11111011 11111100 11111101 11111110 11111111 Sector SA212 SA213 SA214 SA215 SA216 SA217 SA218 SA219 SA220 SA221 SA222 SA223 SA224 SA225 SA226 SA227 SA228 SA229 SA230 SA231 SA232 SA233 SA234 SA235 SA236 SA237 SA238 SA239 SA240 SA241 SA242 SA243 SA244 SA245 SA246 SA247 SA248 SA249 SA250 SA251 SA252 SA253 SA254 SA255 P/N:PM1503 (x16) Address Range D40000h-D4FFFFh D50000h-D5FFFFh D60000h-D6FFFFh D70000h-D7FFFFh D80000h-D8FFFFh D90000h-D9FFFFh DA0000h-DAFFFFh DB0000h-DBFFFFh DC0000h-DCFFFFh DD0000h-DDFFFFh DE0000h-DEFFFFh DF0000h-DFFFFFh E00000h-E0FFFFh E10000h-E1FFFFh E20000h-E2FFFFh E30000h-E3FFFFh E40000h-E4FFFFh E50000h-E5FFFFh E60000h-E6FFFFh E70000h-E7FFFFh E80000h-E8FFFFh E90000h-E9FFFFh EA0000h-EAFFFFh EB0000h-EBFFFFh EC0000h-ECFFFFh ED0000h-EDFFFFh EE0000h-EEFFFFh EF0000h-EFFFFFh F00000h-F0FFFFh F10000h-F1FFFFh F20000h-F2FFFFh F30000h-F3FFFFh F40000h-F4FFFFh F50000h-F5FFFFh F60000h-F6FFFFh F70000h-F7FFFFh F80000h-F8FFFFh F90000h-F9FFFFh FA0000h-FAFFFFh FB0000h-FBFFFFh FC0000h-FCFFFFh FD0000h-FDFFFFh FE0000h-FEFFFFh FF0000h-FFFFFFh REV. 1.0, NOV. 27, 2009 15 MX29GA129E C/F MX29GA257E C/F BUS OPERATION Table 2-1. BUS OPERATION Mode Select Device Reset Standby Mode RESET# CE# WE# OE# Address (Note4) L X X X X Data I/O Q0~Q15 HighZ X X X HighZ H Vcc 0.3V Vcc 0.3V WP#/ ACC L/H Output Disable H L H H X HighZ L/H Read Mode H L H L AIN DOUT L/H Write H L L H AIN DIN Note1,2 Accelerate Program H L L H AIN DIN Vhv Notes: 1. The first or last sector was protected if WP#/ACC=Vil. 2. When WP#/ACC = Vih, the protection conditions of the outmost sector depends on previous protection conditions. Refer to the advaned protect feature. 3. Q0~Q15 are input (DIN) or output (DOUT) pins according to the requests of command sequence, sector protection, or data polling algorithm. 4. In Word Mode, the addresses are AM to A0, AM: MSB of address. P/N:PM1503 REV. 1.0, NOV. 27, 2009 16 MX29GA129E C/F MX29GA257E C/F Table 2-2. BUS OPERATION Item AM A11 to to CE# WE# OE# A12 A10 Control Input A9 A8 to A7 A6 A5 to A4 A3 to A2 A1 A0 Q0 ~ Q7 Q8 ~ Q15 Sector Lock Status Verification L H L SA X Vhv X L X L H L 01h or 00h (Note 1) X Read Silicon ID Manufacturer Code L H L X X Vhv X L X L L L C2H X Read Silicon ID -- MX29GA129E C/F Cycle 1 L H L X X Vhv X L X L L H 7EH 22H Cycle 2 L H L X X Vhv X L X H H L 37H 22H Cycle 3 L H L X X Vhv X L X H H H 01H 22H Read Silicon ID -- MX29GA257E C/F Cycle 1 L H L X X Vhv X L X L L H 7EH 22H Cycle 2 L H L X X Vhv X L X H H L 38H 22H Cycle 3 L H L X X Vhv X L X H H H 01H 22H Notes: 1. Sector unprotected code:00h. Sector protected code:01h. 2. Factory locked code: WP# protects high address sector: 99h. WP# protects low address sector: 89h Factory unlocked code: WP# protects high address sector: 19h. WP# protects low address sector: 09h 3. AM: MSB of address. P/N:PM1503 REV. 1.0, NOV. 27, 2009 17 MX29GA129E C/F MX29GA257E C/F FUNCTIONAL OPERATION DESCRIPTION READ OPERATION To perform a read operation, the system addresses the desired memory array or status register location by providing its address on the address pins and simultaneously enabling the chip by driving CE# & OE# LOW, and WE# HIGH. After the Tce and Toe timing requirements have been met, the system can read the contents of the addressed location by reading the Data (I/O) pins. If either the CE# or OE# is held HIGH, the outputs will remain tri-stated and no data will appear on the output pins. PAGE READ This device is able to conduct MXIC MaskROM compatible high performance page read. Page size is 8 words. The higher address Amax ~ A3 select the certain page, A2~A0 select the particular word in a page. The page access time is Taa or Tce, following by Tpa for the rest of the page read time. When CE# toggles, access time is Taa or Tce. Page mode can be turned on by keeping "page-read address" constant and changing the "intra-read page" addresses. WRITE OPERATION To perform a write operation, the system provides the desired address on the address pins, enables the chip by asserting CE# LOW, and disables the Data (I/O) pins by holding OE# HIGH. The system then places data to be written on the Data (I/O) pins and pulses WE# LOW. The device captures the address information on the falling edge of WE# and the data on the rising edge of WE#. To see an example, please refer to the timing diagram in Figure 1 on Page 53. The system is not allowed to write invalid commands (commands not defined in this datasheet) to the device. Writing an invalid command may put the device in an undefined state. DEVICE RESET Driving the RESET# pin LOW for a period of Trp or more will return the device to Read mode. If the device is in the middle of a program or erase operation, the reset operation will take at most a period of Tready1 before the device returns to Read mode. Until the device does returns to Read mode, the RY/BY# pin will remain Low (Busy Status). When the RESET# pin is held at GND0.3V, the device only consumes standby (Isbr) current. However, the device draws larger current if the RESET# pin is held at a voltage greater than GND+0.3V and less than or equal to Vil. It is recommended to tie the system reset signal to the RESET# pin of the flash memory. This allows the device to be reset with the system and puts it in a state where the system can immediately begin reading boot code from it. STANDBY MODE The device enters Standby mode whenever the RESET# and CE# pins are both held High except in the embedded mode. While in this mode, WE# and OE# will be ignored, all Data Output pins will be in a high impedance state, and the device will draw minimal (Isb) current. P/N:PM1503 REV. 1.0, NOV. 27, 2009 18 MX29GA129E C/F MX29GA257E C/F FUNCTIONAL OPERATION DESCRIPTION (cont'd) OUTPUT DISABLE While in active mode (RESET# HIGH and CE# LOW), the OE# pin controls the state of the output pins. If OE# is held HIGH, all Data (I/O) pins will remain tri-stated. If held LOW, the Word Data (I/O) pins will drive data. HARDWARE WRITE PROTECT By driving the WP#/ACC pin LOW. The highest or lowest was protected from all erase/program operations. If WP#/ACC is held HIGH (Vih to VCC), these sectors revert to their previously protected/unprotected status. ACCELERATED PROGRAMMING OPERATION By applying high voltage (Vhv) to the WP#/ACC pin, the device will enter the Accelerated Programming mode. This mode permits the system to skip the normal command unlock sequences and program word locations directly. During accelerated programming, the current drawn from the WP#/ACC pin is no more than ICP1. WRITE BUFFER PROGRAMMING OPERATION Programs 32words in a programming operation. To trigger the Write Buffer Programming, start by the first two unlock cycles, then third cycle writes the Write Buffer Load command at the destined programming Sector Address. The forth cycle writes the "word locations subtract one" number. Following above operations, system starts to write the mingling of address and data. After the programming of the first address or data, the "write-buffer-page" is selected. The following data should be within the above mentioned page. The "write-buffer-page" is selected by choosing address Amax-A5. "Write-Buffer-Page" address has to be the same for all address/ data write into the write buffer. If not, operation will ABORT. To program the content of the write buffer page this command must be followed by a write to buffer Program confirm command. The operation of write-buffer can be suspended or resumed by the standard commands, once the write buffer programming operation is finished, it'll return to normal READ mode. ABORT will be executed for the Write Buffer Programming Sequence if following condition occurs: * The value loaded is bigger than the page buffer size during "Number of Locations to Program" * Address written in a sector is not the same as the one assigned during the Write-Buffer-Load command. * Address/ Data pair written to a different write-buffer-page than the one assigned by the "Starting Address" during the "write buffer data loading" operation. * Writing not "Confirm Command" after the assigned number of "data load" cycles. P/N:PM1503 REV. 1.0, NOV. 27, 2009 19 MX29GA129E C/F MX29GA257E C/F FUNCTIONAL OPERATION DESCRIPTION (cont'd) WRITE BUFFER PROGRAMMING OPERATION (cont'd) The abort is triggered by Q1=1, Q7=DATA# (last address written), Q6=toggle, Q5=0. A Write-to-Buffer-Abort Reset command sequence has to be written to reset the device for the next operation. Write buffer programming can be conducted in any sequence. However the CFI functions, autoselect, Secured Silicon sector are not functional when program operation is in progress. Multiple write buffer programming operations on the same write buffer address range without intervening erases is available. Any bit in a write buffer address range can't be programmed from 0 back to 1. SECTOR PROTECT OPERATION The device provides user programmable protection against program/erase operations for selected sectors. Please refer to Table 1 which show all Sector assignments. During the protection operation, the sector address of any sector within a Sector may be used to specify the Sector being protected. AUTOMATIC SELECT BUS OPERATIONS The following five bus operations require A9 to be raised to Vhv. Please see AUTOMATIC SELECT COMMAND SEQUENCE in the COMMAND OPERATIONS section for details of equivalent command operations that do not require the use of Vhv. SECTOR LOCK STATUS VERIFICATION To determine the protected state of any sector using bus operations, the system performs a READ OPERATION with A9 raised to Vhv, the sector address applied to address pins A22 to A12, address pins A6, A3, A2 & A0 held LOW, and address pin A1 held HIGH. If data bit Q0 is LOW, the sector is not protected, and if Q0 is HIGH, the sector is protected. READ SILICON ID MANUFACTURER CODE To determine the Silicon ID Manufacturer Code, the system performs a READ OPERATION with A9 raised to Vhv and address pins A6, A3, A2, A1, & A0 held LOW. The Macronix ID code of C2h should be present on data bits Q0 to Q7. READ INDICATOR BIT (Q7) FOR SECURITY SECTOR To determine if the Security Sector has been locked at the factory, the system performs a READ OPERATION with A9 raised to Vhv, address pin A6, A3 & A2 held LOW, and address pins A1 & A0 held HIGH. If the Security Sector has been locked at the factory, the code 99h(H)/89h(L) will be present on data bits Q0 to Q7. Otherwise, the factory unlocked code of 19h(H)/09h(L) will be present. P/N:PM1503 REV. 1.0, NOV. 27, 2009 20 MX29GA129E C/F MX29GA257E C/F FUNCTIONAL OPERATION DESCRIPTION (cont'd) INHERENT DATA PROTECTION To avoid accidental erasure or programming of the device, the device is automatically reset to Read mode during power up. Additionally, the following design features protect the device from unintended data corruption. COMMAND COMPLETION Only after the successful completion of the specified command sets will the device begin its erase or program operation. The failure in observing valid command sets will result in the memory returning to read mode. LOW VCC WRITE INHIBIT The device refuses to accept any write command when Vcc is less than VLKO. This prevents data from spuriously being altered during power-up, power-down, or temporary power interruptions. The device automatically resets itself when Vcc is lower than VLKO and write cycles are ignored until Vcc is greater than VLKO. The system must provide proper signals on control pins after Vcc rises above VLKO to avoid unintentional program or erase operations. WRITE PULSE "GLITCH" PROTECTION CE#, WE#, OE# pulses shorter than 5ns are treated as glitches and will not be regarded as an effective write cycle. LOGICAL INHIBIT A valid write cycle requires both CE# and WE# at Vil with OE# at Vih. Write cycle is ignored when either CE# at Vih, WE# at Vih, or OE# at Vil. POWER-UP SEQUENCE Upon power up, the device is placed in Read mode. Furthermore, program or erase operation will begin only after successful completion of specified command sequences. POWER-UP WRITE INHIBIT When WE#, CE# is held at Vil and OE# is held at Vih during power up, the device ignores the first command on the rising edge of WE#. POWER SUPPLY DECOUPLING A 0.1uF capacitor should be connected between the Vcc and GND to reduce the noise effect. P/N:PM1503 REV. 1.0, NOV. 27, 2009 21 MX29GA129E C/F MX29GA257E C/F COMMAND OPERATIONS READING THE MEMORY ARRAY Read mode is the default state after power up or after a reset operation. To perform a read operation, please refer to READ OPERATION in the BUS OPERATIONS section above. If the device receives an Erase Suspend command while in the Sector Erase state, the erase operation will pause (after a time delay not exceeding 20us) and the device will enter Erase-Suspended Read mode. While in the Erase-Suspended Read mode, data can be programmed or read from any sector not being erased. Reading from addresses within sector(s) being erased will only return the contents of the status register, which is in fact how the current status of the device can be determined. If a program command is issued to any inactive (not currently being erased) sector during Erase-Suspended Read mode, the device will perform the program operation and automatically return to Erase-Suspended Read mode after the program operation completes successfully. While in Erase-Suspended Read mode, an Erase Resume command must be issued by the system to reactivate the erase operation. The erase operation will resume from where is was suspended and will continue until it completes successfully or another Erase Suspend command is received. After the memory device completes an embedded operation (automatic Chip Erase, Sector Erase, or Program) successfully, it will automatically return to Read mode and data can be read from any address in the array. If the embedded operation fails to complete, as indicated by status register bit Q5 (exceeds time limit flag) going HIGH during the operations, the system must perform a reset operation to return the device to Read mode. There are several states that require a reset operation to return to Read mode: 1. A program or erase failure--indicated by status register bit Q5 going HIGH during the operation. Failures during either of these states will prevent the device from automatically returning to Read mode. 2. The device is in Auto Select mode or CFI mode. These two states remain active until they are terminated by a reset operation. In the two situations above, if a reset operation (either hardware reset or software reset command) is not performed, the device will not return to Read mode and the system will not be able to read array data. AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY The device provides the user the ability to program the memory array in Word mode. As long as the users enters the correct cycle defined in the Table 3 (including 2 unlock cycles and the A0H program command), any word data provided on the data lines by the system will automatically be programmed into the array at the specified location. After the program command sequence has been executed, the internal write state machine (WSM) automatically executes the algorithms and timings necessary for programming and verification, which includes generating suitable program pulses, checking cell threshold voltage margins, and repeating the program pulse if any cells do not pass verification or have low margins. The internal controller protects cells that do pass verification and margin tests from being over-programmed by inhibiting further program pulses to these passing cells as weaker cells continue to be programmed. With the internal WSM automatically controlling the programming process, the user only needs to enter the program command and data once. P/N:PM1503 REV. 1.0, NOV. 27, 2009 22 MX29GA129E C/F MX29GA257E C/F COMMAND OPERATIONS (cont'd) AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY (cont'd) Programming will only change the bit status from "1" to "0". It is not possible to change the bit status from "0" to "1" by programming. This can only be done by an erase operation. Furthermore, the internal write verification only checks and detects errors in cases where a "1" is not successfully programmed to "0". Any commands written to the device during programming will be ignored except hardware reset or program suspend. Hard ware reset will terminate the program operation after a period of time no more than 10us. When the embedded program algorithm is complete or the program operation is terminated by a hardware reset, the device will return to Read mode. Program suspend ready, the device will enter program suspend read mode. After the embedded program operation has begun, the user can check for completion by reading the following bits in the status register: Status In progress Exceed time limit Q7*1 Q7# Q7# Q6*1 Toggling Toggling Q5 0 1 Q1 0 N/A RY/BY# (Note) 0 0 Note: RY/BY# is an open drain output pin and should be connected to VCC through a high value pull-up resistor. ERASING THE MEMORY ARRAY There are two types of erase operations performed on the memory array -- Sector Erase and Chip Erase. In the Sector Erase operation, one or more selected sectors may be erased simultaneously. In the Chip Erase operation, the complete memory array is erased except for any protected sectors. More details of the protected sectors are explained in section 5. SECTOR ERASE The sector erase operation is used to clear data within a sector by returning all of its memory locations to the "1" state. It requires six command cycles to initiate the erase operation. The first two cycles are "unlock cycles", the third is a configuration cycle, the fourth and fifth are also "unlock cycles", and the sixth cycle is the Sector Erase command. After the sector erase command sequence has been issued, an internal 50us time-out counter is started. Until this counter reaches zero, additional sector addresses and Sector Erase commands may be issued thus allowing multiple sectors to be selected and erased simultaneously. After the 50us time-out counter has expired, no new commands will be accepted and the embedded sector erase operation will begin. Note that the 50us timer-out counter is restarted after every erase command sequence. If the user enters any command other than Sector Erase or Erase Suspend during the time-out period, the erase operation will abort and the device will return to Read mode. After the embedded sector erase operation begins, all commands except Erase Suspend will be ignored. The only way to interrupt the operation is with an Erase Suspend command or with a hardware reset. The hardware reset will completely abort the operation and return the device to Read mode. P/N:PM1503 REV. 1.0, NOV. 27, 2009 23 MX29GA129E C/F MX29GA257E C/F COMMAND OPERATIONS (cont'd) SECTOR ERASE (cont'd) The system can determine the status of the embedded sector erase operation by the following methods: Status Time-out period In progress Exceeded time limit Q7 0 0 0 Q6 Toggling Toggling Toggling Q3*1 0 1 1 Q5 0 0 1 Q2 Toggling Toggling Toggling RY/BY#*2 0 0 0 Note: 1. The Q3 status bit is the 50us time-out indicator. When Q3=0, the 50us time-out counter has not yet reached zero and a new Sector Erase command may be issued to specify the address of another sector to be erased. When Q3=1, the 50us time-out counter has expired and the Sector Erase operation has already begun. Erase Suspend is the only valid command that may be issued once the embedded erase operation is underway. 2. RY/BY# is open drain output pin and should be connected to VCC through a high value pull-up resistor. 3. When an attempt is made to erase only protected sector(s), the erase operation will abort thus preventing any data changes in the protected sector(s). Q7 will output "0" and Q6 will toggle briefly (100us or less) before aborting and returning the device to Read mode. If unprotected sectors are also specified, however, they will be erased normally and the protected sector(s) will remain unchanged. 4. Q2 is a localized indicator showing a specified sector is undergoing erase operation or not. Q2 toggles when user reads at addresses where the sectors are actively being erased (in erase mode) or to be erased (in erase suspend mode). CHIP ERASE The Chip Erase operation is used erase all the data within the memory array. All memory cells containing a "0" will be returned to the erased state of "1". This operation requires 6 write cycles to initiate the action. The first two cycles are "unlock" cycles, the third is a configuration cycle, the fourth and fifth are also "unlock" cycles, and the sixth cycle initiates the chip erase operation. During the chip erase operation, no other software commands will be accepted, but if a hardware reset is received or the working voltage is too low, that chip erase will be terminated. After Chip Erase, the chip will automatically return to Read mode. The system can determine the status of the embedded chip erase operation by the following methods: Status In progress Exceed time limit Q7 0 0 Q6 Toggling Toggling Q5 0 1 Q2 Toggling Toggling RY/BY#*1 0 0 *1: RY/BY# is open drain output pin and should be connected to VCC through a high value pull-up resistor. P/N:PM1503 REV. 1.0, NOV. 27, 2009 24 MX29GA129E C/F MX29GA257E C/F COMMAND OPERATIONS (cont'd) ERASE SUSPEND/RESUME After beginning a sector erase operation, Erase Suspend is the only valid command that may be issued. If system issues an Erase Suspend command during the 50us time-out period following a Sector Erase command, the time-out period will terminate immediately and the device will enter Erase-Suspended Read mode. If the system issues an Erase Suspend command after the sector erase operation has already begun, the device will not enter Erase-Suspended Read mode until 20us time has elapsed. The system can determine if the device has entered the Erase-Suspended Read mode through Q6, Q7, and RY/BY#. After the device has entered Erase-Suspended Read mode, the system can read or program any sector(s) except those being erased by the suspended erase operation. Reading any sector being erased or programmed will return the contents of the status register. Whenever a suspend command is issued, user must issue a resume command and check Q6 toggle bit status, before issue another erase command. The system can use the status register bits shown in the following table to determine the current state of the device: Status Erase suspend read in erase suspended sector Erase suspend read in non-erase suspended sector Q7 Q6 Q5 Q3 Q2 Q1 RY/BY# 1 No toggle 0 N/A toggle N/A 1 Data Data 1 N/A N/A 0 Data Erase suspend program in non-erase suspended sector Q7# Data Toggle Data Data 0 N/A When the device has suspended erasing, user can execute the command sets except sector erase and chip erase, such as read silicon ID, sector protect verify, program, CFI query and erase resume. SECTOR ERASE RESUME The sector Erase Resume command is valid only when the device is in Erase-Suspended Read mode. After erase resumes, the user can issue another Ease Suspend command, but there should be a 400us interval between Ease Resume and the next Erase Suspend command. P/N:PM1503 REV. 1.0, NOV. 27, 2009 25 MX29GA129E C/F MX29GA257E C/F COMMAND OPERATIONS (cont'd) PROGRAM SUSPEND/RESUME After beginning a program operation, Program Suspend is the only valid command that may be issued. The system can determine if the device has entered the Program-Suspended Read mode through Q6, and RY/BY#. After the device has entered Program-Suspended mode, the system can read any sector(s) except those being programd by the suspended program operation. Reading the sector being program suspended is invalid. Whenever a suspend command is issued, user must issue a resume command and check Q6 toggle bit status, before issue another program command. The system can use the status register bits shown in the following table to determine the current state of the device: Status Q7 Q6 Q5 Program suspend read in program suspended sector Q3 Q2 Q1 Invalid Program suspend read in non-program suspended Data sector Data Data RY/BY# 1 Data Data Data 1 When the device has Program/Erase suspended, user can execute read array, auto-select, read CFI, read security silicon. PROGRAM RESUME The Program Resume command is valid only when the device is in Program-Suspended mode. After program resumes, the user can issue another Program Suspend command, but there should be a 5us interval between Program Resume and the next Program Suspend command. BUFFER WRITE ABORT Q1 is the indicator of Buffer Write Abort. When Q1=1, the device will abort from buffer write and go back to read status register shown as following table: Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY# Buffer Write Busy Q7# Toggle 0 N/A N/A 0 0 Buffer Write Abort Q7# Toggle 0 N/A N/A 1 0 Buffer Write Exceeded Time Limit Q7# Toggle 1 N/A N/A 0 0 P/N:PM1503 REV. 1.0, NOV. 27, 2009 26 MX29GA129E C/F MX29GA257E C/F COMMAND OPERATIONS (cont'd) AUTOMATIC SELECT OPERATIONS When the device is in Read mode, Program Suspend Read mode, Erase-Suspended Read mode, or CFI mode, the user can issue the Automatic Select command shown in Table 3 (two unlock cycles followed by the Automatic Select command 90h) to enter Automatic Select mode. After entering Automatic Select mode, the user can query the Manufacturer ID, Device ID, Security Sector locked status, or Sector protected status multiple times without issuing a new Automatic Select command. While In Automatic Select mode, issuing a Reset command (F0h) will return the device to Read mode (or EaseSuspended Read mode if Erase-Suspend was active or Program Suspend Read mode if Program Suspend was active). Another way to enter Automatic Select mode is to use one of the bus operations shown in Table 2. BUS OPERATION_2. After the high voltage (Vhv) is removed from the A9 pin, the device will automatically return to Read mode or Erase-Suspended Read mode. AUTOMATIC SELECT COMMAND SEQUENCE Automatic Select mode is used to access the manufacturer ID, device ID and to verify whether or not secured silicon is locked and whether or not a sector is protected. The automatic select mode has four command cycles. The first two are unlock cycles, and followed by a specific command. The fourth cycle is a normal read cycle, and user can read at any address any number of times without entering another command sequence. The Reset command is necessary to exit the Automatic Select mode and back to read array. The following table shows the identification code with corresponding address. MX29GA129E Address X00 X01/0E/0F Data (Hex) Representation C2 227E/2237/2201 MX29GA257E X01/0E/0F 227E/2238/2201 Manufacturer ID Device ID Secured Silicon Sector Protect Verify X03 (Sector address) X 02 99/19 (H) 89/09 (L) 00/01 Factory locked/unlocked Unprotected/protected After entering automatic select mode, no other commands are allowed except the reset command. P/N:PM1503 REV. 1.0, NOV. 27, 2009 27 MX29GA129E C/F MX29GA257E C/F COMMAND OPERATIONS (cont'd) READ MANUFACTURER ID OR DEVICE ID The Manufacturer ID (identification) is a unique hexadecimal number assigned to each manufacturer by the JEDEC committee. Each company has its own manufacturer ID, which is different from the ID of all other companies. The number assigned to Macronix is C2h. After entering Automatic Select mode, performing a read operation with A1 & A0 held LOW will cause the device to output the Manufacturer ID on the Data I/O (Q7 to Q0) pins. RESET In the following situations, executing reset command will reset device back to Read mode: * * * * Among erase command sequence (before the full command set is completed) Sector erase time-out period Erase fail (while Q5 is high) Among program command sequence (before the full command set is completed, erase-suspended program included) * Program fail (while Q5 is high, and erase-suspended program fail is included) * Auto-Select mode * CFI mode While device is at the status of program fail or erase fail (Q5 is high), user must issue reset command to reset device back to read array mode. While the device is in Auto-Select mode or CFI mode, user must issue reset command to reset device back to read array mode. When the device is in the progress of programming (not program fail) or erasing (not erase fail), device will ignore reset command. P/N:PM1503 REV. 1.0, NOV. 27, 2009 28 MX29GA129E C/F MX29GA257E C/F SECURITY SECTOR FLASH MEMORY REGION The Security Sector region is an extra OTP memory space of 128 words in length. The security sector can be locked upon shipping from factory, or it can be locked by customer after shipping. Customer can issue Security Sector Factory Protect Verify and/or Security Sector Protect Verify to query the lock status of the device. In factory-locked device, security sector region is protected when shipped from factory and the security silicon sector indicator bit is set to "1". In customer lockable device, security sector region is unprotected when shipped from factory and the security silicon indicator bit is set to "0". Factory Locked: Security Sector Programmed and Protected at the Factory In a factory locked device, the Security Sector is permanently locked before shipping from the factory. The device will have a 8-word ESN in the security region. The ESN occupies addresses 00000h to 00007h. Secured Silicon Sector Address Range Standard Factory Locked 000000h-000007h ESN 000008h-00007Fh Unavailable Express Flash Factory Locked ESN or Determined by Customer Determined by Customer Customer Lockable Determined by Customer Customer Lockable: Security Sector NOT Programmed or Protected at the Factory When the security feature is not required, the security region can act as an extra memory space. Security silicon sector can also be protected by two methods. Note that once the security silicon sector is protected, there is no way to unprotect the security silicon sector and the content of it can no longer be altered. After the security silicon is locked and verified, system must write Exit Security Sector Region, go through a power cycle, or issue a hardware reset to return the device to read normal array mode. P/N:PM1503 REV. 1.0, NOV. 27, 2009 29 MX29GA129E C/F MX29GA257E C/F TABLE 3. COMMAND DEFINITIONS Read Mode Silicon ID Addr Addr XXX 555 Data Addr Data Addr Data Data F0 AA 2AA 55 555 90 AA 2AA 55 555 90 AA 2AA 55 555 90 Addr X00 X01 X03 Data C2h ID1 99/19(H) 89/09(L) Command 1st Bus Cycle 2nd Bus Cycle 3rd Bus Cycle 4th Bus Cycle 5th Bus Cycle 6th Bus Cycle Addr Data Addr Data Command 1st Bus Cycle 2nd Bus Cycle 3rd Bus Cycle 4th Bus Cycle 5th Bus Cycle 6th Bus Cycle Automatic Select Factory Device ID Protect Verify 555 555 Reset Mode Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Sector Protect Verify 555 AA 2AA 55 555 90 (Sector) X02 Security Sector Region Exit Security Sector Program 555 555 555 AA 2AA 55 555 88 AA 2AA 55 555 90 AA 2AA 55 555 A0 XXX Addr 00 Data 00/01 X0E ID2 X0F ID3 Write to Buffer Program 555 AA 2AA 55 SA 25 SA N-1 WA WD WBL WD Write to Buffer Program Abort Reset 555 AA 2AA 55 555 F0 Write to Buffer Program confirm SA 29 Chip Erase Sector Erase 555 AA 2AA 55 555 80 555 AA 2AA 55 555 10 555 AA 2AA 55 555 80 555 AA 2AA 55 Sector 30 CFI Read 55 98 Program/ Program/ Erase Erase Suspend Resume XXX B0 XXX 30 Deep Power Down Enter Exit 555 AA 2AA 55 XXX B9 XXX AB WA= Write Address WD= Write Data SA= Sector Address N= Word Count WBL= Write Buffer Location ID1/ID2/ID3: Refer to Table 2-2 for detail ID of each device. Notes: * It is not recommended to adopt any other code not in the command definition table which will potentially enter the hidden mode. P/N:PM1503 REV. 1.0, NOV. 27, 2009 30 MX29GA129E C/F MX29GA257E C/F COMMON FLASH MEMORY INTERFACE (CFI) MODE QUERY COMMAND AND COMMAND FLASH MEMORY INTERFACE (CFI) MODE The device features CFI mode. Host system can retrieve the operating characteristics, structure and vendorspecified information such as identifying information, memory size, word configuration, operating voltages and timing information of this device by CFI mode. If the system writes the CFI Query command "98h", to address "55h"/"AAh" (depending on word mode), the device will enter the CFI Query Mode, any time the device is ready to read array data. The system can read CFI information at the addresses given in Table 4. Once user enters CFI query mode, user can issue reset command to exit CFI mode and return to read array mode. The unused CFI area is reserved by Macronix. Table 4-1. CFI mode: Identification Data Values (All values in these tables are in hexadecimal) Description Query-unique ASCII string "QRY" Primary vendor command set and control interface ID code Address for primary algorithm extended query table Alternate vendor command set and control interface ID code Address for alternate algorithm extended query table Address (h) (Word Mode) 10 11 12 13 14 15 16 17 18 19 1A Data (h) 0051 0052 0059 0002 0000 0040 0000 0000 0000 0000 0000 Table 4-2. CFI mode: System Interface Data Values Address (h) (Word Mode) 1B 1C 1D 1E 1F Description Vcc supply minimum program/erase voltage Vcc supply maximum program/erase voltage VPP supply minimum program/erase voltage VPP supply maximum program/erase voltage Typical timeout per single word write, 2n us Data (h) 0027 0036 0000 0000 0003 Typical timeout for maximum-size buffer write, 2n us (00h, not support) Typical timeout per individual block erase, 2n ms Typical timeout for full chip erase, 2n ms (00h, not support) Maximum timeout for word write, 2n times typical Maximum timeout for buffer write, 2n times typical Maximum timeout per individual block erase, 2n times typical 20 21 22 23 24 25 0006 0009 0013 0003 0005 0003 Maximum timeout for chip erase, 2n times typical (00h, not support) 26 0002 P/N:PM1503 REV. 1.0, NOV. 27, 2009 31 MX29GA129E C/F MX29GA257E C/F Table 4-3. CFI mode: Device Geometry Data Values Description Device size = 2n in number of bytes (19=256Mb, 18=128Mb) Flash device interface description (refer to CFI publication 100) Maximum number of bytes in buffer write = 2n (00h, not support) Number of erase regions within device (01h:uniform, 02h:boot) Index for Erase Bank Area 1: [2E,2D] = # of same-size sectors in region 1-1 [30, 2F] = sector size in multiples of 64KW 256Mb=00FF, 0000, 0000, 0002 128Mb=007F, 0000, 0000, 0002 Index for Erase Bank Area 2 Index for Erase Bank Area 3 Index for Erase Bank Area 4 P/N:PM1503 Address (h) (Word Mode) Data (h) 27 0019/ 0018 28 29 2A 2B 2C 2D 0002 0000 0006 0000 0001 00xx 2E 0000 2F 0000 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 0002 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 REV. 1.0, NOV. 27, 2009 32 MX29GA129E C/F MX29GA257E C/F Table 4-4. CFI mode: Primary Vendor-Specific Extended Query Data Values Description Query - Primary extended table, unique ASCII string, PRI Major version number, ASCII Minor version number, ASCII Unlock recognizes address (0= recognize, 1= don't recognize) Erase suspend (2= to both read and program) Sector protect (N= # of sectors/group) Temporary sector unprotect (1=supported) Sector protect/Chip unprotect scheme Simultaneous R/W operation (0=not supported) Burst mode (0=not supported) Page mode (0=not supported, 01 = 4 word page, 02 = 8 word page) Address (h) (Word Mode) 40 41 42 43 44 45 46 47 48 49 4A 4B Data (h) 0050 0052 0049 0031 0033 0014 0002 0001 0000 0008 0000 0000 4C 0002 4D 0095 4E 00A5 WP# Protection 04=Uniform sectors bottom WP# protect 05=Uniform sectors top WP# protect 4F 0004/ 0005 Program Suspend (0=not support, 1=support) 50 0001 Minimum ACC(acceleration) supply (0= not supported), [D7:D4] for volt, [D3:D0] for 100mV Maximum ACC(acceleration) supply (0= not supported), [D7:D4] for volt, [D3:D0] for 100mV P/N:PM1503 REV. 1.0, NOV. 27, 2009 33 MX29GA129E C/F MX29GA257E C/F ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM STRESS RATINGS Surrounding Temperature with Bias Storage Temperature -65C to +125C -65C to +150C -0.5V to +4.0 V VCC Voltage Range A9, WP#/ACC The other pins. -0.5V to +10.5 V -0.5V to Vcc +0.5V Output Short Circuit Current (less than one second) 200 mA OPERATING TEMPERATURE AND VOLTAGE Commercial (C) Grade Surrounding Temperature (TA ) Industrial (I) Grade Surrounding Temperature VCC Supply Voltages VCC range (TA ) 0C to +70C -40C to +85C +2.7 V to 3.6 V P/N:PM1503 REV. 1.0, NOV. 27, 2009 34 MX29GA129E C/F MX29GA257E C/F DC CHARACTERISTICS Symbol Description Iilk Input Leak Iilk9 A9 Leak Iolk Output Leak lcr1 Icr2 Min. Typ. Max. Remark 2.0uA 35uA A9=10.5V 1.0uA Read Current 6mA 20mA 30mA 50mA 60mA 100mA 2mA 10mA 5mA 20mA VCC Page Read Current CE#=Vil, OE#=Vih, Vcc=Vccmax; f=1MHz CE#=Vil, OE#=Vih, Vcc=Vccmax; f=5MHz CE#=Vil, OE#=Vih, Vcc=Vccmax; f=10MHz CE#=Vil, OE#=Vih, Vcc=Vccmax; f=10MHz CE#=Vil, OE#=Vih, Vcc=Vccmax; f=33MHz Iio VIO non-active current 0.2mA 10mA Icw Write Current 26mA 30mA Isb Standby Current 30uA 100uA Isbr Reset Current 30uA 100uA Isbs Sleep Mode Current 30uA 100uA Idpd Vcc deep power down current 10uA Icp1 Accelerated Pgm Current, WP#/Acc pin 5mA 10mA CE#=Vil, OE#=Vih Icp2 Accelerated Pgm Current, Vcc pin 20mA 30mA CE#=Vil, OE#=Vih Vil Vih Input Low Voltage Input High Voltage Very High Voltage for hardware Auto Select/Accelerated Program Output Low Voltage -0.1V 0.7xVCC 0.3xVCC VCC+0.3V 9.5V 10.5V Voh1 Ouput High Voltage 0.85xVCC Ioh1=-100uA Voh2 Ouput High Voltage VCC-0.4V Ioh2=-100uA Vlko Low Vcc Lock-out voltage Vhv Vol 0.45V 2.3V P/N:PM1503 CE#=Vil, OE#=Vih, WE#=Vil Vcc=Vcc max, other pin disable Vcc=Vccmax, RESET# enable, other pin disable Iol=100uA 2.5V REV. 1.0, NOV. 27, 2009 35 MX29GA129E C/F MX29GA257E C/F SWITCHING TEST CIRCUITS 3.3V 2.7K DEVICE UNDER TEST CL 6.2K Test Condition Output Load Capacitance, CL : 1TTL gate, 30pF(90ns) Rise/Fall Times : 5ns Input pulse levels : 0.0 ~ VCC In/Out reference levels : VCC / 2 SWITCHING TEST WAVEFORMS VCC VCC / 2 0.0V VCC / 2 Test Points INPUT OUTPUT P/N:PM1503 REV. 1.0, NOV. 27, 2009 36 MX29GA129E C/F MX29GA257E C/F AC CHARACTERISTICS-(1) 29GL129E (VCC=2.7V~3.6V) Min. Typ. Max. 90 25 90 25 20 Symbol Description Unit 35 ns ns ns ns ns ns Output hold time from the earliest rising edge of address,CE#, OE# 0 ns Trc Twc Tcwc Tas Read period time Write period time Command write period time Address setup time 90 90 90 0 Taso Tah Address setup time to OE# low during toggle bit polling Address hold time 15 45 Taht Tds Tdh Tvcs Tcs Tch Toes Address hold time from CE# or OE# high during toggle bit polling Data setup time Data hold time Vcc setup time Chip enable Setup time Chip enable hold time Output enable setup time 0 30 0 500 0 0 0 ns ns ns ns ns ns ns ns ns us ns ns ns Read 0 ns Toeh Output enable hold time Toggle & Data# Polling 10 ns 0 0 35 30 35 30 ns ns ns ns ns ns Taa Tpa Tce Toe Tdf Tsrw Valid data output after address Page access time Valid data output after CE# low Valid data output after OE# low Data output floating after OE# high Latency between read and write operation Toh Tws Twh Tcepw Tcepwh Twp Twph WE# setup time WE# hold time CE# pulse width CE# pulse width high WE# pulse width WE# pulse width high Tbusy Tghwl Tghel Twhwh1 Twhwh1 Twhwh2 Tbal Trdp Program/Erase active time by RY/BY# Read recover time before write Read recover time before write Program operation Acc program operation Sector erase operation Sector add hold time Release from deep power down mode 90 0 0 11 11 0.6 P/N:PM1503 5 50 200 ns ns ns us us sec us us REV. 1.0, NOV. 27, 2009 37 MX29GA129E C/F MX29GA257E C/F AC CHARACTERISTICS-(2) Symbol Description Taa Tpa Tce Toe Tdf Tsrw Toh Trc Twc Tcwc Tas Taso Tah Taht Tds Tdh Tvcs Tcs Tch Toes Toeh Valid data output after address Page access time Valid data output after CE# low Valid data output after OE# low Data output floating after OE# high Latency between read and write operation Output hold time from the earliest rising edge of address,CE#, OE# Read period time Write period time Command write period time Address setup time Address setup time to OE# low during toggle bit polling Address hold time Address hold time from CE# or OE# high during toggle bit polling Data setup time Data hold time Vcc setup time Chip enable Setup time Chip enable hold time Output enable setup time Output enable hold time 29GL257E (VCC=2.7V~3.6V) Min. Typ. Max. 100 25 100 25 20 29GL257E (VCC=3.0V~3.6V) Min. Typ. Max. 90 25 90 25 20 Unit ns ns ns ns ns 35 35 ns 0 0 ns 100 100 100 0 90 90 90 0 ns ns ns ns 15 15 ns 45 45 ns 0 0 ns 30 0 500 0 0 0 30 0 500 0 0 0 ns ns us ns ns ns Read 0 0 ns Toggle & Data# Polling 10 10 ns 0 0 35 30 35 30 0 0 35 30 35 30 ns ns ns ns ns ns Tws Twh Tcepw Tcepwh Twp Twph WE# setup time WE# hold time CE# pulse width CE# pulse width high WE# pulse width WE# pulse width high Tbusy Tghwl Tghel Twhwh1 Twhwh1 Twhwh2 Tbal Trdp Program/Erase active time by RY/BY# Read recover time before write Read recover time before write Program operation Acc program operation Sector erase operation Sector add hold time Release from deep power down mode 100 0 0 90 0 0 11 11 0.6 5 50 200 11 11 0.6 5 50 200 ns ns ns us us sec us us Note : Not 100% tested. P/N:PM1503 REV. 1.0, NOV. 27, 2009 38 MX29GA129E C/F MX29GA257E C/F Figure 1. COMMAND WRITE OPERATION Tcwc CE# Vih Vil Tch Tcs WE# Vih Vil Toes OE# Twph Twp Vih Vil Addresses Vih VA Vil Tah Tas Tdh Tds Vih Data Vil DIN VA: Valid Address P/N:PM1503 REV. 1.0, NOV. 27, 2009 39 MX29GA129E C/F MX29GA257E C/F READ/RESET OPERATION Figure 2. READ TIMING WAVEFORMS CE# Tce Vih Vil Vih WE# OE# Vil Toeh Tdf Toe Vih Vil Toh Taa Trc Vih Addresses ADD Valid Vil Tsrw Outputs Voh HIGH Z DATA Valid HIGH Z Vol P/N:PM1503 REV. 1.0, NOV. 27, 2009 40 MX29GA129E C/F MX29GA257E C/F AC CHARACTERISTICS Item Description MIN/MAX Speed Unit Trp1 RESET# Pulse Width (During Automatic Algorithms) MIN 10 us Trp2 RESET# Pulse Width (NOT During Automatic Algorithms) MIN 500 ns Trh RESET# High Time Before Read MIN 200 ns Trb1 RY/BY# Recovery Time (to CE#, OE# go low) MIN 0 ns Trb2 RY/BY# Recovery Time (to WE# go low) MIN 50 ns Tready1 RESET# PIN Low (During Automatic Algorithms) to Read or Write MAX 20 us Tready2 RESET# PIN Low (NOT During Automatic Algorithms) to Read or Write MAX 500 ns Figure 3. RESET# TIMING WAVEFORM Trb1 CE#, OE# Trb2 WE# Tready1 RY/BY# RESET# Trp1 Reset Timing during Automatic Algorithms CE#, OE# Trh RY/BY# RESET# Trp2 Tready2 Reset Timing NOT during Automatic Algorithms P/N:PM1503 REV. 1.0, NOV. 27, 2009 41 MX29GA129E C/F MX29GA257E C/F ERASE/PROGRAM OPERATION Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM CE# Tch Twhwh2 Twp WE# Twph Tcs Tghwl OE# Last 2 Erase Command Cycle Twc Address 2AAh VA 555h Tds Data Read Status Tah Tas Tdh 55h VA In Progress Complete 10h Tbusy Trb RY/BY# P/N:PM1503 REV. 1.0, NOV. 27, 2009 42 MX29GA129E C/F MX29GA257E C/F Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H Data# Polling Algorithm or Toggle Bit Algorithm NO Data=FFh ? YES Auto Chip Erase Completed P/N:PM1503 REV. 1.0, NOV. 27, 2009 43 MX29GA129E C/F MX29GA257E C/F Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM Read Status CE# Tch Twhwh2 Twp WE# Twph Tcs Tghwl OE# Tbal Last 2 Erase Command Cycle Twc Address Tas Sector Address 0 2AAh Tds Tdh 55h Sector Address 1 Sector Address n Tah VA VA In Progress Complete 30h 30h 30h Data Tbusy Trb RY/BY# P/N:PM1503 REV. 1.0, NOV. 27, 2009 44 MX29GA129E C/F MX29GA257E C/F Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address Last Sector NO to Erase YES Data# Polling Algorithm or Toggle Bit Algorithm Data=FFh NO YES Auto Sector Erase Completed P/N:PM1503 REV. 1.0, NOV. 27, 2009 45 MX29GA129E C/F MX29GA257E C/F Figure 8. ERASE SUSPEND/RESUME FLOWCHART START Write Data B0H Toggle Bit checking Q6 NO ERASE SUSPEND not toggled YES Read Array or Program Reading or Programming End NO YES Write Data 30H ERASE RESUME Continue Erase Another Erase Suspend ? NO YES P/N:PM1503 REV. 1.0, NOV. 27, 2009 46 MX29GA129E C/F MX29GA257E C/F Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS CE# Tch Twhwh1 Twp WE# Tcs Twph Tghwl OE# Last 2 Program Command Cycle 555h Address Last 2 Read Status Cycle Tah Tas VA PA Tds VA Tdh A0h Status PD DOUT Data Tbusy Trb RY/BY# Figure 10. ACCELERATED PROGRAM TIMING DIAGRAM Vhv (9.5V ~ 10.5V) WP#/ACC Vil or Vih Vil or Vih 250nS 250nS P/N:PM1503 REV. 1.0, NOV. 27, 2009 47 MX29GA129E C/F MX29GA257E C/F Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM WE# Twhwh1 or Twhwh2 Tcepw CE# Tcepwh Tghwl OE# Tah Tas Address 555h Tds Data VA PA VA Tdh A0h Status PD DOUT Tbusy RY/BY# P/N:PM1503 REV. 1.0, NOV. 27, 2009 48 MX29GA129E C/F MX29GA257E C/F Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data# Polling Algorithm or Toggle Bit Algorithm next address Read Again Data: Program Data? No YES No Last Word to be Programed YES Auto Program Completed P/N:PM1503 REV. 1.0, NOV. 27, 2009 49 MX29GA129E C/F MX29GA257E C/F Figure 13. SILICON ID READ TIMING WAVEFORM VCC 3V Vhv Vih Vil ADD A9 ADD A0 Vih Vil Taa A1 Taa Taa Taa Vih Vil A2 Vih Vil ADD CE# WE# Vih Vil Disable Enable Tce Vih Vil OE# Vih Toe Tdf Vil Toh DATA Q0-Q15 Toh Toh Toh Vih Vil DATA OUT DATA OUT DATA OUT DATA OUT Manufacturer ID Device ID Cycle 1 Device ID Cycle 2 Device ID Cycle 3 P/N:PM1503 REV. 1.0, NOV. 27, 2009 50 MX29GA129E C/F MX29GA257E C/F WRITE OPERATION STATUS Figure 14. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) Tce CE# Tch WE# Toe OE# Toeh Tdf Trc Address VA VA Taa Toh Q7 Status Data Complement True Valid Data Q0-Q6 Status Data Status Data True Valid Data High Z High Z Tbusy RY/BY# P/N:PM1503 REV. 1.0, NOV. 27, 2009 51 MX29GA129E C/F MX29GA257E C/F Figure 15. STATUS POLLING FOR WORD PROGRAM/ERASE Start Read Q7~Q0 at valid address (Note 1) No Q7 = Data# ? Yes No Q5 = 1 ? Yes Read Q7~Q0 at valid address No Q7 = Data# ? (Note 2) Yes FAIL Pass Notes: 1. For programming, valid address means program address. For erasing, valid address means erase sectors address. 2. Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1503 REV. 1.0, NOV. 27, 2009 52 MX29GA129E C/F MX29GA257E C/F Figure 16. STATUS POLLING FOR WRITE BUFFER PROGRAM Start Read Q7~Q0 at last write address (Note 1) Q7 = Data# ? No Yes Q1=1 ? Only for write buffer program Yes No No Q5=1 ? Write Buffer Abort Yes Read Q7~Q0 at last write address (Note 1) Q7 = Data# ? (Note 2) No Yes FAIL Pass Notes: 1. For programming, valid address means program address. For erasing, valid address means erase sectors address. 2. Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1503 REV. 1.0, NOV. 27, 2009 53 MX29GA129E C/F MX29GA257E C/F Figure 17. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) Tce CE# Tch WE# Toe OE# Toeh Tdf Trc Address Taht Taso VA VA VA VA Taa Toh Q6/Q2 Valid Status (first read) Valid Status Valid Data (second read) (stops toggling) Valid Data Tbusy RY/BY# VA : Valid Address P/N:PM1503 REV. 1.0, NOV. 27, 2009 54 MX29GA129E C/F MX29GA257E C/F Figure 18. TOGGLE BIT ALGORITHM Start Read Q7-Q0 Twice Q6 Toggle ? (Note 1) NO YES NO Q5 = 1? YES Read Q7~Q0 Twice Q6 Toggle ? NO YES PGM/ERS fail Write Reset CMD PGM/ERS Complete Notes: 1. Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM1503 REV. 1.0, NOV. 27, 2009 55 MX29GA129E C/F MX29GA257E C/F Figure 19. PAGE READ TIMING WAVEFORM VALID ADD Amax:A3 A0,A1,A2 1'st ADD taa DATA 2'nd ADD 3'rd ADD tpa Data 1 tpa Data 2 Data 3 CE#/OE# Note: CE#, OE# are enable. Page size is 8 words. Address are A2~A0. AC CHARACTERISTICS ITEM WEB high to release from deep power down mode WEB high to deep power down mode TYP MAX tRDP 100us 200us tDP 10us 20us Figure 20. DEEP POWER DOWN MODE WAVEFORM CEB WEB ADD DATA tDP 55 XX 2AA AA 55 tRDP XX (don't care) AB B9 Standby mode P/N:PM1503 Deep power down mode Standby mode REV. 1.0, NOV. 27, 2009 56 MX29GA129E C/F MX29GA257E C/F Figure 21. WRITE BUFFER PROGRAM FLOWCHART Write CMD: Data=AAh, Addr=555h Write CMD: Data=55h, Addr=2AAh Write CMD: Data=29h, Addr=SA Write CMD: Data=25h, Addr=SA Polling Status Write CMD: Data=PWC, Addr=SA PWC=PWC-1 Yes Write CMD: Data=PGM_data, Addr=PGM_addr Want to Abort ? PWC =0? No Return to read Mode No Fail Yes Write a different sector address to cause Abort Yes No No Pass Yes Yes Write Buffer Abort No SA: Sector Address of to be Programmed page PWC: Program Word Count Write Abort reset CMD to return to read Mode P/N:PM1503 Write reset CMD to return to read Mode REV. 1.0, NOV. 27, 2009 57 MX29GA129E C/F MX29GA257E C/F RECOMMENDED OPERATING CONDITIONS At Device Power-Up AC timing illustrated in Figure A is recommended for the supply voltages and the control signals at device powerup (e.g. Vcc and CE# ramp up simultaneously). If the timing in the figure is ignored, the device may not operate correctly. Vcc(min) Vcc GND Tvr Tvcs Tf Tce Tr Vih CE# Vil Vih WE# Vil Tf Toe Tr Vih OE# Vil Tr or Tf ADDRESS Vih Tr or Tf Valid Address Vil Voh DATA Taa High Z Valid Ouput Vol Vih WP#/ACC Vil Figure A. AC Timing at Device Power-Up Symbol Tvr Tr Tf Tvcs Parameter Vcc Rise Time Input Signal Rise Time Input Signal Fall Time Vcc Setup Time Min. 20 200 P/N:PM1503 Max. 500000 20 20 Unit us/V us/V us/V us REV. 1.0, NOV. 27, 2009 58 MX29GA129E C/F MX29GA257E C/F ERASE AND PROGRAMMING PERFORMANCE LIMITS TYP. (1) 64 MAX. (2) 150 256Mb 128 0.6 300 5 sec sec 128Mb 256Mb 50 100 180 350 sec sec 11 360 us PARAMETER MIN. 128Mb Chip Erase Time Sector Erase Time Chip Programming Time Word Program Time UNITS sec Total Write Buffer Time 200 us ACC Total Write Buffer Time 100 us 100,000 Cycles Erase/Program Cycles Notes: 1. Typical program and erase times assume the following conditions: 25C, 3.0V VCC. Programming specifications assume checkboard data pattern. 2. Maximum values are measured at VCC = 3.0 V, worst case temperature. Maximum values are valid up to and including 100,000 program/erase cycles. 3. Erase/Program cycles comply with JEDEC JESD-47E & A117A standard. 4. Exclude 00h program before erase operation. DATA RETENTION PARAMETER Condition Min. Data retention 55C 20 Max. UNIT years LATCH-UP CHARACTERISTICS MIN. -1.0V -1.0V -100mA Input Voltage voltage difference with GND on WP#/ACC, A9 Input Voltage voltage difference with GND on all normal pins input Vcc Current All pins included except Vcc. Test conditions: Vcc = 3.0V, one pin per testing TSOP PIN CAPACITANCE Parameter Symbol CIN2 COUT CIN Parameter Description Control Pin Capacitance Output Capacitance Input Capacitance Test Set VIN=0 VOUT=0 VIN=0 P/N:PM1503 TYP 7.5 8.5 6 MAX. 10.5V 1.5Vcc +100mA MAX 9 12 7.5 UNIT pF pF pF REV. 1.0, NOV. 27, 2009 59 MX29GA129E C/F MX29GA257E C/F ORDERING INFORMATION 128Mb MX29GA129E C/F PART NO. ACCESS TIME (ns) PACKAGE Remark MX29GA129ECXCI-90G 90 64 FBGA Pb-free MX29GA129EFXCI-90G 90 64 FBGA Pb-free ACCESS TIME (ns) PACKAGE Remark MX29GA257ECXCI-90Q 90 64 FBGA Pb-free (Note 1) MX29GA257EFXCI-90Q 90 64 FBGA Pb-free (Note 1) 256Mb MX29GA257E C/F PART NO. Note : 1. 90Q covers 2.7V~3.6V for 100ns and 3.0V~3.6V for 90ns. P/N:PM1503 REV. 1.0, NOV. 27, 2009 60 MX29GA129E C/F MX29GA257E C/F PART NAME DESCRIPTION MX 29 GA 129 E C XC I 90 Q OPTION: G: Lead-free with Vcc: 2.7V~3.6V Q: Lead-free with restricted Vcc: 3.0V~3.6V (Note 1) SPEED: 90: 90ns TEMPERATURE RANGE: I: Industrial (-40 C to 85 C) PACKAGE: XC: FBGA (10mm x 13mm) PRODUCT TYPE (Protection when WP#=VIL): C: Highest Address Sector Protected, with Read Protection F: Lowest Address Sector Protected, with Read Protection REVISION: E DENSITY & MODE: 129: 128Mb x16 Uniform Block 257: 256Mb x16 Uniform Block TYPE: GA: 3V Security Flash DEVICE: 29:Flash Note 1: 90Q covers 2.7V~3.6V for 100ns and 3.0V~3.6V for 90ns P/N:PM1503 REV. 1.0, NOV. 27, 2009 61 MX29GA129E C/F MX29GA257E C/F PACKAGE INFORMATION P/N:PM1503 REV. 1.0, NOV. 27, 2009 62 MX29GA129E C/F MX29GA257E C/F REVISION HISTORY Revision No. Description 0.01 1. Added Read Protection function application example flow chart and Read Protection mode unclock criteria description 2. Modified Multual Authentication wave form description 3. Modified Read Unlock command 4. Changed data retention from 10-years to 20-years 5. Added Icr2 into DC Characteristics 6. Modified Tsrw(min.) from 20ns to 35ns 7. Added figure 16. status polling for write buffer program 1.0 1. Removed title of "Preliminary" 2. Added wording "e.g. Vcc and CE# ramp up simultaneously" P/N:PM1503 Page P71~72 P79 P82 P2 P35 P37,38 P53 P2 P58 Date AUG/10/2009 NOV/27/2009 REV. 1.0, NOV. 27, 2009 63 MX29GA129E C/F MX29GA257E C/F Macronix's products are not designed, manufactured, or intended for use for any high risk applications in which the failure of a single component could cause death, personal injury, severe physical damage, or other substantial harm to persons or property, such as life-support systems, high temperature automotive, medical, aircraft and military application. Macronix and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due to use of Macronix's products in the prohibited applications. Copyright(c) Macronix International Co., Ltd. 2009. All Rights Reserved. Macronix, MXIC, MXIC Logo, MX Logo, are trademarks or registered trademarks of Macronix International Co., Ltd.. The names and brands of other companies are for identification purposes only and may be claimed as the property of the respective companies. MACRONIX INTERNATIONAL CO., LTD. Macronix Offices : Japan Macronix Offices : Taiwan Macronix Asia Limited. Headquarters, FAB2 Macronix, International Co., Ltd. NKF Bldg. 5F, 1-2 Higashida-cho, Kawasaki-ku Kawasaki-shi, Kanagawa Pref. 210-0005, Japan Tel: +81-44-246-9100 Fax: +81-44-246-9105 16, Li-Hsin Road, Science Park, Hsinchu, Taiwan, R.O.C. Tel: +886-3-5786688 Fax: +886-3-5632888 Macronix Offices : Korea Taipei Office Macronix, International Co., Ltd. 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Koningin Astridlaan 59, Bus 1 1780 Wemmel Belgium Tel: +32-2-456-8020 Fax: +32-2-456-8021 No.5, XingHai Rd, SuZhou Industrial Park, SuZhou China 215021 Tel: +86-512-62580888 Ext: 3300 Fax: +86-512-62586799 Macronix Offices : USA Macronix (Hong Kong) Co., Limited, Shenzhen Office Macronix America, Inc. 680 North McCarthy Blvd. Milpitas, CA 95035, U.S.A. Tel: +1-408-262-8887 Fax: +1-408-262-8810 Room 1401 & 1404, Block A, TianAN Hi-Tech PLAZA Tower, Che Gong Miao, FutianDistrict, Shenzhen PRC 518040 Tel: +86-755-83433579 Fax: +86-755-83438078 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 64