STV0900 Multistandard advanced dual demodulator for Satellite Digital TV and Data services set-top boxes Data Brief Description The STV0900 features a high speed DVB-S2 Forward Error Corrector (FEC) which is designed to handle up to 180 Mega Channel bits per second at its input. To feed the FEC the STV0900 implements two identical demodulators, each capable of handling QPSK legacy, DVBS2 constant coding and modulation for satellite broadcast and Advanced Coding and Modulation for interactive services. The STV0900 supports mode switching on a frame basis without synchronization or data loss. Interfaces - Dedicated 27 MHz clock generation for back-end decoder - I2C serial bus interface - JTAG interface - boundary scan - 2 DiSEqCTM 2.x interfaces - GPIOs and interrupt lines - Monitoring through I2C serial interface With 0.20, 0.25, 0.35 excess bandwidth factors. - DVBS or DIRECTVTM - DVBS2 broadcasting (CCM) - DVBS2 adaptative (ACM) Technology - 90 nm CMOS process - Multi supply: 1.0 V core, 2.5 V analog, 3.3 V digital interfaces - Power saving features Dual decoding - Up to 180 Mega DVBS2 channel bits per second (Mcbps) at input to FEC - Up to 130 Mcbps DVBS or DIRECTVTM legacy per FEC - Legacy DVB-S - DVB-S2 Package - Exposed PAD LQFP 128 14x14, 0.4 pitch - 4 layer PCB recommended. Transport stream management Features Demodulation - RF interfaces - Each demodultor can handle: - DIRECTVTM and DVBS QPSK - DVBS2 QPSK, 8PSK and 16APSK - Digital Nyquist root filter - - Dual data to MPEG decoder - Single ACM data to microprocessor - DVB-S2 framing December 2006 Rev 1 For further information contact your local STMicroelectronics sales office. 1/5 www.st.com 5 Application block diagrams 1 STV0900 Application block diagrams Figure 1. STV0900 dual broadcast application block diagram DiSEqC 2.0 STV0900 diseqc1_o diseqc1_i STB6100 STi710X [sdat1, sclt1] [sda,scl] agc_rf1 [d1<0>, clkout1, strout1, d/p1, error1] [Im1,Ip1] [Qm1,Qp1] xtal_i clkout_27 27MHz STB6100 [sdat2, sclt2] agc_rf2 [Im2,Ip2] [Qm2,Qp2] [d2<0>, clkout2, strout2, d/p2, error2] 27MHz diseqc2_o diseqc2_i Possible broadcast configurations are: 2/5 dual DVBS or dual DIRECTVTM legacy decoding with dual TS output, dual DVBS2 decoding with dual TS output, DVBS or DIRECTVTM legacy and DVBS2 decoding with dual TS output. STV0900 Application block diagrams Figure 2. STV0900 ACM application block diagram STV0900 STB6100 STiXXXX [sdat1, sclt1] [sda,scl] agc_rf1 [d1<7:0>, clkout1, strout1, d/p1, [Qm1,Qp1] error1] [Im1,Ip1] xtal_i clkout_27 27 MHz [SOFcount, SOF] DiSEqC 2.0 diseqc1_o diseqc1_i Possible configurations can be: single DVBS2 ACM decoding, single DVBS2 ACM with single DVBS or DIRECTVTM legacy (2nd tuner not shown). 3/5 Revision history 2 STV0900 Revision history Table 1. 4/5 Document revision history Date Revision 21-Dec-2006 1 Description Initial release. STV0900 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. 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