LTC3780
1
3780ff
For more information www.linear.com/LTC3780
Typical applicaTion
FeaTures
applicaTions
DescripTion
High Efficiency, Synchronous,
4-Switch Buck-Boost Controller
The LT C
®
3780 is a high performance buck-boost switch-
ing regulator controller that operates from input voltages
above, below or equal to the output voltage. The constant
frequency current mode architecture allows a phase-
lockable frequency of up to 400kHz. With a wide 4V to
30V (36V maximum) input and output range and seamless
transfers between operating modes, the LTC3780 is ideal
for automotive, telecom and battery-powered systems.
The operating mode of the controller is determined through
the FCB pin. For boost operation, the FCB mode pin can
select among Burst Mode
®
operation, discontinuous mode
and forced continuous mode. During buck operation, the
FCB mode pin can select among skip-cycle mode, discon-
tinuous mode and forced continuous mode. Burst Mode
operation and skip-cycle mode provide high efficiency
operation at light loads while forced continuous mode
and discontinuous mode operate at a constant frequency.
Fault protection is provided by an output overvoltage
comparator and internal foldback current limiting. A power
good output pin indicates when the output is within 7.5%
of its designed set point.
High Efficiency Buck-Boost Converter
n Single Inductor Architecture Allows VIN Above,
Below or Equal to VOUT
n Wide VIN Range: 4V to 36V Operation
n Synchronous Rectification: Up to 98% Efficiency
n Current Mode Control
n ±1% Output Voltage Accuracy: 0.8V < VOUT < 30V
n Phase-Lockable Fixed Frequency: 200kHz to 400kHz
n Power Good Output Voltage Monitor
n Internal LDO for MOSFET Supply
n Quad N-Channel MOSFET Synchronous Drive
n VOUT Disconnected from VIN During Shutdown
n Adjustable Soft-Start Current Ramping
n Foldback Output Current Limiting
n Selectable Low Current Modes
n Output Overvoltage Protection
n Available in 24-Lead SSOP and Exposed Pad
(5mm × 5mm) 32-Lead QFN Packages
n Automotive Systems
n Telecom Systems
n DC Power Distribution Systems
n High Power Battery-Operated Devices
n Industrial Control
+
VIN
TG2
0.1µF 0.1µF
BOOST2
SW2
BG2
TG1
BOOST1
SW1
BG1
PLLIN
RUN
VOSENSE
ITH
SS
SGND FCB
0.010Ω
4.7µF
A
B
D
C
2200pF
1µF
CER
100µF
16V
CER
330µF
16V
ON/OFF
0.1µF
4.7µH
20k
PGOOD
LTC3780
INTVCC
SENSE+SENSE–PGND
7.5k
1%
3780 TA01
105k
1%
22µF
50V
CER
VIN
5V TO 32V
VOUT
12V
5A
+
VIN (V)
0
EFFICIENCY (%)
POWER LOSS (W)
90
95
100
15 25
3780 TA01b
85
80
5 10 20 30 35
75
70
8
9
10
7
6
5
4
3
2
1
0
Efficiency and Power Loss
VOUT = 12V, ILOAD = 5A
L, LT, LTC, LTM, Linear Technology, Burst Mode, µModule and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners. Protected by U.S. Patents, including 5481178, 6304066, 5929620, 5408150,
6580258, patent pending on current mode architecture and protection.
LTC3780
2
3780ff
For more information www.linear.com/LTC3780
absoluTe MaxiMuM raTings
Input Supply Voltage (VIN) ........................ –0.3V to 36V
Topside Driver Voltages
(BOOST1, BOOST2) .................................. –0.3V to 42V
Switch Voltage (SW1, SW2) ........................ –5V to 36V
INTVCC, EXTVCC, (BOOST – SW1),
(BOOST2 – SW2), PGOOD .......................... –0.3V to 7V
RUN, SS ....................................................... –0.3V to 6V
PLLIN Voltage .......................................... –0.3V to 5.5V
PLLFLTR Voltage ....................................... –0.3V to 2.7V
FCB, STBYMD Voltages ........................ –0.3V to INTVCC
(Note 1)
ITH, VOSENSE Voltages .............................. –0.3V to 2.4V
Peak Output Current <10µs (TG1, TG2, BG1, BG2) .....3A
INTVCC Peak Output Current ................................. 40mA
Operating Junction Temperature Range (Notes 2, 7)
LTC3780E ............................................. –40°C to 85°C
LTC3780I............................................ –40°C to 125°C
LTC3780MP ....................................... –55°C to 125°C
Storage Temperature Range ................... –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
SSOP Only ........................................................ 300°C
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
G PACKAGE
24-LEAD PLASTIC SSOP
24
23
22
21
20
19
18
17
16
15
14
13
PGOOD
SS
SENSE+
SENSE–
ITH
VOSENSE
SGND
RUN
FCB
PLLFLTR
PLLIN
STBYMD
BOOST1
TG1
SW1
VIN
EXTVCC
INTVCC
BG1
PGND
BG2
SW2
TG2
BOOST2
TJMAX = 125°C, θJA = 130°C/W
32 31 30 29 28 27 26 25
9 10 11 12
TOP VIEW
33
UH PACKAGE
32-LEAD (5mm × 5mm) PLASTIC QFN
13 14 15 16
17
18
19
20
21
22
23
24
8
7
6
5
4
3
2
1SENSE+
SENSE–
ITH
VOSENSE
SGND
RUN
FCB
PLLFTR
SW1
VIN
EXTVCC
INTVCC
BG1
PGND
BG2
SW2
NC
SS
PGOOD
NC
NC
BOOST1
TG1
NC
NC
PLLIN
STBYMD
NC
NC
BOOST2
TG2
NC
TJMAX = 125°C, θJA = 34°C/W
EXPOSED PAD (PIN 33) IS SGND, MUST BE SOLDERED TO PCB
pin conFiguraTion
LTC3780
3
3780ff
For more information www.linear.com/LTC3780
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. (Note 7) VIN = 15V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop
VOSENSE Feedback Reference Voltage ITH = 1.2V, –40°C ≤ T ≤ 85°C (Note 3)
–55°C ≤ T ≤ 125°C
l
l
0.792
0.792
0.800
0.800
0.808
0.811
V
V
IVOSENSE Feedback Pin Input Current (Note 3) –5 –50 nA
VLOADREG Output Voltage Load Regulation (Note 3)
∆ITH = 1.2V to 0.7V
∆ITH = 1.2V to 1.8V
l
l
0.1
–0.1
0.5
–0.5
%
%
VREF(LINEREG) Reference Voltage Line Regulation VIN = 4V to 30V, ITH = 1.2V (Note 3) 0.002 0.02 %/V
gm(EA) Error Amplifier Transconductance ITH = 1.2V, Sink/Source = 3µA (Note 3) 0.32 mS
gm(GBW) Error Amplifier GBW (Note 8) 0.6 MHz
IQInput DC Supply Current
Normal
Standby
Shutdown Supply Current
(Note 4)
VRUN = 0V, VSTBYMD > 2V
VRUN = 0V, VSTBYMD = Open
2400
1500
55
70
µA
µA
µA
VFCB Forced Continuous Threshold 0.76 0.800 0.84 V
IFCB Forced Continuous Pin Current VFCB = 0.85V –0.30 –0.18 –0.1 µA
VBINHIBIT Burst Inhibit (Constant Frequency)
Threshold
Measured at FCB Pin 5.3 5.5 V
UVLO Undervoltage Reset VIN Falling l3.8 4 V
VOVL Feedback Overvoltage Lockout Measured at VOSENSE Pin 0.84 0.86 0.88 V
ISENSE Sense Pins Total Source Current VSENSE– = VSENSE+ = 0V –380 µA
VSTBYMD(START) Start-Up Threshold VSTBYMD Rising 0.4 0.7 V
VSTBYMD(KA) Keep-Alive Power-On Threshold VSTBYMD Rising, VRUN = 0V 1.25 V
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3780EG#PBF LTC3780EG#TRPBF LTC3780EG 24-Lead Plastic SSOP –40°C to 85°C
LTC3780IG#PBF LTC3780IG#TRPBF LTC3780IG 24-Lead Plastic SSOP –40°C to 125°C
LTC3780EUH#PBF LTC3780EUH#TRPBF 3780 32-Lead (5mm × 5mm) Plastic QFN –40°C to 85°C
LTC3780IUH#PBF LTC3780IUH#TRPBF 3780I 32-Lead (5mm × 5mm) Plastic QFN –40°C to 125°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3780EG LTC3780EG#TR LTC3780EG 24-Lead Plastic SSOP –40°C to 85°C
LTC3780IG LTC3780IG#TR LTC3780IG 24-Lead Plastic SSOP –40°C to 125°C
LTC3780MPG LTC3780MPG#TR LTC3780MPG 24-Lead Plastic SSOP –55°C to 125°C
LTC3780EUH LTC3780EUH#TR 3780 32-Lead (5mm × 5mm) Plastic QFN –40°C to 85°C
LTC3780IUH LTC3780IUH#TR 3780I 32-Lead (5mm × 5mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LTC3780
4
3780ff
For more information www.linear.com/LTC3780
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. (Note 7) VIN = 15V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
DF MAX, Boost Maximum Duty Factor % Switch C On 99 %
DF MAX, Buck Maximum Duty Factor % Switch A On (in Dropout) 99 %
VRUN(ON) RUN Pin On Threshold VRUN Rising 1 1.5 2 V
ISS Soft-Start Charge Current VRUN = 2V 0.5 1.2 µA
VSENSE(MAX) Maximum Current Sense Threshold Boost: VOSENSE = VREF – 50mV
Buck: VOSENSE = VREF – 50mV
l
l
120
–95
160
–110
185
–150
mV
mV
VSENSE(MIN,BUCK) Minimum Current Sense Threshold Discontinuous Mode –6 mV
TG1, TG2 trTG Rise Time CLOAD = 3300pF (Note 5) 50 ns
TG1, TG2 tfTG Fall Time CLOAD = 3300pF (Note 5) 45 ns
BG1, BG2 trBG Rise Time CLOAD = 3300pF (Note 5) 45 ns
BG1, BG2 tfBG Fall Time CLOAD = 3300pF (Note 5) 55 ns
TG1/BG1 t1D TG1 Off to BG1 On Delay,
Switch C On Delay
CLOAD = 3300pF Each Driver 80 ns
BG1/TG1 t2D BG1 Off to TG1 On Delay,
Synchronous Switch D On Delay
CLOAD = 3300pF Each Driver 80 ns
TG2/BG2 t3D TG2 Off to BG2 On Delay,
Synchronous Switch B On Delay
CLOAD = 3300pF Each Driver 80 ns
BG2/TG2 t4D BG2 Off to TG2 On Delay,
Switch A On Delay
CLOAD = 3300pF Each Driver 80 ns
Mode
Transition 1
BG1 Off to BG2 On Delay,
Switch A On Delay
CLOAD = 3300pF Each Driver 250 ns
Mode
Transition 2
BG2 Off to BG1 On Delay,
Synchronous Switch D On Delay
CLOAD = 3300pF Each Driver 250 ns
tON(MIN,BOOST) Minimum On-Time for Main Switch in
Boost Operation
Switch C (Note 6) 200 ns
tON(MIN,BUCK) Minimum On-Time for Synchronous
Switch in Buck Operation
Switch B (Note 6) 180 ns
Internal VCC Regulator
VINTVCC Internal VCC Voltage 7V < VIN < 30V, VEXTVCC = 5V l5.7 6 6.3 V
∆VLDO(LOADREG) Internal VCC Load Regulation ICC = 0mA to 20mA, VEXTVCC = 5V 0.2 2 %
VEXTVCC EXTVCC Switchover Voltage ICC = 20mA, VEXTVCC Rising l5.4 5.7 V
∆VEXTVCC(HYS) EXTVCC Switchover Hysteresis 300 mV
∆VEXTVCC EXTVCC Switch Drop Voltage ICC = 20mA, VEXTVCC = 6V 150 300 mV
Oscillator and Phase-Locked Loop
fNOM Nominal Frequency VPLLFLTR = 1.2V 260 300 330 kHz
fLOW Lowest Frequency VPLLFLTR = 0V 170 200 220 kHz
fHIGH Highest Frequency VPLLFLTR = 2.4V 340 400 440 kHz
RPLLIN PLLIN Input Resistance 50 kΩ
IPLLLPF Phase Detector Output Current fPLLIN < fOSC
fPLLIN > fOSC (Note 9)
–15
15
µA
µA
LTC3780
5
3780ff
For more information www.linear.com/LTC3780
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: TJ for the QFN package is calculated from the temperature TA and
power dissipation PD according to the following formula:
TJ = TA + (PD • 34°C/W)
Note 3: The IC is tested in a feedback loop that servos VITH to a specified
voltage and measures the resultant VOSENSE.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 6: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current ≥ 40% of IMAX (see minimum on-time
considerations in the Applications Information section).
Note 7: The LTC3780 is tested under pulsed load conditions such that TJ ≈
TA. The LTC3780E is guaranteed to meet specifications from 0°C to 85°C
junction temperature. Specifications over the –40°C to 85°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3780I is guaranteed
over the –40°C to 125°C operating junction temperature range, and
the LTC3780MP is tested and guaranteed over the full –55°C to 125°C
operating junction temperature range.
Note 8: This parameter is guaranteed by design.
Note 9: fOSC is the running frequency for the application.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
PGOOD Output
∆VFBH PGOOD Upper Threshold VOSENSE Rising 5.5 7.5 10 %
∆VFBL PGOOD Lower Threshold VOSENSE Falling –5.5 –7.5 –10 %
∆VFB(HYST) PGOOD Hysteresis VOSENSE Returning 2.5 %
VPGL PGOOD Low Voltage IPGOOD = 2mA 0.1 0.3 V
IPGOOD PGOOD Leakage Current VPGOOD = 5V ±1 µA
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. (Note 7) VIN = 15V unless otherwise noted.
LTC3780
6
3780ff
For more information www.linear.com/LTC3780
Typical perForMance characTerisTics
Efficiency vs Output Current
(Boost Operation) Efficiency vs Output Current
Efficiency vs Output Current
(Buck Operation)
Supply Current vs Input Voltage Internal 6V LDO Line Regulation EXTVCC Voltage Drop
INTVCC and EXTVCC Switch
Voltage vs Temperature
EXTVCC Switch Resistance
vs Temperature Load Regulation
TA = 25°C, unless otherwise noted.
ILOAD (A)
0.01
40
EFFICIENCY (%)
80
90
100
0.1 1 10
3780 G01
70
60
50
BURST
DCM
CCM
VIN = 6V
VOUT = 12V
ILOAD (A)
0.01
40
EFFICIENCY (%)
80
90
100
0.1 1 10
3780 G02
70
60
50
BURST
DCM CCM
VIN = 12V
VOUT = 12V
ILOAD (A)
0.01
40
EFFICIENCY (%)
80
90
100
0.1 1 10
3780 G03
70
60
50
SC
DCM
CCM
VIN = 18V
VOUT = 12V
INPUT VOLTAGE (V)
0 5
0
SUPPLY CURRENT (µA)
1000
2500
10 20 25
3780 G04
500
2000
1500
15 30 35
VFCB = 0V
STANDBY
SHUTDOWN
INPUT VOLTAGE (V)
0
INTVCC VOLTAGE (V)
5.5
6.0
6.5
15 25
3780 G05
5.0
4.5
5 10 20 30 35
4.0
3.5
CURRENT (mA)
0
0
EXTV
CC
VOLTAGE DROP (mV)
20
40
60
80
100
120
10 20 30 40
3780 G06
50
TEMPERATURE (°C)
–75 –50
5.55
INTVCC AND EXTVCC SWITCH VOLTAGE (V)
5.60
5.70
5.75
5.80
6.05
5.90
050 75
3780 G07
5.65
5.95
6.00
5.85
–25 25 100 125
INTVCC VOLTAGE
EXTVCC SWITCHOVER THRESHOLD
TEMPERATURE (°C)
–75 –50 –25
0
EXTV
CC
SWITCH RESISTANCE (Ω)
2
5
050 75
3780 G08
1
4
3
25 100 125
LOAD CURRENT (A)
0
NORMALIZED VOUT (%)
–0.2
–0.1
0
4
3780 G09
–0.3
–0.4
–0.5 1235
VIN = 18V
FCB = 0V
VOUT = 12V
VIN = 12V
VIN = 6V
LTC3780
7
3780ff
For more information www.linear.com/LTC3780
Continuous Current Mode
(CCM, VIN = 6V, VOUT = 12V)
Continuous Current Mode
(CCM, VIN = 12V, VOUT = 12V)
Continuous Current Mode
(CCM, VIN = 18V, VOUT = 12V)
Burst Mode Operation
(VIN = 6V, VOUT = 12V)
Burst Mode Operation
(VIN = 12V, VOUT = 12V)
Skip-Cycle Mode
(VIN = 18V, VOUT = 12V)
Discontinuous Current Mode
(DCM, VIN = 6V, VOUT = 12V)
Discontinuous Current Mode
(DCM, VIN = 12V, VOUT = 12V)
Discontinuous Current Mode
(DCM, VIN = 18V, VOUT = 12V)
Typical perForMance characTerisTics
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
5µs/DIVVIN = 6V
VOUT = 12V
3780 G10
IL
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
5µs/DIVVIN = 12V
VOUT = 12V
3780 G11
IL
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
5µs/DIVVIN = 18V
VOUT = 12V
3780 G12
IL
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
500mV/DIV
25µs/DIVVIN = 6V
VOUT = 12V
3780 G13
IL
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
200mV/DIV
10µs/DIVVIN = 12V
VOUT = 12V
3780 G14
IL
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
2.5µs/DIVVIN = 18V
VOUT = 12V
3780 G15
IL
1A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
5µs/DIVVIN = 6V
VOUT = 12V
3780 G16
IL
1A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
5µs/DIVVIN = 12V
VOUT = 12V
3780 G17
IL
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
2.5µs/DIVVIN = 18V
VOUT = 12V
3780 G18
IL
1A/DIV
TA = 25°C, unless otherwise noted.
LTC3780
8
3780ff
For more information www.linear.com/LTC3780
Oscillator Frequency
vs Temperature
Undervoltage Reset
vs Temperature
Minimum Current Sense
Threshold vs Duty Factor (Buck)
Maximum Current Sense
Threshold vs Duty Factor (Boost)
Maximum Current Sense
Threshold vs Duty Factor (Buck)
Minimum Current Sense
Threshold vs Temperature
Peak Current Threshold
vs VITH (Boost)
Valley Current Threshold
vs VITH (Buck) Current Foldback Limit
Typical perForMance characTerisTics
TEMPERATURE (°C)
–75 –50
0
FREQUENCY (kHz)
50
150
200
250
50
450
3780 G19
100
0
–25 75 100
25 125
300
350
400 VPLLFLTR = 2.4V
VPLLFLTR = 1.2V
VPLLFLTR = 0V
TEMPERATURE (°C)
–75 –50 –25
3.0
UNDERVOLTAGE RESET (V)
3.4
4.2
4.0
050 75
3780 G20
3.2
3.8
3.6
25 100 125
DUTY FACTOR (%)
–80
ISENSE+ (mV)
–60
–40
–20
80 60 40 20
3780 G21
0100
DUTY FACTOR (%)
0
ISENSE+ (mV)
140
160
80
3780 G22
120
100 20 40 60 100
180
DUTY FACTOR (%)
110
ISNESE
+
(mV)
120
130
140
20 40 60 80
3780 G23
1000
TEMPERATURE (°C)
–75 –50
50
100
200
25 75
3780 G24
0
–50
–25 0 50 100 125
–100
–150
150
MAXIMUM ISNESE
+
THRESHOLD (mV)
BOOST
BUCK
VITH (V)
0
–100
ISENSE
+
(mV)
–50
0
50
100
200
0.4 0.8 1.2 1.6
3780 G25
1.8 2.4
150
VITH (V)
0
–150
ISENSE
+
(mV)
–100
–50
0
50
100
0.4 0.8 1.2 1.6
3780 G26
2.0 2.4
VOSENSE (V)
0
0
ISENSE
+
(mV)
40
80
120
160
200
BUCK
BOOST
0.2 0.4 0.6
3780 G32
0.8
TA = 25°C, unless otherwise noted.
LTC3780
9
3780ff
For more information www.linear.com/LTC3780
Load Step Load Step Load Step
Line Transient Line Transient
Typical perForMance characTerisTics
VOUT
500mV/DIV
200µs/DIVVIN = 18V
VOUT = 12V
LOAD STEP: 0A TO 5A
CONTINUOUS MODE
3780 G27
IL
5A/DIV
VOUT
500mV/DIV
200µs/DIVVIN = 12V
VOUT = 12V
LOAD STEP: 0A TO 5A
CONTINUOUS MODE
3780 G28
IL
5A/DIV
VOUT
500mV/DIV
200µs/DIVVIN = 6V
VOUT = 12V
LOAD STEP: 0A TO 5A
CONTINUOUS MODE
3780 G29
IL
5A/DIV
VOUT
500mV/DIV
VIN
10V/DIV
500µs/DIVVOUT = 12V
ILOAD = 1A
VIN STEP: 7V TO 20V
CONTINUOUS MODE
3780 G30
IL
1A/DIV
VOUT
500mV/DIV
VIN
10V/DIV
500µs/DIVVOUT = 12V
ILOAD = 1A
VIN STEP: 20V TO 7V
CONTINUOUS MODE
3780 G31
IL
1A/DIV
TA = 25°C, unless otherwise noted.
LTC3780
10
3780ff
For more information www.linear.com/LTC3780
PGOOD (Pin 1/Pin 30): Open-Drain Logic Output. PGOOD
is pulled to ground when the output voltage is not within
±7.5% of the regulation point.
SS (Pin 2/Pin 31): Soft-start reduces the input power
sources’ surge currents by gradually increasing the
controller’s current limit. A minimum value of 6.8nF is
recommended on this pin.
SENSE+ (Pin 3/Pin 1): The (+) Input to the Current Sense
and Reverse Current Detect Comparators. The ITH pin volt-
age and built-in offsets between SENSE– and SENSE+ pins,
in conjunction with RSENSE, set the current trip threshold.
SENSE– (Pin 4/Pin 2): The (–) Input to the Current Sense
and Reverse Current Detect Comparators.
ITH (Pin 5/Pin 3): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V.
VOSENSE (Pin 6/Pin 4): Error Amplifier Feedback Input.
This pin connects the error amplifier input to an external
resistor divider from VOUT.
SGND (Pin 7/Pin 5, Exposed Pad Pin 33): Signal Ground. All
small-signal components and compensation components
should connect to this ground, which should be connected
to PGND at a single point. The QFN exposed pad must be
soldered to PCB ground for electrical connection and rated
thermal performance.
RUN (Pin 8/Pin 6): Run Control Input. Forcing the RUN
pin below 1.5V causes the IC to shut down the switching
regulator circuitry. There is a 100k resistor between the
RUN pin and SGND in the IC. Do not apply >6V to this pin.
FCB (Pin 9/Pin 7): Forced Continuous Control Input. The
voltage applied to this pin sets the operating mode of the
controller. When the applied voltage is less than 0.8V, the
forced continuous current mode is active. When this pin
is allowed to float, the Burst Mode operation is active in
boost operation and the skip-cycle mode is active in buck
operation. When the pin is tied to INTVCC, the constant
frequency discontinuous current mode is active in buck
or boost operation.
PLLFLTR (Pin 10/Pin 8): The phase-locked loop’s
lowpass filter is tied to this pin. Alternatively, this pin can
be driven with an AC or DC voltage source to vary the
frequency of the internal oscillator.
PLLIN (Pin 11/Pin 10): External Synchronization Input to
Phase Detector. This pin is internally terminated to SGND
with 50kΩ. The phase-locked loop will force the rising
bottom gate signal of the controller to be synchronized
with the rising edge of the PLLIN signal.
STBYMD (Pin 12/Pin 11): LDO Control Pin. Determines
whether the internal LDO remains active when the control-
ler is shut down. See Operation section for details. If the
STBYMD pin is pulled to ground, the SS pin is internally
pulled to ground, preventing start-up and thereby provid-
ing a single control pin for turning off the controller. To
keep the LDO active when RUN is low, for example to
power a “wake up” circuit which controls the state of the
RUN pin, bypass STBYMD to signal ground with a 0.1µF
capacitor, or use a resistor divider from VIN to keep the
pin within 2V to 5V.
BOOST2, BOOST1 (Pins 13, 24/Pins 14, 27): Boosted
Floating Driver Supply. The (+) terminal of the bootstrap
capacitor CA and CB (Figure 11) connects here. The BOOST2
pin swings from a diode voltage below INTVCC up to VIN
+ INTVCC. The BOOST1 pin swings from a diode voltage
below INTVCC up to VOUT + INTVCC.
TG2, TG1 (Pins 14, 23/Pins 15, 26): Top Gate Drive. Drives
the top N-channel MOSFET with a voltage swing equal to
INTVCC superimposed on the switch node voltage SW.
SW2, SW1 (Pins 15, 22/Pins 17, 24): Switch Node. The (–)
terminal of the bootstrap capacitor CA and CB (Figure 11)
connects here. The SW2 pin swings from a Schottky diode
(external) voltage drop below ground up to VIN. The SW1
pin swings from a Schottky diode (external) voltage drop
below ground up to VOUT.
pin FuncTions
(SSOP/QFN)
LTC3780
11
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pin FuncTions
(SSOP/QFN)
BG2, BG1 (Pins 16, 18/Pins 18, 20): Bottom Gate Drive.
Drives the gate of the bottom N-channel MOSFET between
ground and INTVCC.
PGND (Pin 17/Pin 19): Power Ground. Connect this pin
closely to the source of the bottom N-channel MOSFET, the
(–) terminal of CVCC and the (–) terminal of CIN (Figure 11).
INTVCC (Pin 19/Pin 21): Internal 6V Regulator Output. The
driver and control circuits are powered from this voltage.
Bypass this pin to ground with a minimum of 4.7µF low
ESR tantalum or ceramic capacitor.
EXTVCC (Pin 20/Pin 22): External VCC Input. When EXT-
VCC exceeds 5.7V, an internal switch connects this pin to
INTVCC and shuts down the internal regulator so that the
controller and gate drive power is drawn from EXTVCC. Do
not exceed 7V at this pin and ensure that EXTVCC < VIN.
VIN (Pin 21/Pin 23): Main Input Supply. Bypass this pin
to SGND with an RC filter (1Ω, 0.1µF).
LTC3780
12
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For more information www.linear.com/LTC3780
block DiagraM
–
+
–
+
BOOST2
INTV
CC
V
IN
TG2
BG2
BG1
RSENSE
PGND
FCB
FCB
INTVCC
INTVCC
INTVCC
ILIM
SW2
SW1
TG1
BOOST1
VOSENSE
ITH
VFB
0.86V
VOUT
0.80V
3780 BD
OV
EA
SHDN
RST
4(VFB)
RUN/
SS
BUCK
LOGIC
BOOST
LOGIC
SENSE+
SENSE–
–
+
IREV
–
+
ICMP
SLOPE
1.2V
4(VFB)
SS
1.2µA
100k
RUN
FCB
STBYMD
–
+
5.7V
6V
VIN
VIN
VREF
INTERNAL
SUPPLY
EXTVCC
INTVCC
SGND
+
6V
LDO
REG
–
+
–
+
–
+
CLK
0.86V
0.74V
VOSENSE
RLP
CLP
OSCILLATOR
PHASE DET
PLLFLTR
PLLIN
50k
FIN
PGOOD
LTC3780
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MAIN CONTROL LOOP
The LTC3780 is a current mode controller that provides an
output voltage above, equal to or below the input voltage.
The LTC proprietary topology and control architecture em-
ploys a current-sensing resistor in buck or boost modes.
The sensed inductor current is controlled by the voltage
on the ITH pin, which is the output of the amplifier EA. The
VOSENSE pin receives the voltage feedback signal, which
is compared to the internal reference voltage by the EA.
The top MOSFET drivers are biased from floating boost-
strap capacitors CA and CB (Figure 11), which are normally
recharged through an external diode when the top MOSFET
is turned off. Schottky diodes across the synchronous
switch D and synchronous switch B are not required, but
provide a lower drop during the dead time. The addition of
the Schottky diodes will typically improve peak efficiency
by 1% to 2% at 400kHz.
The main control loop is shut down by pulling the RUN
pin low. When the RUN pin voltage is higher than 1.5V, an
internal 1.2µA current source charges soft-start capacitor
CSS at the SS pin. The ITH voltage is then clamped to the
SS voltage while CSS is slowly charged during start-up.
This “soft-start” clamping prevents abrupt current from
being drawn from the input power supply.
POWER SWITCH CONTROL
Figure 1 shows a simplified diagram of how the four
power switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for the
LTC3780 as a function of duty cycle D. The power switches
are properly controlled so the transfer between modes is
continuous. When VIN approaches VOUT, the buck-boost
region is reached; the mode-to-mode transition time is
typically 200ns.
Buck Region (VIN > VOUT)
Switch D is always on and switch C is always off during
this mode. At the start of every cycle, synchronous switch
B is turned on first. Inductor current is sensed when
synchronous switch B is turned on. After the sensed in-
ductor current falls below the reference voltage, which is
proportional to VITH, synchronous switch B is turned off
and switch A is turned on for the remainder of the cycle.
switches A and B will alternate, behaving like a typical
synchronous buck regulator. The duty cycle of switch A
increases until the maximum duty cycle of the converter
in buck mode reaches DMAX_BUCK, given by:
DMAX_BUCK = 100% – DBUCK-BOOST
where DBUCK-BOOST = duty cycle of the buck-boost switch
range:
DBUCK-BOOST = (200ns • f) • 100%
and f is the operating frequency in Hz.
Figure 3 shows typical buck mode waveforms. If VIN
approaches VOUT, the buck-boost region is reached.
Buck-Boost (VIN @ VOUT)
When VIN is close to VOUT
, the controller is in buck-boost
mode. Figure 4 shows typical waveforms in this mode.
Every cycle, if the controller starts with switches B and D
turned on, switches A and C are then turned on. Finally,
switches A and D are turned on for the remainder of the
time. If the controller starts with switches A and C turned
TG2
BG2
TG1
BG1
RSENSE
3780 F01
A
B
D
C
L
SW2 SW1
VIN VOUT
A ON, B OFF
PWM C, D SWITCHES
D ON, C OFF
PWM A, B SWITCHES
FOUR SWITCH PWM
98%
DMAX
BOOST
3%
DMIN
BUCK
DMIN
BOOST
DMAX
BUCK
BOOST REGION
BUCK REGION
BUCK/BOOST REGION
3780 F02
Figure 1. Simplified Diagram of the Output Switches
Figure 2. Operating Mode vs Duty Cycle
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on, switches B and D are then turned on. Finally, switches
A and D are turned on for the remainder of the time.
Boost Region (VIN < VOUT)
Switch A is always on and synchronous switch B is always
off in boost mode. Every cycle, switch C is turned on first.
Inductor current is sensed when switch C is turned on.
After the sensed inductor current exceeds the reference
voltage which is proportional to VITH, switch C is turned off
and synchronous switch D is turned on for the remainder
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
IL
0V
HIGH
3780 F03
Figure 3. Buck Mode (VIN > VOUT)
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
IL
3780 F04a
(4a) Buck-Boost Mode (VIN ≥ VOUT)
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
IL3780 F04b
(4b) Buck-Boost Mode (VIN ≤ VOUT)
Figure 4. Buck-Boost Mode
of the cycle. switches C and D will alternate, behaving like
a typical synchronous boost regulator.
The duty cycle of switch C decreases until the minimum duty
cycle of the converter in boost mode reaches DMIN_BOOST,
given by:
DMIN_BOOST = DBUCK-BOOST
where DBUCK-BOOST is the duty cycle of the buck-boost
switch range:
DBUCK-BOOST = (200ns • f) • 100%
and f is the operating frequency in Hz.
Figure 5 shows typical boost mode waveforms. If VIN ap-
proaches VOUT, the buck-boost region is reached.
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
IL
0V
HIGH
3780 F05
Figure 5. Boost Mode (VIN < VOUT)
LOW CURRENT OPERATION
The FCB pin is used to select among three modes for both
buck and boost operations by accepting a logic input.
Figure 6 shows the different modes.
FCB PIN BUCK MODE BOOST MODE
0V to 0.75V Force Continuous Mode Force Continuous Mode
0.85V to 5V Skip-Cycle Mode Burst Mode Operation
>5.3V DCM with Constant Freq DCM with Constant Freq
Figure 6. Different Operating Modes
When the FCB pin voltage is lower than 0.8V, the controller
behaves as a continuous, PWM current mode synchronous
switching regulator. In boost mode, switch A is always on.
switch C and synchronous switch D are alternately turned
on to maintain the output voltage independent of direction
of inductor current. Every ten cycles, switch A is forced off
for about 300ns to allow boost capacitor CA (Figure 13) to
recharge. In buck mode, synchronous switch D is always
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on. switch A and synchronous switch B are alternately
turned on to maintain the output voltage independent of
direction of inductor current. Every ten cycles, synchro-
nous switch D is forced off for about 300ns to allow CB
to recharge. This is the least efficient operating mode at
light load, but may be desirable in certain applications. In
this mode, the output can source or sink current.
When the FCB pin voltage is below VINTVCC – 1V, but greater
than 0.8V, the controller enters Burst Mode operation in
boost operation or enters skip-cycle mode in buck opera-
tion. During boost operation, Burst Mode operation sets a
minimum output current level before inhibiting the switch
C and turns off synchronous switch D when the inductor
current goes negative. This combination of requirements
will, at low currents, force the ITH pin below a voltage
threshold that will temporarily inhibit turn-on of power
switches C and D until the output voltage drops. There is
100mV of hysteresis in the burst comparator tied to the
ITH pin. This hysteresis produces output signals to the
MOSFETs C and D that turn them on for several cycles,
followed by a variable “sleep” interval depending upon the
load current. The maximum output voltage ripple is limited
to 3% of the nominal DC output voltage as determined
by a resistive feedback divider. During buck operation at
no load, switch A is turned on for its minimum on-time.
This will not occur every clock cycle when the output load
current drops below 1% of the maximum designed load.
The body diode of synchronous switch B or the Schottky
diode, which is in parallel with switch B, is used to dis-
charge the inductor current; switch B only turns on every
ten clock cycles to allow CB to recharge. As load current
is applied, switch A turns on every cycle, and its on-time
begins to increase. At higher current, switch B turns on
briefly after each turn-off of switch A. switches C and D
remain off at light load, except to refresh CA (Figure 11)
every 10 clock cycles. In Burst Mode operation/skip-cycle
mode, the output is prevented from sinking current.
When the FCB pin voltage is tied to the INTVCC pin, the
controller enters constant frequency discontinuous current
mode (DCM). For boost operation, synchronous switch D
is held off whenever the ITH pin is below a threshold volt-
age. In every cycle, switch C is used to charge inductor
current. After the output voltage is high enough, the
controller will enter continuous current buck mode for
one cycle to discharge inductor current. In the following
cycle, the controller will resume DCM boost operation. For
buck operation, constant frequency discontinuous current
mode sets a minimum negative inductor current level.
synchronous switch B is turned off whenever inductor
current is lower than this level. At very light loads, this
constant frequency operation is not as efficient as Burst
Mode operation or skip-cycle, but does provide lower
noise, constant frequency operation.
FREQUENCY SYNCHRONIZATION AND
FREQUENCY SETUP
The phase-locked loop allows the internal oscillator to be
synchronized to an external source via the PLLIN pin. The
phase detector output at the PLLFLTR pin is also the DC
frequency control input of the oscillator. The frequency
ranges from 200kHz to 400kHz, corresponding to a DC
voltage input from 0V to 2.4V at PLLFLTR. When locked,
the PLL aligns the turn on of the top MOSFET to the ris-
ing edge of the synchronizing signal. When PLLIN is left
open, the PLLFLTR pin goes low, forcing the oscillator to
its minimum frequency.
INTVCC/EXTVCC Power
Power for all power MOSFET drivers and most inter-
nal circuitry is derived from the INTVCC pin. When the
EXTVCC pin is left open, an internal 6V low dropout linear
regulator supplies INTVCC power. If EXTVCC is taken above
5.7V, the 6V regulator is turned off and an internal switch
is turned on, connecting EXTVCC to INTVCC. This allows
the INTVCC power to be derived from a high efficiency
external source.
POWER GOOD (PGOOD) PIN
The PGOOD pin is connected to an open drain of an internal
MOSFET. The MOSFET turns on and pulls the pin low when
the output is not within ±7.5% of the nominal output level
as determined by the resistive feedback divider. When
the output meets the ±7.5% requirement, the MOSFET
is turned off and the pin is allowed to be pulled up by an
external resistor to a source of up to 7V.
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FOLDBACK CURRENT
Foldback current limiting is activated when the output
voltage falls below 70% of its nominal level, reducing
power waste. During start-up, foldback current limiting
is disabled.
INPUT UNDERVOLTAGE RESET
The SS capacitor will be reset if the input voltage is al-
lowed to fall below approximately 4V. The SS capacitor
will attempt to charge through a normal soft-start ramp
after the input voltage rises above 4V.
OUTPUT OVERVOLTAGE PROTECTION
An overvoltage comparator guards against transient over-
shoots (>7.5%) as well as other more serious conditions
that may overvoltage the output. In this case, synchronous
switch B and synchronous switch D are turned on until the
overvoltage condition is cleared or the maximum negative
current limit is reached. When inductor current is lower
than the maximum negative current limit, synchronous
switch B and synchronous switch D are turned off, and
switch A and switch C are turned on until the inductor
current reaches another negative current limit. If the
comparator still detects an overvoltage condition, switch
A and switch C are turned off, and synchronous switch B
and synchronous switch D are turned on again.
SHORT-CIRCUIT PROTECTION AND CURRENT LIMIT
Switch A on-time is limited by output voltage. When output
voltage is reduced and is lower than its nominal level,
switch A on-time will be reduced.
In every boost mode cycle, current is limited by a voltage
reference, which is proportional to the ITH pin voltage. The
maximum sensed current is limited to 160mV. In every
buck mode cycle, the maximum sensed current is limited
to 130mV.
STANDBY MODE PIN
The STBYMD pin is a three-state input that controls circuitry
within the IC as follows: When the STBYMD pin is held at
ground, the SS pin is pulled to ground. When the pin is
left open, the internal SS current source charges the SS
capacitor, allowing turn-on of the controller and activat-
ing necessary internal biasing. When the STBYMD pin is
taken above 2V, the internal linear regulator is turned on
independent of the state on the RUN and SS pins, providing
an output power source for “wake-up” circuitry. Bypass
the pin with a small capacitor (0.1µF) to ground if the pin
is not connected to a DC potential.
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Figure 11 is a basic LTC3780 application circuit. External
component selection is driven by the load requirement,
and begins with the selection of RSENSE and the inductor
value. Next, the power MOSFETs are selected. Finally, CIN
and COUT are selected. This circuit can be configured for
operation up to an input voltage of 36V.
Selection of Operation Frequency
The LTC3780 uses a constant frequency architecture and
has an internal voltage controlled oscillator. The switching
frequency is determined by the internal oscillator capacitor.
This internal capacitor is charged by a fixed current plus
an additional current that is proportional to the voltage
applied to the PLLFLTR pin. The frequency of this oscillator
can be varied over a 2-to-1 range. The PLLFLTR pin can
be grounded to lower the frequency to 200kHz or tied to
2.4V to yield approximately 400kHz. When PLLIN is left
open, the PLLFLTR pin goes low, forcing the oscillator to
minimum frequency.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 7. As the operating frequency
is increased the gate charge losses will be higher, reducing
efficiency. The maximum switching frequency is approxi-
mately 400kHz.
Inductor Selection
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use of
smaller inductor and capacitor values. The inductor value
has a direct effect on ripple current. The inductor current
ripple ∆IL is typically set to 20% to 40% of the maximum
inductor current at boost mode VIN(MIN). For a given ripple
the inductance terms in continuous mode are as follows:
LVVV
I
BOOST
IN MIN OUT IN MIN
OUT
>
()
() ()
(
•– •
•
2100
ƒMMAXOUT
BUCK
OUT IN MAXO
RippleV H
L
VV V
)
()
•% •,
•–
2
>UUT
OUT MAXINMAX
IRippleV H
()
•
••%•
() ()
100
ƒ
where:
f is operating frequency, Hz
% Ripple is allowable inductor current ripple, %
VIN(MIN) is minimum input voltage, V
VIN(MAX) is maximum input voltage, V
VOUT is output voltage, V
IOUT(MAX) is maximum output load current
For high efficiency, choose an inductor with low core
loss, such as ferrite and molypermalloy (from Magnetics,
Inc.). Also, the inductor should have low DC resistance to
reduce the I2R losses, and must be able to handle the peak
inductor current without saturation. To minimize radiated
noise, use a toroid, pot core or shielded bobbin inductor.
RSENSE Selection and Maximum Output Current
RSENSE is chosen based on the required output current.
The current comparator threshold sets the peak of the
inductor current in boost mode and the maximum inductor
valley current in buck mode. In boost mode, the maximum
average load current at VIN(MIN) is:
ImV
R
I
V
OUT MAXBOOST
SENSE
LIN
(, )
(
–•=
160
2
∆MMIN
OUT
V
)
PLLFLTR PIN VOLTAGE (V)
0
0
OPERATING FREQUENCY (kHz)
50
150
200
250
122.5
450
3780 F07
100
0.5 1.5
300
350
400
Figure 7. Frequency vs PLLFLTR Pin Voltage
LTC3780
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where ∆IL is peak-to-peak inductor ripple current. In buck
mode, the maximum average load current is:
I
OUT(MAX,BUCK) =
130mV
R
SENSE
+
∆IL
2
Figure 8 shows how the load current (IMAXLOAD • RSENSE)
varies with input and output voltage
The maximum current sensing RSENSE value for the boost
mode is:
R
SENSE(MAX)
=
2•160mV •VIN(MIN)
2•IOUT(MAX,BOOST) •VOUT + ∆IL,BOOST •VIN(MIN)
The maximum current sensing RSENSE value for the buck
mode is:
RSENSE(MAX) =
2•130mV
2•I
OUT(MAX,BUCK)
–∆I
L,BUCK
The final RSENSE value should be lower than the calculated
RSENSE(MAX) in both the boost and buck modes. A 20% to
30% margin is usually recommended.
CIN and COUT Selection
In boost mode, input current is continuous. In buck mode,
input current is discontinuous. In buck mode, the selection
of input capacitor CIN is driven by the need to filter the
input square wave current. Use a low ESR capacitor sized
to handle the maximum RMS current. For buck operation,
the input RMS current is given by:
IRMS ≈IOUT(MAX) •VOUT
VIN
•VIN
VOUT
– 1
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT(MAX)/2. This simple worst-case condition
is commonly used for design because even significant
deviations do not offer much relief. Note that ripple cur-
rent ratings from capacitor manufacturers are often based
on only 2000 hours of life which makes it advisable to
derate the capacitor.
In boost mode, the discontinuous current shifts from the
input to the output, so COUT must be capable of reducing
the output voltage ripple. The effects of ESR (equivalent
series resistance) and the bulk capacitance must be
considered when choosing the right capacitor for a given
output ripple voltage. The steady ripple due to charging
and discharging the bulk capacitance is given by:
Ripple (Boost,Cap) = IOUT(MAX) •VOUT – V
IN(MIN)
(
)
C
OUT
•V
OUT
•fV
Ripple (Buck,Cap) = IOUT(MAX) •VIN(MAX) – VOUT
(
)
COUT •VIN(MAX) •fV
where COUT is the output filter capacitor.
The steady ripple due to the voltage drop across the ESR
is given by:
∆VBOOST,ESR = IL(MAX,BOOST) • ESR
∆VBUCK,ESR = IL(MAX,BUCK) • ESR
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Ceramic capacitors have excellent low ESR
characteristics but can have a high voltage coefficient.
Capacitors are now available with low ESR and high ripple
current ratings, such as OS-CON and POSCAP.
VIN/VOUT (V)
0.1
100
IMAX(LOAD) • RSENSE (mV)
110
120
130
140
160
1 10
3780 F08
150
Figure 8. Load Current vs VIN/VOUT
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Power MOSFET Selection and
Efficiency Considerations
The LTC3780 requires four external N-channel power MOS-
FETs, two for the top switches (switch A and D, shown in
Figure 1) and two for the bottom switches (switch B and C
shown in Figure 1). Important parameters for the power
MOSFETs are the breakdown voltage VBR,DSS, threshold
voltage VGS,TH, on-resistance RDS(ON), reverse transfer
capacitance CRSS and maximum current IDS(MAX).
The drive voltage is set by the 6V INTVCC supply. Con-
sequently, logic-level threshold MOSFETs must be used
in LTC3780 applications. If the input voltage is expected
to drop below 5V, then the sub-logic threshold MOSFETs
should be considered.
In order to select the power MOSFETs, the power dis-
sipated by the device must be known. For switch A, the
maximum power dissipation happens in boost mode, when
it remains on all the time. Its maximum power dissipation
at maximum output current is given by:
PV
V
IR
A BOOST OUT
IN
OUT MAX TDSON,(
)(
)
•••=
2
ρ
where ρT is a normalization factor (unity at 25°C) ac-
counting for the significant variation in on-resistance with
temperature, typically about 0.4%/°C as shown in Figure 9.
For a maximum junction temperature of 125°C, using a
value ρT = 1.5 is reasonable.
Switch B operates in buck mode as the synchronous
rectifier. Its power dissipation at maximum output current
is given by:
P
VV
V
IR
BBUCK IN OUT
IN
OUT MAX TDSON
,()(
)
–
•••=2ρ
Switch C operates in boost mode as the control switch.
Its power dissipation at maximum current is given by:
P
VVV
V
IR
kV I
VCf
CBOOST OUT IN OUT
IN
OUT MAX TDSON
OUT OUT MAX
IN
RSS
,()(
)
()
–•••
•• ••
=
()
+
2
2
3
ρ
where CRSS is usually specified by the MOSFET manufactur-
ers. The constant k, which accounts for the loss caused
by reverse recovery current, is inversely proportional to
the gate drive current and has an empirical value of 1.7.
For switch D, the maximum power dissipation happens in
boost mode, when its duty cycle is higher than 50%. Its
maximum power dissipation at maximum output current
is given by:
P
V
V
V
VI
DBOOSTIN
OUT
OUT
IN
OUT MAX
,(
)
•• •=
2
ρTTDSON
R•
()
For the same output voltage and current, switch A has the
highest power dissipation and switch B has the lowest
power dissipation unless a short occurs at the output.
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
TJ = TA + P • RTH(JA)
The RTH(JA) to be used in the equation normally includes
the RTH(JC) for the device plus the thermal resistance from
the case to the ambient temperature (RTH(JC)). This value
of TJ can then be compared to the original, assumed value
used in the iterative calculation process.
JUNCTION TEMPERATURE (°C)
–50
ρ
T
NORMALIZED ON-RESISTANCE (Ω)
1.0
1.5
150
3780 F09
0.5
0050 100
2.0
Figure 9. Normalized RDS(ON) vs Temperature
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Schottky Diode (D1, D2) Selection
and Light Load Operation
The Schottky diodes D1 and D2 shown in Figure 13 conduct
during the dead time between the conduction of the power
MOSFET switches. They are intended to prevent the body
diode of synchronous switches B and D from turning on
and storing charge during the dead time. In particular, D2
significantly reduces reverse recovery current between
switch D turn-off and switch C turn-on, which improves
converter efficiency and reduces switch C voltage stress. In
order for the diode to be effective, the inductance between it
and the synchronous switch must be as small as possible,
mandating that these components be placed adjacently.
In buck mode, when the FCB pin voltage is 0.85 < VFCB
< 5V, the converter operates in skip-cycle mode. In this
mode, synchronous switch B remains off until the induc-
tor peak current exceeds one-fifth of its maximum peak
current. As a result, D1 should be rated for about one-half
to one-third of the full load current.
In boost mode, when the FCB pin voltage is higher than
5.3V, the converter operates in discontinuous current mode.
In this mode, synchronous switch D remains off until the
inductor peak current exceeds one-fifth of its maximum
peak current. As a result, D2 should be rated for about
one-third to one-fourth of the full load current.
In buck mode, when the FCB pin voltage is higher than 5.3V,
the converter operates in constant frequency discontinu-
ous current mode. In this mode, synchronous switch B
remains on until the inductor valley current is lower than
the sense voltage representing the minimum negative
inductor current level (VSENSE = –5mV). Both switch A
and B are off until next clock signal.
In boost mode, when the FCB pin voltage is 0.85 < VFCB
< 5.3V, the converter operates in Burst Mode operation.
In this mode, the controller clamps the peak inductor
current to approximately 20% of the maximum inductor
current. The output voltage ripple can increase during
Burst Mode operation.
INTVCC Regulator
An internal P-channel low dropout regulator produces 6V
at the INTVCC pin from the VIN supply pin. INTVCC powers
the drivers and internal circuitry within the LTC3780. The
INTVCC pin regulator can supply a peak current of 40mA
and must be bypassed to ground with a minimum of 4.7µF
tantalum, 10µF special polymer or low ESR type electrolytic
capacitor. A 1µF ceramic capacitor placed directly adjacent
to the INTVCC and PGND IC pins is highly recommended.
Good bypassing is necessary to supply the high transient
current required by MOSFET gate drivers.
Higher input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3780 to be
exceeded. The system supply current is normally dominated
by the gate charge current. Additional external loading of
the INTVCC also needs to be taken into account for the
power dissipation calculations. The total INTVCC current
can be supplied by either the 6V internal linear regulator
or by the EXTVCC input pin. When the voltage applied to
the EXTVCC pin is less than 5.7V, all of the INTVCC current
is supplied by the internal 6V linear regulator. Power dis-
sipation for the IC in this case is VIN • IINTVCC, and overall
efficiency is lowered. The junction temperature can be
estimated by using the equations given in Note 2 of the
Electrical Characteristics. For example, a typical applica-
tion operating in continuous current mode might draw
24mA from a 24V supply when not using the EXTVCC pin:
TJ = 70°C + 24mA • 24V • 34°C/W = 90°C
Use of the EXTVCC input pin reduces the junction tem-
perature to:
TJ = 70°C + 24mA • 6V • 34°C/W = 75°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked op-
erating in continuous mode at maximum VIN.
LTC3780
21
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EXTVCC Connection
The LTC3780 contains an internal P-channel MOSFET
switch connected between the EXTVCC and INTVCC pins.
When the voltage applied to EXTVCC rises above 5.7V, the
internal regulator is turned off and a switch connects the
EXTVCC pin to the INTVCC pin thereby supplying internal
power. The switch remains closed as long as the voltage
applied to EXTVCC remains above 5.5V. This allows the
MOSFET driver and control power to be derived from the
output when (5.7V < VOUT < 7V) and from the internal
regulator when the output is out of regulation (start-up,
short-circuit). If more current is required through the
EXTVCC switch than is specified, an external Schottky
diode can be interposed between the EXTVCC and INTVCC
pins. Ensure that EXTVCC ≤ VIN.
The following list summarizes the three possible connec-
tions for EXTVCC:
1. EXTVCC left open (or grounded). This will cause INTVCC
to be powered from the internal 6V regulator at the cost
of a small efficiency penalty.
2. EXTVCC connected directly to VOUT (5.7V < VOUT < 7V).
This is the normal connection for a 6V regulator and
provides the highest efficiency.
3. EXTVCC connected to an external supply. If an external
supply is available in the 5.5V to 7V range, it may be
used to power EXTVCC provided it is compatible with
the MOSFET gate drive requirements.
Output Voltage
The LTC3780 output voltage is set by an external feedback
resistive divider carefully placed across the output capacitor.
The resultant feedback signal is compared with the internal
precision 0.800V voltage reference by the error amplifier.
The output voltage is given by the equation:
VV
R
R
OUT
=+
08 1
2
1
.•
Topside MOSFET Driver Supply (CA, DA, CB, DB)
Referring to Figure 11, the external bootstrap capacitors
CA and CB connected to the BOOST1 and BOOST2 pins
supply the gate drive voltage for the topside MOSFET
switches A and D. When the top MOSFET switch A turns
on, the switch node SW2 rises to VIN and the BOOST2
pin rises to approximately VIN + INTVCC. When the bottom
MOSFET switch B turns on, the switch node SW2 drops
to low and the boost capacitor CB is charged through DB
from INTVCC. When the top MOSFET switch D turns on,
the switch node SW1 rises to VOUT and the BOOST1 pin
rises to approximately VOUT + INTVCC. When the bottom
MOSFET switch C turns on, the switch node SW1 drops
to low and the boost capacitor CA is charged through DA
from INTVCC. The boost capacitors CA and CB need to
store about 100 times the gate charge required by the top
MOSFET switch A and D. In most applications a 0.1µF to
0.47µF, X5R or X7R dielectric capacitor is adequate.
Run Function
The RUN pin provides simple ON/OFF control for the
LTC3780. Driving the RUN pin above 1.5V permits the
controller to start operating. Pulling RUN below 1.5V puts
the LTC3780 into low current shutdown. Do not apply more
than 6V to the RUN pin.
Soft-Start Function
Soft-start reduces the input power sources’ surge cur-
rents by gradually increasing the controller’s current
limit (proportional to an internally buffered and clamped
equivalent of VITH).
An internal 1.2µA current source charges up the CSS ca-
pacitor. As the voltage on SS increases from 0V to 2.4V,
the internal current limit rises from 0V/RSENSE to 150mV/
RSENSE. The output current limit ramps up slowly, taking
1.5s/µF to reach full current. The output current thus ramps
up slowly, eliminating the starting surge current required
from the input power supply.
T
IRMP =
2.4V
1.2µA •CSS = 1.5s/µF
(
)
•CSS
Do not apply more than 6V to the SS pin.
Current foldback is disabled during soft-start until the
voltage on CSS reaches 2V. Make sure CSS is large enough
when there is loading during start-up.
LTC3780
22
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The Standby Mode (STBYMD) Pin Function
The standby mode (STBYMD) pin provides several choices
for start-up and standby operational modes. If the pin is
pulled to ground, the SS pin is internally pulled to ground,
preventing start-up and thereby providing a single control
pin for turning off the controller. If the pin is left open or
bypassed to ground with a capacitor, the SS pin is internally
provided with a starting current, permitting external control
for turning on the controller. If the pin is connected to a
voltage greater than 1.25V, the internal regulator (INTVCC)
will be on even when the controller is shut down (RUN
pin voltage < 1.5V). In this mode, the onboard 6V linear
regulator can provide power to keep-alive functions such
as a keyboard controller.
Fault Conditions: Current Limit and Current Foldback
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage.
In boost mode, maximum sense voltage and the sense
resistance determines the maximum allowed inductor
peak current, which is:
IL(MAX,BOOST) =
160mV
R
SENSE
In buck mode, maximum sense voltage and the sense
resistance determines the maximum allowed inductor
valley current, which is:
IL(MAX,BUCK) =
130mV
R
SENSE
To further limit current in the event of a short circuit to
ground, the LTC3780 includes foldback current limiting.
If the output falls by more than 30%, then the maximum
sense voltage is progressively lowered to about one third
of its full value.
Fault Conditions: Overvoltage Protection
A comparator monitors the output for overvoltage con-
ditions. The comparator (OV) detects overvoltage faults
greater than 7.5% above the nominal output voltage. When
the condition is sensed, switches A and C are turned off,
and switches B and D are turned on until the overvoltage
condition is cleared. During an overvoltage condition, a
negative current limit (VSENSE = –60mV) is set to limit
negative inductor current. When the sensed current in-
ductor current is lower than –60mV, switch A and C are
turned on, and switch B and D are turned off until the
sensed current is higher than –20mV. If the output is still
in overvoltage condition, switch A and C are turned off,
and switch B and D are turned on again.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in circuit produce losses, four main sources
account for most of the losses in LTC3780 circuits:
1. DC I2R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board
traces and cause the efficiency to drop at high output
currents.
2. Transition loss. This loss arises from the brief amount
of time switch A or switch C spends in the saturated
region during switch node transitions. It depends upon
the input voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss
is significant at input voltages above 20V and can be
estimated from:
Transition Loss ≈ 1.7A–1 • VIN2 • IOUT • CRSS • f
where CRSS is the reverse transfer capacitance.
LTC3780
23
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3. INTVCC current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by sup-
plying INTVCC current through the EXTVCC pin from a
high efficiency source, such as an output derived boost
network or alternate supply if available.
4. CIN and COUT loss. The input capacitor has the difficult
job of filtering the large RMS input current to the regula-
tor in buck mode. The output capacitor has the more
difficult job of filtering the large RMS output current in
boost mode. Both CIN and COUT are required to have
low ESR to minimize the AC I2R loss and sufficient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
5. Other losses. Schottky diode D1 and D2 are respon-
sible for conduction losses during dead time and light
load conduction periods. Inductor core loss occurs
predominately at light loads. Switch C causes reverse
recovery current loss in boost mode.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Design Example
As a design example, assume VIN = 5V to 18V (12V nomi-
nal), VOUT = 12V (5%), IOUT(MAX) = 5A and f = 400kHz.
Set the PLLFLTR pin at 2.4V for 400kHz operation. The
inductance value is chosen first based on a 30% ripple
current assumption. In buck mode, the ripple current is:
∆=
I
V
fL
V
V
LBUCKOUT OUT
IN
,•
•–1
IRIPPLE,BUCK =
∆I
L,BUCK
•100
IOUT
%
The highest value of ripple current occurs at the maximum
input voltage. In boost mode, the ripple current is:
∆=
I
V
fL
V
V
L BOOST IN IN
OUT
,•
•–1
IRIPPLE,BOOST =
∆I
L,BOOST
•100
I
IN
%
The highest value of ripple current occurs at VIN = VOUT/2.
A 6.8µH inductor will produce 11% ripple in boost mode
(VIN = 6V) and 29% ripple in buck mode (VIN = 18V).
The RSENSE resistor value can be calculated by using the
maximum current sense voltage specification with some
accommodation for tolerances.
R
SENSE =
2•160mV •V
IN(MIN)
2•IOUT(MAX,BOOST) •VOUT + ∆IL,BOOST •VIN(MIN)
Select an RSENSE of 10mΩ.
Output voltage is 12V. Select R1 as 20k. R2 is:
R2 =
V
OUT
•R1
0.8
– R1
Select R2 as 280k. Both R1 and R2 should have a toler-
ance of no more than 1%.
Next, choose the MOSFET switches. A suitable choice is
the Siliconix Si4840 (RDS(ON) = 0.009Ω (at VGS = 6V),
CRSS = 150pF, θJA = 40°C/W).
The maximum power dissipation of switch A occurs in
boost mode when switch A stays on all the time. Assum-
ing a junction temperature of TJ = 150°C with ρ150°C =
1.5, the power dissipation at VIN = 5V is:
PW
ABOOST, ••.•..=
=
12
5
5150009 194
2
LTC3780
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Double-check the TJ in the MOSFET with 70°C ambient
temperature:
TJ = 70°C + 1.94W • 40°C/W = 147.6°C
The maximum power dissipation of switch B occurs in
buck mode. Assuming a junction temperature of TJ = 80°C
with ρ80°C = 1.2, the power dissipation at VIN = 18V is:
PB,BUCK =
18 –12
18
•52•1.2•0.009 = 90mW
Double-check the TJ in the MOSFET at 70°C ambient
temperature:
TJ = 70°C + 0.09W • 40°C/W = 73.6°C
The maximum power dissipation of switch C occurs in boost
mode. Assuming a junction temperature of TJ = 110°C with
ρ110°C = 1.4, the power dissipation at VIN = 5V is:
PC,BOOST =
12– 5
(
)
•12
52•52•1.4•0.009
+2•123•5
5
•150p •400k =1.27W
Double-check the TJ in the MOSFET at 70°C ambient
temperature:
TJ = 70°C + 1.08W • 40°C/W = 113°C
The maximum power dissipation of switch D occurs
in boost mode when its duty cycle is higher than 50%.
Assuming a junction temperature of TJ = 100°C with
ρ100°C = 1.35, the power dissipation at VIN = 5V is:
PW
DBOOST, •••. •. .=
=
5
12
12
5
5135 0 009 073
2
Double-check the TJ in the MOSFET at 70°C ambient
temperature:
TJ = 70°C + 0.73W • 40°C/W = 99°C
CIN is chosen to filter the square current in buck mode. In
this mode, the maximum input current peak is:
IA
IN PEAK MAXBUCK,(,)
•
%
.=+
=51
29
2
57
A low ESR (10mΩ) capacitor is selected. Input voltage
ripple is 57mV (assuming ESR dominate ripple).
COUT is chosen to filter the square current in boost mode.
In this mode, the maximum output current peak is:
IOUT PEAK MAXBOOST,(,)••
%
.=+
=
12
5
51
11
2
10 6
6A
A low ESR (5mΩ) capacitor is suggested. This capacitor
will limit output voltage ripple to 53mV (assuming ESR
dominate ripple).
PC Board Layout Checklist
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
•
Place CIN, switch A, switch B and D1 in one com-
pact area. Place COUT, switch C, switch D and D2 in
one compact area. One layout example is shown in
Figure 10.
GND
VOUT
COUT
L
RSENSE
3780 F10
QD
QCQB
QA
SW2 SW1
D1
D2
VIN
CIN
LTC3780
CKT
Figure 10. Switches Layout
LTC3780
25
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applicaTions inForMaTion
• Use immediate vias to connect the components (includ-
ing the LTC3780’s SGND and PGND pins) to the ground
plane. Use several large vias for each power component.
• Use planes for VIN and VOUT to maintain good voltage
filtering and to keep power losses low.
• Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. Connect the copper areas to any DC net
(VIN or GND).
• Segregate the signal and power grounds. All small-
signal components should return to the SGND pin at
one point, which is then tied to the PGND pin close to
the sources of switch B and switch C.
• Place switch B and switch C as close to the controller as
possible, keeping the PGND, BG and SW traces short.
• Keep the high dV/dT SW1, SW2, BOOST1, BOOST2,
TG1 and TG2 nodes away from sensitive small-signal
nodes.
• The path formed by switch A, switch B, D1 and the CIN
capacitor should have short leads and PC trace lengths.
The path formed by switch C, switch D, D2 and the
COUT capacitor also should have short leads and PC
trace lengths.
• The output capacitor (–) terminals should be connected
as close as possible the (–) terminals of the input
capacitor.
• Connect the top driver boost capacitor CA closely to the
BOOST1 and SW1 pins. Connect the top driver boost
capacitor CB closely to the BOOST2 and SW2 pins.
• Connect the input capacitors CIN and output capacitors
COUT closely to the power MOSFETs. These capacitors
carry the MOSFET AC current in boost and buck mode.
• Connect VOSENSE pin resistive dividers to the (+) termi-
nals of COUT and signal ground. A small VOSENSE bypass
capacitor may be connected closely to the LTC3780 SGND
pin. The R2 connection should not be along the high
current or noise paths, such as the input capacitors.
• Route SENSE– and SENSE+ leads together with minimum
PC trace spacing. Avoid sense lines pass through noisy
area, such as switch nodes. The filter capacitor between
SENSE+ and SENSE– should be as close as possible
to the IC. Ensure accurate current sensing with Kelvin
connections at the SENSE resistor. One layout example
is shown in Figure 12.
• Connect the ITH pin compensation network close to the
IC, between ITH and the signal ground pins. The capaci-
tor helps to filter the effects of PCB noise and output
voltage ripple voltage from the compensation loop.
• Connect the INTVCC bypass capacitor, CVCC, close to the
IC, between the INTVCC and the power ground pins. This
capacitor carries the MOSFET drivers’ current peaks.
An additional 1µF ceramic capacitor placed immediately
next to the INTVCC and PGND pins can help improve
noise performance substantially.
LTC3780
26
3780ff
For more information www.linear.com/LTC3780
applicaTions inForMaTion
LTC3780 DA
CF
COUT
VOUT
VIN
fIN
CC1
CC2
CSS
CIN
3780 F11
CA
VPULLUP
CB
B
D
C
L
D1
A
CVCC
RSENSE
DB
RIN
PGOOD
SS
SENSE+
BOOST1
TG1
SW1
VIN
EXTVCC
INTVCC
BG1
PGND
BG2
SW2
TG2
BOOST2
1
2
3
ITH
VOSENSE
SGND
RUN
FCB
PLLFLTR
PLLIN
STBYMD
5
6
7
8
9
10
11
12
SENSE–
4
R R
C
24
23
22
21
20
19
18
17
16
15
14
13
R1 R2
RC
RPU
D2
Figure 11. LTC3780 Layout Diagram
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SGND
PGND
RSENSE
C
RR
3780 F12
Figure 12. Sense Lines Layout
LTC3780
27
3780ff
For more information www.linear.com/LTC3780
G Package
24-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
G24 SSOP 0204
0.09 – 0.25
(.0035 – .010)
0° – 8°
0.55 – 0.95
(.022 – .037)
5.00 – 5.60**
(.197 – .221)
7.40 – 8.20
(.291 – .323)
1 2 3 4 5678 9 10 11 12
7.90 – 8.50*
(.311 – .335)
2122 18 17 16 15 14 13
19202324
2.0
(.079)
MAX
0.05
(.002)
MIN
0.65
(.0256)
BSC 0.22 – 0.38
(.009 – .015)
TYP
MILLIMETERS
(INCHES)
DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
*
**
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
0.42 ±0.03 0.65 BSC
5.3 – 5.7
7.8 – 8.2
RECOMMENDED SOLDER PAD LAYOUT
1.25 ±0.12
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC3780
28
3780ff
For more information www.linear.com/LTC3780
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
UH Package
32-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1693 Rev D)
5.00 ± 0.10
(4 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE
M0-220 VARIATION WHHD-(X) (TO BE APPROVED)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
31
1
2
32
BOTTOM VIEW—EXPOSED PAD
3.50 REF
(4-SIDES)
3.45 ± 0.10
3.45 ± 0.10
0.75 ± 0.05 R = 0.115
TYP
0.25 ± 0.05
(UH32) QFN 0406 REV D
0.50 BSC
0.200 REF
0.00 – 0.05
0.70 ±0.05
3.50 REF
(4 SIDES)
4.10 ±0.05
5.50 ±0.05
0.25 ± 0.05
PACKAGE OUTLINE
0.50 BSC
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH R = 0.30 TYP
OR 0.35 × 45° CHAMFER
R = 0.05
TYP
3.45 ± 0.05
3.45 ± 0.05
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC3780
30
3780ff
For more information www.linear.com/LTC3780
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
LINEAR TECHNOLOGY CORPORATION 2005
LT 0413 REV F • PRINTED IN USA
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3780
relaTeD parTs
Typical applicaTion
LTC3780 DA
BO540W
DB
BO540W
CF 0.1µF
COUT
330µF
16V
VOUT
12V
5A
VIN
5V TO 32V
CC1
0.01µF
CC2
47pF
CSS
0.022µF
CIN
22µF
35V
3780 TA02
CA
0.22µF
VPULLUP
CB 0.22µF
B
Si7884DP
C
Si7884DP
D
Si7884DP
L
4.7µH
D1
B340A
D2
B320A
A
Si7884DP
CVCC 4.7µF
9mΩ
10Ω
PGOOD
SS
SENSE+
SENSE–
ITH
VOSENSE
BOOST1
TG1
SW1
VIN
EXTVCC
INTVCC
1
2
3
4
5
6
24
23
22
21
20
19
SGND
RUN
FCB
PLLFLTR
BG1
PGND
BG2
SW2
PLLIN
STBYMD
TG2
BOOST2
7
8
9
10
18
17
16
15
11
12
14
13
100Ω
100Ω
R1
8.06k, 1% R2 113k, 1%
ON/OFF
10k
2V
RC
100k
RPU
68pF
CSTBYMD
0.01µF
+
+
22µF
16V, X7R
× 3
3.3µF
50V, X5R
× 3
Figure 13. LTC3780 12V/5A, Buck-Boost Regulator
PART NUMBER DESCRIPTION COMMENTS
LTC3789 38V High Efficiency Synchronous 4-Switch Buck-Boost
DC/DC Controller
4V ≤ VIN ≤ 38V, 0.8V ≤ VOUT ≤ 38V 4mm × 5mm QFN-28, SSOP-28
LT3791-1 60V High Efficiency Synchronous 4-Switch Buck-Boost
DC/DC Controller
4.7V ≤ VIN ≤ 60V, 1.2V ≤ VOUT ≤ 30V TSSOP-38
LT8705 80V High Efficiency Synchronous 4-Switch Buck-Boost
DC/DC Controller
2.8V ≤ VIN ≤ 80V, 1.3V ≤ VOUT ≤ 80V 5mm × 7mm QFN-38,
TSSOP-38
LTC3785 10V High Efficiency Synchronous 4-Switch Buck-Boost
DC/DC Controller
2.7V ≤ VIN ≤ 10V, 2.7V ≤ VOUT ≤ 10V 4mm × 4mm QFN-24
LTC3112 15V, 2.5A Synchronous Buck-Boost DC/DC Converter 2.7V ≤ VIN ≤ 15V, 2.5V ≤ VOUT ≤ 14V 4mm × 5mm DFN-16,
TSSOP-20
LTC3115-1 40V, 2A Synchronous Buck-Boost DC/DC Converter 2.7V ≤ VIN ≤ 40V, 2.7V ≤ VOUT ≤ 40V 4mm × 5mm DFN-16,
TSSOP-20
LTM4607 High Efficiency Buck-Boost DC/DC µModule
®
4.5V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 25V 15mm × 15mm × 2.8mm
LTM4609 High Efficiency Buck-Boost DC/DC µModule 4.5V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 34V 15mm × 15mm × 2.8mm
