© Semiconductor Components Industries, LLC, 2014
April, 2014 − Rev. 13 1Publication Order Number:
MC10EP57/D
MC10EP57, MC100EP57
3.3V / 5V ECL 4:1
Differential Multiplexer
Description
The MC10/100EP57 is a fully differential 4:1 multiplexer. By
leaving the SEL1 line open (pulled LOW via the input pulldown
resistors) the device can also be used as a differential 2:1 multiplexer
with SEL0 input selecting between D0 and D1. The fully differential
architecture of the EP57 makes it ideal for use in low skew
applications such as clock distribution.
The SEL1 is the most significant select line. The binary number
applied to the select inputs will select the same numbered data input
(i.e., 00 selects D0).
Multiple VBB outputs are provided. The VBB pin, an internally
generated voltage supply, is available to this device only. For
single−ended input conditions, the unused differential input is
connected to VBB as a switching reference voltage. VBB may also
rebias AC coupled inputs. When used, decouple VBB and VCC via a
0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, VBB should be left open.
The 100 Series contains temperature compensation.
Features
375 ps Typical Propagation Delays
Maximum Frequency > 2 GHz Typical
PECL Mode Operating Range:
VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output will default LOW with inputs open or at VEE
VBB Outputs
Useful as Either 4:1 or 2:1 Multiplexer
These Devices are Pb−Free and are RoHS Compliant
MARKING
DIAGRAM*
xxx = MC10 or 100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G= Pb−Free Package
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(Note: Microdot may be in either location)
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
*For additional marking information, refer to
Application Note AND8002/D.
TSSOP−20
DT SUFFIX
CASE 948E
XXXX
EP57
ALYWG
G
120
QFN−20
MN SUFFIX
CASE 485E
XXXX
EP57
ALYWG
G
MC10EP57, MC100EP57
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2
Figure 1. 20−Lead Package (Top View) and Logic Diagram
D1D1 D2D0
1718 16 15 14 13 12
43 56789
SEL0
11
10
VCC Q VCC VBB1 VBB2 VEE
D0
1920
21
VCC SEL1
D2VCC D3 VEE
D3
4:1
Q
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
1
2
3
4
5
15
14
13
12
11
678910
20 19 18 17 16
Figure 1. QFN−20 Pinout (Top View)
SEL0
VCC
Q
VCC SEL1VCC
Q
VCC
VBB2
VBB1
VEE
D1
D1
D2
D0
D0
D2
D3 D3 VEE
Exposed Pad
NOTE: The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.
The Exposed Pad may only be electrically connected to VEE.
MC10/100EP57
Table 1. PIN DESCRIPTION
PIN FUNCTION
D0 − 3*, D0 − 3*ECL Differential Data Inputs
SEL0*, SEL1* ECL MUX Select Inputs
VBB1, VBB2 ECL Reference Output Voltage
Q, Q ECL Data Outputs
VCC Positive Supply
VEE Negative Supply
EP Exposed Pad
*Pins will default LOW when left open.
Table 2. TRUTH TABLE
SEL1 SEL0 DATA OUT
L L D0, D0
L H D1, D1
H L D2, D2
H H D3, D3
MC10EP57, MC100EP57
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Table 3. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor 75 kW
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg
TSSOP−20
QFN−20 Level 1
N/A Level 3
Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 584 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
VCC PECL Mode Power Supply VEE = 0 V 6 V
VEE NECL Mode Power Supply VCC = 0 V −6 V
VIPECL Mode Input Voltage
NECL Mode Input Voltage VEE = 0 V
VCC = 0 V VI v VCC
VI w VEE
6
−6 V
V
Iout Output Current Continuous
Surge 50
100 mA
mA
IBB VBB Sink/Source ± 0.5 mA
TAOperating Temperature Range −40 to +85 °C
Tstg Storage Temperature Range −65 to +150 °C
qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm TSSOP−20
TSSOP−20 140
100 °C/W
°C/W
qJC Thermal Resistance (Junction−to−Case) Standard Board TSSOP−20 23 to 41 °C/W
qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm QFN−20
QFN−20 47
33 °C/W
°C/W
qJC Thermal Resistance (Junction−to−Case) Standard Board QFN−20 18 °C/W
Tsol Wave Solder Pb
Pb−Free 265
265 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
MC10EP57, MC100EP57
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Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 40 52 65 40 52 65 40 52 65 mA
VOH Output HIGH Voltage (Note 3) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV
VOL Output LOW Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV
VIH Input HIGH Voltage (Single−Ended) 2090 2415 2155 2480 2215 2540 mV
VIL Input LOW Voltage (Single−Ended) 1365 1690 1460 1755 1490 1815 mV
VBB Output Voltage Reference 1790 1835 1990 1855 1900 2055 1915 1960 2115 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
2.0 3.3 2.0 3.3 2.0 3.3 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current 0.5 0.5 0.5 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
Symbo
l
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 40 52 65 40 52 65 40 52 65 mA
VOH Output HIGH Voltage (Note 6) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mV
VOL Output LOW Voltage (Note 6) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mV
VIH Input HIGH Voltage (Single−Ended) 3790 4115 3855 4180 3915 4240 mV
VIL Input LOW Voltage (Single−Ended) 3065 3390 3130 3455 3190 3515 mV
VBB Output Voltage Reference 3490 3535 3690 3555 3600 3755 3685 3660 3815 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 7)
2.0 5.0 2.0 5.0 2.0 5.0 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current 0.5 0.5 0.5 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
6. All loading with 50 W to VCC − 2.0 V.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 8)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 40 52 65 40 52 65 40 52 65 mA
VOH Output HIGH Voltage (Note 9) −1135 −1010 −885 −1070 −945 −820 −1010 −885 −760 mV
VOL Output LOW Voltage (Note 9) −1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560 mV
VIH Input HIGH Voltage (Single−Ended) −1210 −885 −1145 −820 −1085 −760 mV
VIL Input LOW Voltage (Single−Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV
VBB Output Voltage Reference −1510 −1465 −1310 −1445 −1400 −1245 −1385 −1340 −1185 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
VEE + 2.0 0.0 VEE + 2.0 0.0 VEE + 2.0 0.0 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current 0.5 0.5 0.5 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with VCC.
9. All loading with 50 W to VCC − 2.0 V.
10.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
−40°C 25°C 85°C
Unit
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 40 52 65 40 52 65 40 52 65 mA
VOH Output HIGH Voltage (Note 12) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV
VOL Output LOW Voltage (Note 12) 1305 1480 1605 1305 1480 1605 1305 1480 1605 mV
VIH Input HIGH Voltage (Single−Ended) 2075 2420 2075 2420 2075 2420 mV
VIL Input LOW Voltage (Single−Ended) 1305 1675 1305 1675 1305 1675 mV
VBB Output Voltage Reference 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
2.0 3.3 2.0 3.3 2.0 3.3 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current 0.5 0.5 0.5 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11.Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
12.All loading with 50 W to VCC − 2.0 V.
13.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
MC10EP57, MC100EP57
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Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
Symbo
l
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current 40 52 65 40 52 65 40 52 65 mA
VOH Output HIGH Voltage (Note 15) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV
VOL Output LOW Voltage (Note 15) 3005 3180 3305 3005 3180 3305 3005 3180 3305 mV
VIH Input HIGH Voltage (Single−Ended) 3775 4120 3775 4120 3775 4120 mV
VIL Input LOW Voltage (Single−Ended) 3005 3375 3005 3375 3005 3375 mV
VBB Output Voltage Reference 3475 3575 3675 3475 3575 3675 3475 3575 3675 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 16)
2.0 5.0 2.0 5.0 2.0 5.0 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current 0.5 0.5 0.5 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14.Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
15.All loading with 50 W to VCC − 2.0 V.
16.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 17)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 40 52 65 40 52 65 40 52 65 mA
VOH Output HIGH Voltage (Note 18) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV
VOL Output LOW Voltage (Note 18) −1995 −1820 −1695 −1995 −1820 −1695 −1995 −1820 −1695 mV
VIH Input HIGH Voltage (Single−Ended) −1225 −880 −1225 −880 −1225 −880 mV
VIL Input LOW Voltage (Single−Ended) −1995 −1625 −1995 −1625 −1995 −1625 mV
VBB Output Voltage Reference −1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
VEE + 2.0 0.0 VEE + 2.0 0.0 VEE + 2.0 0.0 V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current 0.5 0.5 0.5 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17.Input and output parameters vary 1:1 with VCC.
18.All loading with 50 W to VCC − 2.0 V.
19.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
fmax Maximum Frequency (Figure 2) > 3 > 3 > 3 GHz
tPLH,
tPHL Propagation Delay to
Output Differential D to Q, Q
COM_SEL, SEL to Q, Q 250
300 350
400 450
500 275
320 375
420 475
520 320
320 420
450 520
575
ps
tSKEW Device to Device Skew (Note 21) 200 200 200 ps
tJITTER CLOCK Random Jitter (RMS)
@ v0.5 GHz
@ v1.0 GHz
@ v1.5 GHz
@ v2.0 GHz
@ v2.5 GHz
@ v3.0 GHz
0.122
0.110
0.112
0.128
0.114
0.116
0.3
0.3
0.3
0.3
0.3
0.3
0.140
0.135
0.132
0.139
0.129
0.152
0.3
0.3
0.3
0.3
0.3
0.3
0.172
0.151
0.152
0.163
0.177
0.305
0.3
0.3
0.3
0.3
0.3
1.0
ps
VPP Input Voltage Swing (Differential Con-
figuration) 150 800 1200 150 800 1200 150 800 1200 mV
tr
tfOutput Rise/Fall Times Q, Q
(20% − 80%) 70 120 170 70 140 200 70 150 220 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
21.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
Figure 2. Fmax
0
100
200
300
400
500
600
700
800
900
1000
0 1000 2000 3000 4000
FREQUENCY (MHz)
VOUTpp (mV)
MC10EP57, MC100EP57
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Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device Receiver
Device
QD
Q D
Zo = 50 W
Zo = 50 W
50 W50 W
VTT
VTT = VCC − 2.0 V
ORDERING INFORMATION
Device Package Shipping
MC10EP57DTG TSSOP−20
(Pb−Free) 75 Units / Rail
MC10EP57DTR2G TSSOP−20
(Pb−Free) 2500 / Tape & Reel
MC10EP57MNG QFN−20
(Pb−Free) 92 Units / Rail
MC10EP57MNTXG QFN−20
(Pb−Free) 3000 / Tape & Reel
MC100EP57DTG TSSOP−20
(Pb−Free) 75 Units / Rail
MC100EP57DTR2G TSSOP−20
(Pb−Free) 2500 / Tape & Reel
MC100EP57MNG QFN−20
(Pb−Free) 92 Units / Rail
MC100EP57MNTXG QFN−20
(Pb−Free) 3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
MC10EP57, MC100EP57
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PACKAGE DIMENSIONS
TSSOP−20
CASE 948E−02
ISSUE C
DIM
A
MIN MAX MIN MAX
INCHES
6.60 0.260
MILLIMETERS
B4.30 4.50 0.169 0.177
C1.20 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.27 0.37 0.011 0.015
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
110
1120
PIN 1
IDENT
A
B
−T−
0.100 (0.004)
C
DGH
SECTION N−N
K
K1
JJ1
N
N
M
F
−W−
SEATING
PLANE
−V−
−U−
S
U
M
0.10 (0.004) V S
T
20X REFK
L
L/2
2X
S
U0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
--- ---
S
U0.15 (0.006) T
7.06
16X
0.36 16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
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PACKAGE DIMENSIONS
QFN−20, 4x4, 0.5P
CASE 485E
ISSUE B
ÉÉ
ÉÉ
ÉÉ
2.88
20X
0.35
20X
0.58
4.30
0.50
DIMENSIONS: MILLIMETERS
1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
PITCH
PKG
OUTLINE
DIM MIN MAX
MILLIMETERS
D4.00 BSC
E4.00 BSC
A0.80 1.00
b0.20 0.30
e0.50 BSC
L1 0.00 0.15
A3 0.20 REF
A1 --- 0.05
L0.35 0.45
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30 MM
FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
D2
E2
1
6
11
20
D2 2.60 2.90
E2 2.60 2.90
e
L1
DETAIL A
L
OPTIONAL CONSTRUCTIONS
ÉÉ
ÉÉ
ÇÇ
A1
A3
L
ÇÇ
ÇÇ
ÉÉ
DETAIL B
MOLD CMPDEXPOSED Cu
OPTIONAL CONSTRUCTIONS
A
B
E
D
2X
0.15 C
PIN ONE
REFERENCE
TOP VIEW
2X
0.15 C
A
A1
(A3)
0.08 C
0.10 C
CSEATING
PLANE
SIDE VIEW
DETAIL B
BOTTOM VIEW
b
20X
0.10 B
0.05
AC
CNOTE 3
DET AIL A
K0.20 REF
0.10 BAC
L20X
0.10 BAC
K
4.30
2.88
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and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
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surgical implant i nto t he b ody, o r o t her a pplicat ions i ntended t o s upport o r s ustain l ife, o r f or a ny o ther a pplication i n w hich t he f ailure o f t he S CILLC p roduct c ould c reate a s ituation w here
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or u naut horized a ppli cation, Buyer shall indemnify and ho ld S CILLC and
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCIL LC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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