RT9018A/B
®
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Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Pin Configurations
Maximum 3A, Ultra Low Dropout Regulator
Ordering Information
Features
zz
zz
zMaximum 3A Low-Dropout Voltage Regulator
zz
zz
zHigh Accuracy Output Voltage ±±
±±
±1.5%
zz
zz
zTypically 210mV Dropout at 3A
zz
zz
zPower Good Output
zz
zz
zOutput Voltage Pull Low Resistance when Disable
zz
zz
zThermal and Over Current Protection
zz
zz
zRoHS Compliant and 100% Lead (Pb)-Free
Applications
zFront Side Bus VTT (1.2V/3A)
zNoteBook PC Applications
zMotherboard Applications
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
(TOP VIEW)
WDFN-10L 3x3
General Description
The RT9018A/B is a high performance positive voltage
regulator designed for use in applications requiring very
low Input voltage and very low dropout voltage at up to
3A(Peak). It operates with a VIN as low as 1.4V and VDD
voltage 3V with output voltage programmable as low as
0.8V. The significant feature includes ultra low dropout,
ideal for applications where VOUT is very close to VIN.
Additionally, there is an enable pin to further reduce power
dissipation while shutdown. The RT9018A/B provides
excellent regulation over variations in line, load and
temperature. and provides a power OK signal to indicate
if the voltage level of Vo reaches 90% of its rating value.
The RT9018A/B is available in the SOP-8 (Exposed Pad)
and WDFN-10L 3x3 packages with 1V, 1.05V, 1.2V, 1.5V,
1.8V and 2.5V internally preset outputs that are also
adjustable using external resistors.
SOP-8 (Exposed Pad)
PGOOD
EN
VIN
VDD
GND
ADJ
NC
VOUT
GND
2
3
45
6
7
8
9
VOUT
VOUT
PGOOD
ADJ
VDD
VIN
VIN
EN
VIN
VOUT
9
8
7
9
1
2
3
4
5
10
GND
11
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
RT9018A/B-
Package Type
SP : SOP-8 (Exposed Pad-Option 1)
QW : WDFN-10L 3x3
Enable Pin Function
A : Internal Pull High
B : Internal Pull Low
Output Voltage
10 : 1V/Adj
1K : 1.05V/Adj
12 : 1.2V/Adj
15 : 1.5V/Adj
18 : 1.8V/Adj
25 : 2.5V/Adj
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
RT9018A/B
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Function Block Diagram
Typical Application Circuit
Function Pin Description
Pin No.
SOP-8
(Exposed Pad) WDFN -1 0L 3x3 Pin
Name Pin Functi on
3 7, 8, 9 VIN Supply Input Voltage.
2 6 EN Chip Enable (Active-High).
4 10 VDD Supply Voltage of Control Circuitry.
1 5 PGOOD Power Good Open Drain Output.
7 4 ADJ
Set the output voltage by the internal feedback resistors when
ADJ is grounded. If external feedback resistors is used, VOUT =
0.8V x (R1 + R2)/R2.
6 1, 2, 3 VOUT Output Voltage.
5 -- NC No Internal Connection.
8,
9 (Exposed Pad) 11 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB
and connected to GND for maximum power dissipation.
Figure 1. Fixed Voltage Regulator Figure 2. Adjustable Voltage Regulator
R2
R2R1
0.8 VOUT +
×=
VIN
EN
GND
VOUT
ADJ
PGOOD
RT9018A/B
VOUT
10µF
10µF
Chip Enable
R1
R2
100k
VOUT
VDD
1µF
VDD
VIN
CDummy
OCP
Error
Amplifier
POR
EN
GND
ADJ
VIN
PGOOD
VOUT
VDD
Mode
+
-
+
-
0.8V
0.72V
Driver
OTP
VIN
EN
GND
VOUT
ADJ
PGOOD
RT9018A/B
VOUT
Chip Enable
100k
VOUT
VDD
VDD
VIN
10µF
10µF
1µF
RT9018A/B
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Electrical Characteristics
(VIN = VOUT + 500mV, VEN = VDD = 5V, CIN = COUT = 10μF, T A = TJ = 25°C, unless otherwise specified)
Recommended Operating Conditions (Note 4)
zSupply Voltage, VIN ------------------------------------------------------------------------------------------------------- 1.4V to 5.5V
zControl Voltage, VDD (VDD > VOUT + 1.5V) -------------------------------------------------------------------------- 3V to 5.5V
zControl Voltage with PGOOD, VDD (Note 8) ----------------------------------------------------------------------- 4.5V to 5.5V
zJunction Temperature Range -------------------------------------------------------------------------------------------- 40°C to 125°C
zAmbient Temperature Range -------------------------------------------------------------------------------------------- 40°C to 85°C
Absolute Maximum Ratings (Note 1)
zSupply Voltage, VIN ------------------------------------------------------------------------------------------------------ 1V to 6V
zControl Voltage, VDD ----------------------------------------------------------------------------------------------------- 3V to 6V
zOutput Voltage, VOUT --------------------------------------------------------------------------------------------------- 0.8 to 6V
zPower Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------------- 1.33W
WDFN-10L 3x3 ------------------------------------------------------------------------------------------------------------- 1.67W
zPackage Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------------- 15°C/W
WDFN-10L 3x3, θJA ------------------------------------------------------------------------------------------------------- 60°C/W
zJunction Temperature ----------------------------------------------------------------------------------------------------- 150°C
zLead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
zStorage Temperature Range -------------------------------------------------------------------------------------------- 65°C to 150°C
zESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Parameter Symbol Test Conditions Min Typ Max Unit
POR Threshold 2.4 2.7 3 V
POR Hysteresis 0.15 0.2 -- V
Adjustable Pin Threshold VTH_ADJ I
OUT = 1mA -- 0.2 0.4 V
Reference Voltage (ADJ Pin Voltage) VADJ I
OUT = 1mA 0.788 0.8 0.812 V
Fixed Output Voltage Range ΔVOUT 1.5 0 1.5 %
Line Regulation (VIN) ΔVLINE_IN VIN = VOUT + 0.5V to 5V,
IOUT = 1mA -- 0.2 0.6 %
Load Regulation (Note 5) ΔVLOAD VIN = VOUT + 1V,
IOUT = 1mA to 3A -- 0.2 1 %
IOUT = 2A -- 150 250
Dropout Voltage (Note 6) VDROP IOUT = 3A -- 210 350 mV
Quiescent Current (Note 7) IQ V
DD = 5.5V -- 0.6 1.2 mA
Current Limit ILIM 3.2 4.5 -- A
RT9018A/B
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Note 1. Stresses beyond those listed Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for load
regulation in the load range from 1mA to 3A.
Note 6. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) - 100mV.
Note 7. Quiescent, or ground current, is the difference between input and output currents. It is defined by IQ = IIN - IOUT under no
load condition (IOUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin
current.
Note 8. The control voltage must within 4.5V to 5.5V when using PGOOD function.
Parameter Symbol Test Conditions Min Typ Max Unit
Short Circuit Current VOUT < 0.2V 0.5 1.8 -- A
In-rush Current COUT = 10μF, Enable Start-up -- 0.6 -- A
VOUT Pull Low Resistance VEN = 0V -- 150 -- Ω
Chip Enable
EN Input Bias Current IEN V
EN = 0V -- 12 -- μA
RT9018A -- 10 20 VDD Shutdown
Current RT9018B ISHDN V
EN = 0V -- -- 1
μA
Logic-Low VENL V
DD = 5V -- -- 0.7
EN Threshold Voltage Logic-High VENH V
DD = 5V 1.2 -- -- V
Power Good
PGOOD Rising Threshold -- 90 93 %
PGOOD Hysteresis 3 10 -- %
PGOOD Sink Capability IPGOOD = 10mA -- 0.2 0.4 V
PGOOD Delay 0.5 1.5 5 ms
Thermal Protection
Thermal Shutdown Temperature TSD -- 160 -- °C
Thermal Shutdown Hysteresis ΔTSD -- 30 -- °C
Thermal Shutdown Temperature
Fold-back V
OUT < 0.4V -- 110 -- °C
RT9018A/B
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Typical Operating Characteristics
Load Transient Response
Time (2.5ms/Div)
IOUT
(1A/Div)
VOUT
(20mV/Div)
VDD = 5V, VIN = 1.8V, VOUT = 1.2V
VIN Line Transient Response
Time (250μs/Div)
VOUT
(20mV/Div)
VIN
VDD = 5V, VOUT = 1.2V, IOUT = 0A
3
2
VIN Line Transient Response
Time (250μs/Div)
VOUT
(20mV/Div)
VIN
VDD = 5V, VOUT = 1.2V, IOUT = 2A
3
2
Load Transient Response
Time (2.5ms/Div)
IOUT
(1A/Div)
VOUT
(20mV/Div)
VDD = 5V, VIN = 1.8V, VOUT = 1.2V
VDD Line Transient Response
Time (250μs/Div)
VOUT
(20mV/Div)
VDD
VIN = 1.8V, VOUT = 1.2V, IOUT = 2A
5
4
VDD Line Transient Response
Time (250μs/Div)
VOUT
(20mV/Div)
VDD
VIN = 1.8V, VOUT = 1.2V, IOUT = 0A
5
4
RT9018A/B
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Short Circuit Current vs . Te m pe rature
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
-40 -20 0 20 40 60 80 100
Temperature (°C)
Short Circuit Current Ishort (A
)
Dropout Voltage vs. Load Current
0
50
100
150
200
250
300
350
400
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
Load Current (A)
Dropout Voltage (mV)
125°C
25°C
-40°C
Start Up from VDD
Time (500μs/Div)
PGOOD
(1V/Div)
VDD
(5V/Div)
IOUT = 3A
VOUT
(1V/Div)
IIN
(2A/Div)
Start Up from VIN
Time (1ms/Div)
PGOOD
(1V/Div)
VIN
(1V/Div)
IOUT = 3A
VOUT
(1V/Div)
IIN
(2A/Div)
Short Circuit Protection
Time (100μs/Div)
IOUT
(1A/Div)
VDD = 5V, VIN = 1.8V, VOUT = 1.2V
Start Up from Enable
Time (500μs/Div)
PGOOD
(1V/Div)
EN
(1V/Div)
IOUT = 3A
VOUT
(1V/Div)
IIN
(2A/Div)
RT9018A/B
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ADJ Threshold Voltage vs . Temperature
0.10
0.12
0.14
0.16
0.18
0.20
0.22
0.24
0.26
0.28
0.30
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
ADJ Threshold Voltage Range (V
)
Reference Voltage vs. Temperature
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
Reference Voltage (V)
VDD Standby Current vs. Temperature
-4
0
4
8
12
16
20
24
28
32
-50-25 0 25 50 75100125
Temperature (°C)
VDD Standby Current (μA) 1
VIN = 3.3V, VEN = 0V, VDD = 5V
RT9018A
RT9018B
Output Voltage vs. Temperature
1.15
1.16
1.17
1.18
1.19
1.20
1.21
1.22
1.23
1.24
1.25
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
Output Voltage (V)
VIN = 1.8V, VADJ = 0V, IOUT = 0A
VDD POR Threshold Voltage vs. Temperature
2.40
2.45
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
2.95
3.00
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
POR Voltage (V)
Rising
Falling
Quiescent Current vs. Temperature
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
Quiescent Current (uA
)
VIN = 1.8V, VOUT = 1.2V, IOUT = 0A
Quiescent Current (mA)
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
RT9018A/B
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Ov e r Current Protection Fold Back
0
0.5
1
1.5
2
2.5
3
0 0.5 1 1.5 2 2.5 3 3.5 4
Loading Current IOUT (A)
Output Voltage V
OUT (V)
VIN = VEN = 3.3V, VDD = 5V
RT9018A/B
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Application Information
Adjustable Mode Operation
The output voltage of RT9018A/B is adjustable from 0.8V
to (VIN - VDROP) by external voltage divider resisters as
shown in Typical Application Circuit (Figure 2). The value
of resisters R1 and R2 should be more than 10kΩ to
reduce the power loss. The VDD must be greater than
(VOUT + 1.5V).
Enable
The RT9018A/B goes into shutdown mode when the EN
pin is in the logic low condition. During this condition, the
pass transistor, error amplifier, and band gap are turned
off, reducing the supply current to 10μA typical. The
RT9018A/B goes into operation mode when the EN pin is
in the logic high condition. If the EN pin is floating, NOTE
that the RT9018A/B internal initial logic level. For RT9018A,
the EN pin function pulls high level internally. So the
regulator will be turn on when EN pin is floating. For
RT9018B, the EN pin function pulls low level internally.
So the regulator will be turn off when EN pin is floating.
Output Ca pa citor
The RT9018A/B is specifically designed to employ ceramic
output capacitors as low as 10μF. The ceramic capacitors
offer significant cost and space savings, along with high
frequency noise filtering.
Input Capacitor
Good bypassing is recommended from input to ground to
help improve AC performance. A 10μF input capacitor or
greater located as close as possible to the IC is
recommended.
Current Limit
The RT9018A/B contains an independent current limit and
the short circuit current protection to prevent unexpected
applications. The current limit monitors and controls the
pass transistors gate voltage, limiting the output current
to higher than 4.5A typical. When the output voltage is
less than 0.4V, the short circuit current protection starts
the current fold back function and maintains the loading
current 1.8A. The output can be shorted to ground
indefinitely without damaging the part.
Power Good
The power good function is an open-drain output. Connects
100kΩ pull up resistor to VOUT to obtain an output voltage.
The PGOOD pin will output high immediately after the
output voltage arrives 90% of normal output voltage. The
PGOOD pin will output high with typical 1.5ms delay time.
Thermal-Shutdown Protection
Thermal protection limits power dissipation to prevent IC
over temperature in RT9018A/B. When the operation
junction temperature exceeds 160°C, the over-temperature
protection circuit starts the thermal shutdown function
and turns the pass transistor off. The pass transistor turn
on again after the junction temperature cools by 30°C.
RT9018A/B lowers its OTP trip level from 160°C to 110°C
when output short circuit occurs (VOUT < 0.4V). It limits
IC case temperature under 100°C and provides maximum
safety to customer while output short circuit occurring.
Power Dissipation
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is :
PD = (VIN VOUT) x IOUT + VIN x IQ
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junctions to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = (TJ(MAX) TA) / θJA
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and the
θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification,
where TJ (MAX) is the maximum junction temperature of
the die (125°C) and TA is the maximum ambient
temperature. The junction to ambient thermal resistance
for SOP-8 (Exposed Pad) package is 75°C/W on the
standard JEDEC 51-7 (4 layers, 2S2P) thermal test board.
The copper thickness is 2oz. The maximum power
dissipation at TA = 25°C can be calculated by following
RT9018A/B
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Figure 3 (a). Minimum Footprint, θJA = 75°C/W
Figure 3 (b). Copper Area = 10mm2, θJA = 64°C/W
Figure 3 (c). Copper Area = 30mm2, θJA = 54°C/W
Figure 4. De-rating Curves
Figure 3. Thermal Resistance vs. Different Cooper Area
Layout Design
Figure 3 (d). Copper Area = 50mm2, θJA = 51°C/W
Figure 3 (e). Copper Area = 70mm2, θJA = 49°C/W
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
0 20 40 60 80 100 120 140
Ambient Temperature (°C)
Power Dissipation (W)
JEDEC 4-Layers PCB
70mm2
50mm2
30mm2
10mm2
Minimum Layout
Copper Area
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA . The Figure 4 of de-rating curves allows
the designer to see the effect of rising ambient temperature
on the maximum power allowed.
Layout Considerations
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package design and the PCB design.
However, the package design had been designed. If
possible, its useful to increase thermal performance by
the PCB design. The thermal resistance θJA can be
decreased by adding a copper under the exposed pad of
SOP-8 (Exposed Pad) package.
As shown in Figure 3, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard SOP-8
(Exposed Pad) pad (Figure 3.a), θJA is 75°C/W. Adding
copper area of pad under the SOP-8 (Exposed Pad) Figure
3.b) reduces the θJA to 64°C/W. Even further, increasing
the copper area of pad to 70mm2 (Figure 3.e) reduces the
θJA to 49°C/W.
formula :
PD (MAX) = (125°C 25°C) / (75°C/W) = 1.33W (SOP-8
Exposed Pad on the minimum layout)
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Outline Dimension
A
B
J
F
H
M
C
D
I
Y
X
EXPOSED THERMAL PAD
(Bottom of Package)
8-Lead SOP (Exposed Pad) Plastic Package
Dime nsio ns In Millime ters Dimensions In Inches
Symbol Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1 Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2 Y 3.000 3.500 0.118 0.138
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Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Dimension s In Millimeters Dimensions In Inches
Symb ol Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 2.950 3.050 0.116 0.120
D2 2.300 2.650 0.091 0.104
E 2.950 3.050 0.116 0.120
E2 1.500 1.750 0.059 0.069
e 0.500 0.020
L 0.350 0.450
0.014 0.018
W-Type 10L DFN 3x3 Package
11
2
2
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID and Tie Bar Mark Options
D
1
E
A3
A
A1
D2
E2
L
b
e
SEE DETAIL A