SOT323-3L
3
1
2
1
2
3
Features
• AEC-Q101 qualified
• Dual unidirectional Transil functions
• Low leakage current (IR max. < 1 µA at VRM)
• 300 W peak pulse power (8/20 µs)
• High ESD protection level: up to 25 kV
• High integration
• Suitable for high density boards
• Complies with the following standards/
– ISO 10605: C = 330 pF, R = 330 Ω: 30 kV (air discharge), 30 kV (contact
discharge)
– ISO 7637-3 fast transient: Pulse a: VS = -150 V, Pulse b: VS = +100 V
– ISO 7637-3 slow transient: Positive pulse: VS = +85 V, Negative pulse: VS =
-85 V
Applications
Where transient overvoltage protection in ESD sensitive equipment is required, such
as:
• Entertainment
• Signal communications
• Connectivity
• Comfort and convenience
Description
This device is a diode array designed to protect 1 line or 2 lines against ESD
transients.
The device is ideal for applications where both reduced line capacitance and board
space saving are required
It can also be used as bidirectional suppressor by connecting only pin 1 and 2.
Product status
ESDA37WY
Automotive dual Transil™ array for ESD protection
ESDA37WY
Datasheet
DS12297 - Rev 2 - April 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1ESDA37WY_Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol Parameter Value Unit
Vpp Peak pulse voltage(1) ISO 10605 (C = 330 pF, R = 330 Ω):
Contact discharge
Air discharge
ISO 10605 (C = 150 pF, R = 330 Ω):
Contact discharge
Air discharge
30
30
30
30
kV
Ppp Peak pulse power (8/20 μs) 300 W
Ipp Peak pulse current (8/20 μs) 6.3 A
TjMaximum operating junction temperature range -55 to 175 °C
Tstg Storage junction temperature range -65 to 175 °C
TLMaximum temperature for soldering during 10 s 260 °C
1. For a surge greater than the maximum values, the diode will fail in short-circuit.
Figure 1. Electrical characteristics (definitions)
Symbol Parameter
V = Breakdown voltage
I = Leakage current
I = Forward current
I = Peak pulse current
I = Breakdown current
V = Forward voltage drop
C
R
BR
RM
PP
R
F
V = Clamping voltage
= Capacitance
= Dynamic impedance
T = Voltage temperature
CL
F
d
α
VclVcl
VBR
VBR
VRMVRM
Slope = 1/RdSlope = 1/Rd
VFVF
IFIF
IRMIRM
IPP
IPP
II
VV
V = Stand-off voltage
RM
Table 2. Electrical characteristics (Tamb = 25 °C)
Order code
VBR at IRIRM at VRM Rd (1) αT(2) Cline VF at IF
Min. Max. Max. Typ. Max. Typ. at 0 V bias Max.
V V mA µA V mΩ 10-4/°C pF V mA
ESDA37WY 37 43.3 1 1 36 2400 11 48 0.9 10
1. Square pulse Ipp = 15 A, tp = 2.5 µs
2. Δ VBR = αT x (Tamb -25 °C) x VBR (25 °C)
ESDA37WY
ESDA37WY_Characteristics
DS12297 - Rev 2 page 2/12
1.1 Characteristics (curves)
Figure 2. Peak pulse power dissipation versus initial
junction temperature
0
50
100
150
200
250
300
350
25 50 75 100 125 150 175
PPP(W)
Tj(°C)
Figure 3. Peak pulse power versus exponential
pulse duration (maximum values)
10
100
1000
10 100 1000
PPP(W)
tp(µs)
Tjinitial = 25 °C
maximum value
Figure 4. Variation of clamping voltage versus peak
pulse current (maximum values)
0.1
1
10
100
20 25 30 35 40 45 50 55 60
IPP(A)
VCL(V)
Tjinitial = 25 °C
8/20µs
Figure 5. Variation of leakage current at VR = VRM
versus junction temperature
0.1
1
10
100
1000
25 50 75 100 125 150 175
Ir(nA)
Tj(°C)
ESDA37LY (VR = VRM = 36 V)
ESDA37WY
Characteristics (curves)
DS12297 - Rev 2 page 3/12
Figure 6. ISO 7637-3 fast transient pulse a response
(VS = -150 V)
0.5 V/div
1A/div 50 ns/div
Figure 7. ISO 7637-3 fast transient pulse b
response (VS = +100 V)
10 V/div
500 mA/div 50 ns/div
Figure 8. ISO 7637-3 slow transient positive pulse
(VS = +85 V)
10 V/div
2 A/div 5 µs/div
Figure 9. ISO 7637-3 slow transient negative pulse
(VS = -85 V)
5 V/div
5 A/div
2 µs/div
ESDA37WY
Characteristics (curves)
DS12297 - Rev 2 page 4/12
2Application and design guidelines
Refer to STMicroelectronics application note:
• AN2689: Protection of automotive electronics from electrical hazards, guidelines for design and component
selection.
ESDA37WY
Application and design guidelines
DS12297 - Rev 2 page 5/12
3Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
3.1 [Package name] package information
• Epoxy meets UL 94,V0
• Lead-free package
Figure 10. SOT-323 3L package outline
L
H
c
b
E
e
θ
A
A1
D
ESDA37WY
Package information
DS12297 - Rev 2 page 6/12
Table 3. SOT323-3L package mechanical data
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.8 1.1 0.031 0.043
A1 0.0 0.1 0.000 0.003
b 0.25 0.4 0.0098 0.0157
c 0.1 0.26 0.003 0.0102
D 1.8 2.0 2.2 0.070 0.078 0.086
E 1.15 1.25 1.35 0.0452 0.0492 0.0531
e 0.60 0.65 0.70 0.024 0.026 0.028
H 1.8 2.1 2.4 0.070 0.082 0.094
L 0.1 0.2 0.30 0.004 0.008 0.012
ϴ 0 30° 0 30°
Figure 11. SOT323-3L recommended footprint
0.95
(0.037)
1.0
(0.039)
2.9
(0.114)
0.50
(0.019)
0.8
(0.031)
ESDA37WY
SOT-323 3L package information
DS12297 - Rev 2 page 7/12
4Recommendation on PCB assembly
4.1 Solder paste
1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed.
4. Use solder paste with fine particles: powder particle size 20-45 µm.
4.2 Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
3. Standard tolerance of ±0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste
and cause solder joints to short. Too low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
4.3 PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
ESDA37WY
Recommendation on PCB assembly
DS12297 - Rev 2 page 8/12
4.4 Reflow profile
Figure 12. ST ECOPACK® recommended soldering reflow profile for PCB mounting
250
0
50
100
150
200
240210180150120906030 300270
-6 °C/s
240-245 °C
2 - 3 °C/s
Temperature (°C) -2 °C/s
-3 °C/s
Time (s)
0.9 °C/s
60 sec
(90 max)
Note: Minimize air convection currents in the reflow oven to avoid component movement.
ESDA37WY
Reflow profile
DS12297 - Rev 2 page 9/12
5ESDA37WY_Ordering information
Figure 13. Ordering information scheme
ESDA XX WY
ESD Array
Minimum breakdown voltage
Package
W = SOT323-3L
Y = Automotive grade
Table 4. Ordering information
Order code Marking(1) Package Weight Base qty. Delivery mode
ESDA37WY E3Y SOT323-3L 6.6 mg 3000 Tape and reel
1. The marking can be rotated by multiples of 90° to differentiate assembly location.
ESDA37WY
ESDA37WY_Ordering information
DS12297 - Rev 2 page 10/12
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
ESDA37WY
DS12297 - Rev 2 page 12/12
