CAT660
3Doc. No. 5000, Rev. V
ABSOLUTE MAXIMUM RATINGS
V+ to GND ............................................................. 6V
Input Voltage (Pins 1, 6 and 7) .. -0.3V to (V+ + 0.3V)
BOOST/FC and OSC Input Voltage ........... The least
negative of (Out - 0.3V) or (V+ - 6V) to (V+ + 0.3V)
Output Short-circuit Duration to GND .............. 1 sec.
(OUT may be shorted to GND for 1 sec without damage but
shorting OUT to V+ should be avoided.)
Continuous Power Dissipation (TA = 70°C)
Plastic DIP ................................................ 730mW
SOIC ......................................................... 500mW
TDFN ............................................................... 1W
Operating Ambient Temperature Range
CAT660E.............. -40°C to 85°C
Storage Temperature ......................... -65°C to 160°C
Lead Soldering Temperature (10 sec) ............. 300°C
Note: TA = Ambient Temperature
These are stress ratings only and functional operation is not
implied. Exposure to absolute maximum ratings for prolongued
time periods may affect device reliability. All voltages are with
respect to ground.
Parameter Symbol Conditions Min Typ Max Units
Inverter: LV = Open. RL = 1kΩ3.0 5.5 V
Supply Voltage VS Inverter: LV = GND. RL = 1kΩ1.5 5.5
Doubler: LV = OUT. RL = 1kΩ2.5 5.5
Supply Current IS BOOST/FC = open, LV = Open 0.09 0.5 mA
BOOST/FC = V+ , LV = Open 0.3 3
Output Current IOUT OUT is more negative than -4V 100 mA
Output Resistance RO IL = 100mA, C1 = C2 = 150 µF (Note 2) 4 7
BOOST/FC = V+ (C1, C2 ESR ≤ 0.5Ω)Ω
IL = 100mA, C1 = C2 = 10 µF12
Oscillator Frequency FOSC BOOST/FC = Open 5 10 kHz
(Note 3) BOOST/FC = V+ 40 80
OSC Input Current IOSC BOOST/FC = Open ±1µA
BOOST/FC = V+ ±5
Power Efficiency PE RL = 1kΩ connected between V+ and 96 98 %
OUT, TA = 25°C (Doubler)
RL = 500Ω connected between GND and 92 96
OUT, TA = 25°C (Inverter)
IL = 100mA to GND, TA = 25°C (Inverter) 88
Voltage Conversion VEFF No load, TA = 25°C 99 99.9 %
Efficiency
Note 1. In Figure 1, test circuit capacitors C1 and C2 are 150µF and have 0.2Ω maximum ESR. Higher ESR levels may reduce efficiency and output
voltage.
Note 2. The output resistance is a combination of the internal switch resistance and the external capacitor ESR. For maximum voltage and efficiency
keep external capacitor ESR under 0.2Ω.
Note 3. FOSC is tested with COSC = 100pF to minimize test fixture loading. The test is correlated back to COSC=0pF to simulate the capacitance
at OSC when the device is inserted into a test socket without an external COSC.
ELECTRICAL CHARACTERISTICS
V+ = 5V, C1 = C2 = 150µF, Boost/FC = Open, COSC = 0pF, inverter mode with test circuit as shown in Figure 1 unless
otherwise noted. Temperature is over operating ambient temperature range unless otherwise noted.