H EE GEN FR ALO CAT660 100mA CMOS Charge Pump Inverter/Doubler LE A D F R E ETM FEATURES Replaces MAX660 and LTC(R)660 Low quiescent current Converts V+ to V- or V+ to 2V+ Pin-compatible, high-current alternative to 7660/1044 Low output resistance, 4 typical High power efficiency Industrial temperature range Selectable charge pump frequency Available in 8-pin SOIC, DIP and 0.8mm thin 8- pad TDFN packages - Lead-free, halogen-free package option - 10kHz or 80kHz - Optimize capacitor size APPLICATIONS Negative voltage generator Low EMI power source Instrumentation Voltage doubler GaAs FET biasing LCD contrast bias Voltage splitter Lithium battery power supply Cellular phones, pagers DESCRIPTION The CAT660 is a charge-pump voltage converter. It will invert a 1.5V to 5.5V input to a -1.5V to -5.5V output. Only two external capacitors are needed. With a guaranteed 100mA output current capability, the CAT660 can replace a switching regulator and its inductor. Lower EMI is achieved due to the absence of an inductor. V+. The operating frequency can also be adjusted with an external capacitor at the OSC pin or by driving OSC with an external clock. Both 8-pin DIP and SOIC packages are available in the industrial temperature range. The TDFN package has a 4x4mm footprint and features a 0.8mm maximum height. Compared to the 8-pin SOIC the TDFN package footprint is nearly 50% less. For die availability, contact Catalyst Semiconductor marketing. In addition, the CAT660 can double a voltage supplied from a battery or power supply. Inputs from 2.5V to 5.5V will yield a doubled, 5V to 11V output voltage. A Frequency Control pin (BOOST/FC) is provided to select either a high (80kHz) or low (10kHz) internal oscillator frequency, thus allowing quiescent current vs. capacitor size trade-offs to be made. The 80kHz frequency is selected when the FC pin is connected to The CAT660 replaces the MAX660 and the LTC660. In addition, the CAT660 is pin compatible with the 7660/ 1044, offering an easy upgrade for applications with 100mA loads. TYPICAL APPLICATION +VIN 1.5V to 5.5V 1 BOOST/FC 2 CAP+ C1 + CAT660 3 GND 4 CAP- V+ 8 OSC 7 LV OUT 6 5 1 BOOST/FC Inverted Negative Output Voltage C1 VIN = 2.5V to 5.5V 8 OSC 7 3 GND LV 6 4 CAP- OUT 5 2 CAP+ CAT660 POSITIVE VOLTAGE DOUBLER VOLTAGE INVERTER (c) 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice + V+ Doubled Positive Output Voltage 1 Doc. No. 5000, Rev. V CAT660 PIN CONFIGURATION SOIC Package (S, X) CAT 660 8 V+ BOOST/FC 1 8 V+ BOOST/FC 1 CAP+ 2 DIP Package (P) CAT 660 CAP+ 2 7 OSC 7 OSC TDFN Package (RD8, ZD8) BOOST/FC 1 GND 3 6 LV GND 3 6 LV GND 3 CAP- 4 5 OUT CAP- 4 5 OUT CAP- 4 (Top View) (Top View) PIN DESCRIPTIONS 8 V+ CAP+ 2 CAT 660 7 OSC 6 LV 5 OUT (Top View) TDFN Package: 4mm x 4mm 0.8mm maximum height Circuit Configuration Pin Number Name 1 Boost/FC Inverter Mode Frequency Control for the internal oscillator. With an external oscillator BOOST/FC has no effect. Boost/FC Oscillator Frequency Doubler Mode Same as inverter. Oscillator Frequency Open 10kHz typical, 5kHz minimum 10kHz typical V+ 80kHz typical, 40kHz minimum 80kHz typical, 40kHz minimum 2 CAP+ Charge pump capacitor. Positive terminal. Same as inverter. 3 GND Power supply ground. Power supply. Positive voltage input. 4 CAP- Charge pump capacitor. Negative terminal. Same as inverter. 5 OUT Output for negative voltage. Power supply ground. 6 LV Low-Voltage selection pin. When the input voltage is less than 3V, connect LV to GND. For input voltages above 3V, LV may be connected to GND or left open. If OSC is driven externally, connect LV to GND. LV must be tied to OUT for all input voltages. 7 OSC Oscillator control input. An external capacitor can be connected to lower the oscillator frequency. An external oscillator can drive OSC and set the chip operating frequency. The charge-pump frequency is one-half the frequency at OSC. Same as inverter. Do not overdrive OSC in doubling mode. Standard logic levels will not be suitable. See the applications section for additional information. 8 V+ Power supply. Positive voltage input. Positive voltage output. ORDERING INFORMATION Part Number Package Temperature Range CAT660EPA 8 lead Plastic DIP -40C to 85C CAT660ESA 8-lead SOIC -40C to 85C CAT660ESA-TE13 8-lead SOIC, Tape & Reel -40C to 85C CAT660ERD8 8-pad TDFN -40C to 85C CAT660EVA 8-lead SOIC (Lead-free, Halogen-free) -40C to 85C CAT660EVA-TE13 8-lead SOIC (Lead-free, Halogen-free) -40C to 85C CAT660EZD8 8-pad TDFN (Lead-free, Halogen-free) -40C to 85C Doc. No. 5000, Rev. V 2 CAT660 ABSOLUTE MAXIMUM RATINGS V+ to GND ............................................................. 6V Storage Temperature ......................... -65C to 160C Lead Soldering Temperature (10 sec) ............. 300C Input Voltage (Pins 1, 6 and 7) .. -0.3V to (V+ + 0.3V) Note: TA = Ambient Temperature BOOST/FC and OSC Input Voltage ........... The least negative of (Out - 0.3V) or (V+ - 6V) to (V+ + 0.3V) These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolongued time periods may affect device reliability. All voltages are with respect to ground. Output Short-circuit Duration to GND .............. 1 sec. (OUT may be shorted to GND for 1 sec without damage but shorting OUT to V+ should be avoided.) Operating Ambient Temperature Range Continuous Power Dissipation (TA = 70C) Plastic DIP ................................................ 730mW CAT660E .............. -40C to 85C SOIC ......................................................... 500mW TDFN ............................................................... 1W ELECTRICAL CHARACTERISTICS V+ = 5V, C1 = C2 = 150F, Boost/FC = Open, COSC = 0pF, inverter mode with test circuit as shown in Figure 1 unless otherwise noted. Temperature is over operating ambient temperature range unless otherwise noted. Parameter Supply Voltage Supply Current Output Current Output Resistance Symbol VS IS IOUT RO Conditions Min Inverter: LV = Open. RL = 1k Typ Max Units 3.0 5.5 V Inverter: LV = GND. RL = 1k 1.5 5.5 Doubler: LV = OUT. RL = 1k 2.5 5.5 BOOST/FC = open, LV = Open 0.09 0.5 BOOST/FC = V+ , LV = Open 0.3 3 OUT is more negative than -4V 100 IL = 100mA, C1 = C2 = 150 F (Note 2) mA 4 7 BOOST/FC = V+ (C1, C2 ESR 0.5) IL = 100mA, C1 = C2 = 10 F 12 Oscillator Frequency FOSC BOOST/FC = Open 5 10 (Note 3) BOOST/FC = V+ 40 80 OSC Input Current Power Efficiency IOSC PE kHz 1 5 A 96 98 % 92 96 BOOST/FC = Open BOOST/FC = V+ RL = 1k connected between V+ and mA OUT, TA = 25C (Doubler) RL = 500 connected between GND and OUT, TA = 25C (Inverter) IL = 100mA to GND, TA = 25C (Inverter) Voltage Conversion VEFF No load, TA = 25C 88 99 99.9 % Efficiency Note 1. In Figure 1, test circuit capacitors C1 and C2 are 150F and have 0.2 maximum ESR. Higher ESR levels may reduce efficiency and output voltage. Note 2. The output resistance is a combination of the internal switch resistance and the external capacitor ESR. For maximum voltage and efficiency keep external capacitor ESR under 0.2. Note 3. FOSC is tested with COSC = 100pF to minimize test fixture loading. The test is correlated back to COSC=0pF to simulate the capacitance at OSC when the device is inserted into a test socket without an external COSC. 3 Doc. No. 5000, Rev. V CAT660 Figure 1. Test Circuit 1 V+ 2 + C1 150F 3 4 BOOST/FC CAP+ V+ OSC CAT660 GND LV CAP- OUT IS 8 7 V+ 5V External Oscillator 6 COSC 5 RL IL VOUT Voltage Inverter C2 + 150F TYPICAL OPERATING CHARACTERISTICS Typical characteristic curves are generated using the test circuit in Figure 1. Inverter test conditions are: V+=5V, LV = GND, BOOST/FC = Open and TA = 25C unless otherwise indicated. Note that the charge-pump frequency is onehalf the oscillator frequency. Supply Current vs. Temperature (no load) 150 120 120 100 INPUT CURRENT [ A] INPUT CURRENT [ A] . Supply Current vs. Input Voltage No Load 90 60 30 0 80 60 VIN = 3V 40 VIN = 2V 20 0 1 2 3 4 5 INPUT VOLTAGE [V] 6 -50 -25 0 25 50 75 100 125 Output Resistance vs. Temperature (50 load) Output Resistance vs. Input Voltage 10 8 8 7 OUTPUT RESISTANCE [ ] . VIN = 5V 6 6 100 VIN = 2V Load 5 VIN = 3V 4 4 VIN = 5V 3 2 2 0 1 Doc. No. 5000, Rev. V 2 3 4 5 INPUT VOLTAGE [V] -50 6 4 -25 0 25 50 75 100 125 CAT660 TYPICAL OPERATING CHARACTERISTICS Output Voltage Drop vs. Load Current 1.0 5.0 OUTPUT VOLTAGE [V] INV. OUTPUT VOLTAGE [V] . Inverted Output Voltage vs. Load, V+ = 5V 4.8 4.6 4.4 4.2 0.8 0.6 V+ = 3V 0.4 0.2 V+ = 5V 0.0 4.0 0 20 40 60 80 0 100 60 80 100 Oscillator Frequency vs. Supply Voltage Oscillator Frequency vs. Supply Voltage 200 LV = OPEN FREQUENCY [kHz] FREQUENCY [kHz] . 40 LOAD CURRENT [mA] LOAD CURRENT [mA] 20 18 16 14 12 10 8 6 4 2 0 20 LV = GND 150 LV = GND 100 LV = OPEN 50 BOOST = OPEN BOOST = +V 0 2 3 4 5 SUPPLY VOLTAGE [V] 6 2 3 4 5 SUPPLY VOLTAGE [V] 6 Supply Current vs. Oscillator Frequency INPUT CURRENT [uA] 10000 No Load 1000 V+ = 5V 100 10 1 10 100 1000 OSCILLATOR FREQUENCY [kHz] 5 Doc. No. 5000, Rev. V CAT660 The 1/FC1 term can be modeled as an equivalent impedance REQ. A simple equivalent circuit is shown in figure 3. This circuit does not include the switch resistance nor does it include output voltage ripple. It does allow one to understand the switch-capacitor topology and make prudent engineering tradeoffs. APPLICATION INFORMATION Circuit Description and Operating Theory The CAT660 switches capacitors to invert or double an input voltage. Figure 2 shows a simple switch capacitor circuit. In position 1 capacitor C1 is charged to voltage V1. The total charge on C1 is Q1 = C1V1. When the switch moves to position 2, the input capacitor C1 is discharged to voltage V2. After discharge, the charge on C1 is Q2 = C1V2. For example, power conversion efficiency is set by the output impedance, which consists of REQ and switch resistance. As switching frequency is decreased, REQ, the 1/FC1 term, will dominate the output impedance, causing higher voltage losses and decreased efficiency. As the frequency is increased quiescent current increases. At high frequency this current becomes significant and the power efficiency degrades. The charge transferred is: Q = Q1 - Q2 = C1 x (V1 - V2) The oscillator is designed to operate where voltage losses are a minimum. With external 150F capacitors, the internal switch resistances and the Equivalent Series Resistance (ESR) of the external capacitors determine the effective output impedance. If the switch is cycled "F" times per second, the current (charge transfer per unit time) is: I = F x Q = F x C1 (V1 - V2) Rearranging in terms of impedance: (V1-V2) I= = (1/FC1) A block diagram of the CAT660 is shown in figure 4. The CAT660 is a replacement for the MAX660 and the LTC660. V1-V2 REQ Figure 2. Switched-Capacitor Building Block V1 Figure 3. Switched-Capacitor Equivalent Circuit REQ V2 C1 C2 V1 V2 RL C2 REQ = 1 FC1 Doc. No. 5000, Rev. V 6 RL CAT660 OSCILLATOR FREQUENCY CONTROL The switching frequency can be raised, lowered or driven from an external source. Figure 5 shows a functional diagram of the oscillator circuit. The CAT660 oscillator has four control modes: BOOST/FC Pin Connection OSC Pin Connection Nominal Oscillator Frequency Open Open 10kHz BOOST/FC= V+ Open 80kHz Open or BOOST/FC= V+ External Capacitor -- Open External Clock Frequency of external clock If BOOST/FC and OSC are left floating (Open), the nominal oscillator frequency is 10kHz. The pump frequency is one-half the oscillator frequency. an external capacitor at OSC, the operating frequency can be set. Note that the frequency appearing at CAP+ or CAP- is one-half that of the oscillator. By connecting the BOOST/FC pin to V+, the charge and discharge currents are increased, and the frequency is increased by approximately 8 times. Increasing the frequency will decrease the output impedance and ripple currents. This can be an advantage at high load currents. Increasing the frequency raises quiescent current but allows smaller capacitance values for C1 and C2. Driving the CAT660 from an external frequency source can be easily achieved by driving Pin 7 and leaving the BOOST pin open, as shown in Figure 6. The output current from Pin 7 is small, typically 1A to 8A, so a CMOS can drive the OSC pin. For 5V applications, a TTL logic gate can be used if an external 100k pull-up resistor is used as shown in figure 6. If pin 7, OSC, is loaded with an external capacitor the frequency is lowered. By using the BOOST/FC pin and Figure 4. CAT660 Block Diagram V+ (8) SW1 BOOST/FC 8x (1) CAP+ (2) SW2 + C1 OSC 2 CAP(4) OSC (7) VOUT (5) C2 + LV (6) CLOSED WHEN V+ > 3.0V GND (3) (N) = Pin Number 7 Doc. No. 5000, Rev. V CAT660 CAPACITOR SELECTION Low ESR capacitors are necessary to minimize voltage losses, especially at high load currents. The exact values of C1 and C2 are not critical but low ESR capacitors are necessary. Output voltage ripple is determined by the value of C2 and the load current. C2 is charged and discharged at a current roughly equal to the load current. The internal switching frequency is one-half the oscillator frequency. The ESR of capacitor C1, the pump capacitor, can have a pronounced effect on the output. C1 currents are approximately twice the output current and losses occur on both the charge and discharge cycle. The ESR effects are thus multiplied by four. A 0.5 ESR for C1 will have the same effect as a 2 increase in CAT660 output impedance. VRIPPLE = IOUT/(FOSC x C2) + IOUT x ESRC2 For example, with a 10kHz oscillator frequency (5kHz switching frequency), a 150F C2 capacitor with an ESR of 0.2 and a 100mA load peak-to-peak ripple voltage is 87mV. VRIPPLE vs. FOSC VRIPPLE (mV) IOUT (mA) FOSC (kHz) C2 (F) C2 ESR () 87 100 10 150 0.2 28 100 80 150 0.2 Figure 5. Oscillator Figure 6. External Clocking V+ 7.0 I V+ I REQUIRED FOR TTL LOGIC BOOST/FC (1) NC 1 2 + C1 OSC (7) 4 ~18pF 7.0 I CAP+ CAT660 V+ OSC GND LV CAP- OUT 8 100k 7 OSC INPUT 6 5 -V+ + I LV (6) Doc. No. 5000, Rev. V 3 BOOST/FC 8 C2 CAT660 CAPACITOR SUPPLIERS The following manufacturers supply low-ESR capacitors: Manufacturer Capacitor Type Phone WEB Email Comments AVX/Kyocera TPS/TPS3 843-448-9411 www.avxcorp.com avx@avxcorp.com Tantalum Vishay/Sprague 595 402-563-6866 www.vishay.com -- Aluminum Sanyo MV-AX, UGX 619-661-6835 www.sanyo.com Nichicon F55 847-843-7500 www.nichicon-us.com HC/HD Svcsales@sanyo.com Aluminum -- Tantalum Aluminum Capacitor manufacturers continually introduce new series and offer different package styles. It is recommended that before a design is finalized capacitor manufacturers should be surveyed for their latest product offerings. CONTROLLING LOSS IN CAT660 APPLICATIONS There are three primary sources of voltage loss: The effective output impedance of a CAT660 circuit is approximately: 1. Output resistance VLOSS = ILOAD x ROUT, where ROUT is the CAT660 output resistance and ILOAD is the load current. 2. Charge pump (C1) capacitor ESR: VLOSSC1 4 x ESRC1 x ILOAD, where ESRC1 is the ESR of capacitor C1. 3. Output or reservoir (C2) capacitor ESR: VLOSSC2 = ESRC2 x ILOAD, where ESRC2 is the ESR of capacitor C2. Rcircuit Rout 660 + (4 x ESRC1) + ESRC2 Increasing the value of C2 and/or decreasing its ESR will reduce noise and ripple. 9 Doc. No. 5000, Rev. V CAT660 TYPICAL APPLICATIONS VOLTAGE INVERSION POSITIVE-TO-NEGATIVE The CAT660 easily provides a negative supply voltage from a positive supply in the system. Figure 7 shows a typical circuit. The LV pin may be left floating for positive input voltages at or above 3.3V. 1 NC 2 + 3 C1 4 V+ BOOST/FC OSC CAP+ CAT660 GND LV CAP- OUT 8 VIN 7 1.5V to 5.5V 6 5 + VOUT = -VIN C2 Figure 7: Voltage Inverter POSITIVE VOLTAGE DOUBLER The voltage doubler circuit shown in figure 8 gives VOUT = 2 x VIN for input voltages from 2.5V to 5.5V. 1N5817* 1 + 2 3 VIN 2.5V to 5.5V 4 BOOST/FC V+ OSC CAP+ CAT660 GND LV CAP- OUT 8 7 6 5 *SCHOTTKY DIODE IS FOR START-UP ONLY Figure 8: Voltage Doubler Doc. No. 5000, Rev. V 10 + VOUT = 2VIN CAT660 PRECISION VOLTAGE DIVIDER A precision voltage divider is shown in figure 9. With very light load currents under 100nA, the voltage at pin 2 will be within 0.002% of V+/2 . Output voltage accuracy decreases with increasing load. 1 2 + V+ + 0.002% 2 IL < 100nA BOOST/FC V+ OSC CAP+ CAT660 8 7 3 GND LV 6 4 CAP- OUT 5 V+ 3V to 11V + Figure 9: Precision Voltage Divider (Load 100nA) BATTERY VOLTAGE SPLITTER Positive and negative voltages that track each other can be obtained from a battery. Figure 10 shows how a 9V battery can provide symmetrical positive and negative voltages equal to one-half the battery voltage. BATTERY 9V 3V < VBAT < 11V 1 VBAT 2 C1 150F + BOOST/FC V+ OSC CAP+ CAT660 8 7 3 GND LV 6 4 CAP- OUT 5 V + BAT (4.5V) 2 - VBAT (-4.5V) 2 C2 + 150F Figure 10: Battery Splitter 11 Doc. No. 5000, Rev. V CAT660 CASCADE OPERATION FOR HIGHER NEGATIVE VOLTAGES The CAT660 can be cascaded as shown in figure 11 to generate more negative voltage levels. The output resistance is approximately the sum of the individual CAT660 output resistance. VOUT= -N x VIN, where N represents the number of cascaded devices. +VIN 8 2 C1 + 8 2 CAT660 3 "1" + C1 3 5 4 CAT660 "N" 5 4 + + C2 VOUT = -NVIN C2 Figure 11: Cascading to Increase Output Voltage PARALLEL OPERATION Paralleling CAT660 devices will lower output resistance. As shown in figure 12, each device requires its own pump capacitor, C2, but the output reservoir capacitor is shared with all devices. The value of C2 should be increased by a factor of N, where N is the number of devices. The output impedance of the combined CAT660's is: ROUT(Of "N" CAT660's)= ROUT (Of the CAT660) N (Number of devices) +VIN 8 2 C1 + 3 4 8 2 CAT660 "1" + C1 5 3 4 CAT660 "N" 5 + Figure 12: Paralleling Devices Reduce Output Resistance Doc. No. 5000, Rev. V 12 C2 CAT660 PACKAGE MECHANICAL DRAWINGS 8-LEAD 150 WIDE SOIC (S, X) 0.0099 (0.25) X 45 0.0196 (0.50) 0.149 (3.80) 0.1574 (4.00) 0.0075 (0.19) 0.0098 (0.25) 0.2284 (5.80) 0.2440 (6.20) 0-8 0.016 (0.40) 0.050 (1.27) D Dimension D 0.0532 (1.35) 0.0688 (1.75) 0.050 (1.27) BSC 0.0040 (0.10) 0.0098 (0.25) Pkg Min Max 8L 0.1890(4.80) 0.1968(5.00) 0.013 (0.33) 0.020 (0.51) 8-LEAD 300 MIL WIDE PLASTIC DIP (P) 0.300 (7.62) 0.325 (8.26) 0.245 (6.17) 0.295 (7.49) D 0.310 (7.87) 0.380 (9.65) 0.120 (3.05) 0.150 (3.81) 0.180 (4.57) MAX Dimension D 0.015 (0.38) -- 0.110 (2.79) 0.150 (3.81) Pkg Min Max 8L 0.355 (9.02) 0.400 (10.16) 0.100 (2.54) BSC 0.045 (1.14) 0.060 (1.52) 0.014 (0.36) 0.022 (0.56) Notes: 1. Complies with JEDEC Publication 95 MS001 dimensions; however, some of the dimensions may be more stringent. 2. All linear dimensions are in inches and parenthetically in millimeters. 13 Doc. No. 5000, Rev. V CAT660 8-PAD TDFN (RD8, ZD8) 8 0.75+0.05 A 5 4.00+0.10 (S) B 0.0-0.05 1 4 4.00+0.10 (S) PIN 1 INDEX AREA 0.20 REF. C 5 DAP SIZE 3.5 X 2.4 8 0.10 MAX TYP. 0.15 0.15 0.20 0.10 2.20+0.10 NOTE: PIN 1 ID 0.10 0.20 0.50+0.10 (8x) 0.30+0.05 (8x) 0.80 TYP. (6x) 2.40 REF. (2x) Doc. No. 5000, Rev. V 14 1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES. 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. COPLANARITY SHALL NOT EXCEED 0.08mm. 3. WARPAGE SHALL NOT EXCEED 0.10mm. 4. PACKAGE LENGTH/PACKAGE WIDTH ARE CONSIDERED AS SPECIAL CHARACTERISTIC. (S) CAT660 REVISION HISTORY Date Rev. Reason 10/6/2003 10/7/2003 R S 10/15/2003 T 1/20/2005 U 04/22/2005 V Updated Typical Operating Characteristics data plots Updated Electrical Characteristics - Output Resistance and Supply Current Updated Typical Operating Characteristics data plots Updated Description - eliminated Commercial temp range Updated ordering information - eliminated Commercial temp range Updated operating ambient temperature ranges Changed ordering information for CAT660EXA to CAT660EVA Changed ordering information for CAT660EXA-TE13 to CAT660EVA-TE13 Removed Preliminary Information from data sheet header 15 Doc. No. 5000, Rev. V CAT660 Copyrights, Trademarks and Patents Trademarks and registered trademarks of Catalyst Semiconductor include each of the following: DPP TM AE2 TM Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents issued to Catalyst Semiconductor contact the Company's corporate office at 408.542.1000. CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES. Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur. Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale. Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete. Catalyst Semiconductor, Inc. Corporate Headquarters 1250 Borregas Avenue Sunnyvale, CA 94089 Phone: 408.542.1000 Fax: 408.542.1200 www.catalyst-semiconductor.com Doc. No. 5000, Rev. V Publication #: Revison: Issue date: 16 5000 V 04/22/2005