CAT5114ZD7I-00-GT3 - ON Semiconductor L.L.C.

August, 2010 − Rev. 18

1Publication Order Number:

CAT5114/D

CAT5114

32-Tap Digitally Program-

mable Potentiometer (DPPt)

Description

The CAT5114 is a single digitally programmable potentiometer

(DPPt) designed as an electronic replacement for mechanical

potentiometers and trim pots. Ideal for automated adjustments on high

volume production lines, they are also well suited for applications

where equipment requiring periodic adjustment is either difficult to

access or located in a hazardous or remote environment.

The CAT5114 contains a 32−tap series resistor array connected

between two terminals RH and RL. An up/down counter and decoder

that are controlled by three input pins, determines which tap is

connected to the wiper, RW. The wiper setting, stored in nonvolatile

memory, is not lost when the device is powered down and is

automatically reinstated when power is returned. The wiper can be

adjusted to test new system values without affecting the stored setting.

Wiper−control of the CAT5114 is accomplished with three input

control pins, CS, U/D, and INC. The INC input increments the wiper

in the direction which is determined by the logic state of the U/D input.

The CS input is used to select the device and also store the wiper

position prior to power down.

The digitally programmable potentiometer can be used as a

three−terminal resistive divider or as a two−terminal variable resistor.

DPPs bring variability and programmability to a wide variety of

applications including control, parameter adjustments, and signal

processing.

Features

•32−position Linear Taper Potentiometer

•Non−volatile EEPROM Wiper Storage

•Low Standby Current

•Single Supply Operation: 2.5 V − 6.0 V

•Increment Up/Down Serial Interface

•Resistance Values: 10 kW, 50 kW and 100 kW

•Available in PDIP, SOIC, TSSOP, MSOP and Space Saving

2 x 2.5 mm TDFN Packages

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Applications

•Automated Product Calibration

•Remote Control Adjustments

•Offset, Gain and Zero Control

•Tamper−proof Calibrations

•Contrast, Brightness and Volume Controls

•Motor Controls and Feedback Systems

•Programmable Analog Functions

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PIN CONFIGURATIONS

RWB

U/D

INC

VCC

See detailed ordering and shipping information in the package

dimensions section on page 15 of this data sheet.

ORDERING INFORMATION

SOIC−8

V SUFFIX

CASE 751BD

MSOP−8

Z SUFFIX

CASE 846AD

GND

PDIP (L), SOIC (V),

MSOP (Z)

PDIP−8

L SUFFIX

CASE 646AA

TSSOP−8

Y SUFFIX

CASE 948AL

TSSOP (Y)

(Top Views)

GND

U/D

INC

RWB

VCC

TDFN−8

ZD7 SUFFIX

CASE 511AJ

TDFN−8

VP2 SUFFIX

CASE 511AK

TDFN (ZD7, VP2)

GND

U/D

INC

RWB

VCC

CAT5114

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DEVICE MARKING INFORMATION

ABMS = CAT5114ZI−10−GT3

ABMT = CAT5114ZI−50−GT3

ABTH = CAT5114ZI−00−GT3

Y = Production Year (Last Digit)

M = Production Month (1−9, A, B, C)

P = Product Revision

R = Resistance:

2 = 10 kW

4 = 50 kW

5 = 100 kW

L = Assembly Location

4 = Lead Finish − NiPdAu

B = Product Revision (Fixed as “B”)

CAT5114L = Device Code (PDIP)

CAT5114V = Device Code (SOIC)

T = Temperature Range (Industrial)

Y = Production Year (Last Digit)

M = Production Month (1−9, A, B, C)

XXXX = Last Four Digits of Assembly Lot Number

Y = Production Year (Last Digit)

M = Production Month (1−9, A, B, C)

B = Product Revision (Fixed as “B”)

R = Resistance:

2 = 10 kW

4 = 50 kW

5 = 100 kW

5114G = Device Code

T = Temperature Range

TSSOPPDIP SOIC MSOP

RL4B

CAT5114LT

YMXXXX

RL4B

CAT5114VT

YMXXXX

ABMS

YMP

YMBR

5114GT

TDFN

EFL

XXX

EF = CAT5114VP2I10GT3

GV = CAT5114VP2I50GT3

GW = CAT5114VP2I00GT3

HA = CAT5114ZD7I10GT3

HE = CAT5114ZD7I50GT3

HF = CAT5114ZD7I00GT3

L = Assembly Location

XXX = Last Three Digits of Assembly Lot Number

Y = Production Year (Last Digit)

M = Production Month (1−9, A, B, C)

Functional Diagram

Figure 1. General

Control

and

Memory

Power On

GND

Decoder

Transfer

Gates

Resistor

Array

5−Bit

Nonvolatile

Memory

Store and

Recall

Control

Circuitry

5−Bit

Up/Down

Counter

GND

Figure 2. Detailed Figure 3. Electronic

Potentiometer

Implementation

VCC

INC

U/D

RH/VH

RW/VW

RL/VL

VCC

Recall

INC

U/D

Position

RH/VH

RW/VW

RL/VL

32−

RH/VH

RL/VL

RW/VW

CAT5114

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Table 1. PIN DESCRIPTIONS

Name Function

INC Increment Control

U/D Up/Down Control

RHPotentiometer High Terminal

GND Ground

RWWiper Terminal

RLPotentiometer Low Terminal

CS Chip Select

VCC Supply Voltage

Pin Function

INC: Increment Control Input

The INC input moves the wiper in the up or down direction

determined by the condition of the U/D input.

U/D: Up/Down Control Input

The U/D input controls the direction of the wiper movement.

When in a high state and CS is low, any high−to−low

transition on INC will cause the wiper to move one

increment toward the RH terminal. When in a low state and

CS is low, any high−to−low transition on INC will cause the

wiper to move one increment towards the RL terminal.

RH: High End Potentiometer Terminal

RH is the high end terminal of the potentiometer. It is not

required that this terminal be connected to a potential greater

than the RL terminal. Voltage applied to the RH terminal

cannot exceed the supply voltage, VCC or go below ground,

GND.

RW: Wiper Potentiometer Terminal

RW is the wiper terminal of the potentiometer. Its position on

the resistor array is controlled by the control inputs, INC,

U/D and CS. Voltage applied to the RW terminal cannot

exceed the supply voltage, VCC or go below ground, GND.

RL: Low End Potentiometer Terminal

RL is the low end terminal of the potentiometer. It is not

required that this terminal be connected to a potential less

than the RH terminal. Voltage applied to the RL terminal

cannot exceed the supply voltage, VCC or go below ground,

GND. RL and RH are electrically interchangeable.

CS: Chip Select

The chip select input is used to activate the control input of

the CAT5114 and is active low. When in a high state, activity

on the INC and U/D inputs will not affect or change the

position of the wiper.

Device Operation

The CAT5114 operates like a digitally controlled

potentiometer with RH and RL equivalent to the high and low

terminals and RW equivalent to the mechanical

potentiometer’s wiper. There are 32 available tap positions

including the resistor end points, RH and RL. There are 31

resistor elements connected in series between the RH and RL

terminals. The wiper terminal is connected to one of the 32

taps and controlled by three inputs, INC, U/D and CS. These

inputs control a seven−bit up/down counter whose output is

decoded to select the wiper position. The selected wiper

position can be stored in nonvolatile memory using the INC

and CS inputs.

With CS set LOW the CAT5114 is selected and will

respond to the U/D and INC inputs. HIGH to LOW

transitions on INC will increment or decrement the wiper

(depending on the state of the U/D input and seven−bit

counter). The wiper, when at either fixed terminal, acts like

its mechanical equivalent and does not move beyond the last

position. The value of the counter is stored in nonvolatile

memory whenever CS transitions HIGH while the INC input

is also HIGH. When the CAT5114 is powered−down, the last

stored wiper counter position is maintained in the

nonvolatile memory. When power is restored, the contents

of the memory are recalled and the counter is set to the value

stored.

With INC set low, the CAT5114 may be de−selected and

powered down without storing the current wiper position in

nonvolatile memory. This allows the system to always

power up to a preset value stored in nonvolatile memory.

CAT5114

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Table 2. OPERATION MODES

INC CS U/D Operation

High to Low Low High Wiper toward H

High to Low Low Low Wiper toward L

High Low to High XStore Wiper Position

Low Low to High XNo Store, Return to Standby

X High X Standby

Figure 4. Potentiometer Equivalent Circuit

RWI

Table 3. ABSOLUTE MAXIMUM RATINGS

Parameters Ratings Units

Supply Voltage

VCC to GND −0.5 to +7

Inputs

CS to GND −0.5 to VCC +0.5

INC to GND −0.5 to VCC +0.5 V

U/D to GND −0.5 to VCC +0.5 V

H to GND −0.5 to VCC +0.5 V

L to GND −0.5 to VCC +0.5 V

W to GND −0.5 to VCC +0.5 V

Operating Ambient Temperature

Industrial (‘I’ suffix) −40 to +85

°C

Junction Temperature +150 °C

Storage Temperature −65 to 150 °C

Lead Soldering (10 s max) +300 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

Table 4. RELIABILITY CHARACTERISTICS

Symbol Parameter Test Method Min Typ Max Units

VZAP (Note 1) ESD Susceptibility MIL−STD−883, Test Method 3015 2000 V

ILTH (Notes 1, 2) Latch−Up JEDEC Standard 17 100 mA

TDR Data Retention MIL−STD−883, Test Method 1008 100 Years

NEND Endurance MIL−STD−883, Test Method 1003 1,000,000 Stores

1. This parameter is tested initially and after a design or process change that affects the parameter.

2. Latch−up protection is provided for stresses up to 100 mA on address and data pins from −1 V to VCC + 1 V.

CAT5114

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Table 5. DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V to +6 V unless otherwise specified)

Symbol Parameter Conditions Min Typ Max Units

POWER SUPPLY

VCC Operating Voltage Range 2.5 – 6.0 V

ICC1 Supply Current (Increment) VCC = 6 V, f = 1 MHz, IW = 0 – – 100 mA

VCC = 6 V, f = 250 kHz, IW = 0 – – 50 mA

ICC2 Supply Current (Write) Programming, VCC = 6 V – – 1000 mA

VCC = 3 V – – 500 mA

ISB1 (Note 4) Supply Current (Standby) CS = VCC − 0.3 V

U/D, INC = VCC − 0.3 V or GND

–−1mA

LOGIC INPUTS

IIH Input Leakage Current VIN = VCC – – 10 mA

IIL Input Leakage Current VIN = 0 V – – −10 mA

VIH2 CMOS High Level Input Voltage 2.5 V ≤ VCC ≤ 6 V VCC x 0.7 – VCC + 0.3 V

VIL2 CMOS Low Level Input Voltage −0.3 – VCC x 0.2 V

POTENTIOMETER CHARACTERISTICS

RPOT Potentiometer Resistance −10 Device 10 kW

−50 Device 50

−00 Device 100

Pot. Resistance Tolerance ±20 %

VRH Voltage on RH pin 0 VCC V

VRL Voltage on RL pin 0 VCC V

Resolution 3.2 %

INL Integral Linearity Error IW ≤ 2 mA0.5 1 LSB

DNL Differential Linearity Error IW ≤ 2 mA0.25 0.5 LSB

RWI Wiper Resistance VCC = 5 V, IW = 1 mA 70 200 W

VCC = 2.5 V, IW = 1 mA 150 400 W

IWWiper Current −4.4 4.4 mA

TCRPOT TC of Pot Resistance 300 ppm/°C

TCRATIO Ratiometric TC 20 ppm/°C

VNNoise 100 kHz / 1 kHz 8/24 nV/√Hz

CH/CL/CWPotentiometer Capacitances 8/8/25 pF

fc Frequency Response Passive Attenuator, 10 kW1.7 MHz

3. This parameter is tested initially and after a design or process change that affects the parameter.

4. Latch−up protection is provided for stresses up to 100 mA on address and data pins from −1 V to VCC + 1 V.

5. IW = source or sink.

6. These parameters are periodically sampled and are not 100% tested.

CAT5114

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Table 6. AC TEST CONDITIONS

VCC Range 2.5 V ≤ VCC ≤ 6 V

Input Pulse Levels 0.2 x VCC to 0.7 x VCC

Input Rise and Fall Times 10 ns

Input Reference Levels 0.5 x VCC

Table 7. AC OPERATING CHARACTERISTICS (VCC = +2.5 V to +6.0 V, VH = VCC, VL = 0 V, unless otherwise specified)

Symbol Parameter Min Typ (Note 7) Max Units

tCI CS to INC Setup 100 − − ns

tDI U/D to INC Setup 50 − − ns

tID U/D to INC Hold 100 − − ns

tIL INC LOW Period 250 − − ns

tIH INC HIGH Period 250 − − ns

tIC INC Inactive to CS Inactive 1− − ms

tCPH CS Deselect Time (NO STORE) 100 − − ns

tCPH CS Deselect Time (STORE) 10 − − ms

tIW INC to VOUT Change −1 5 ms

tCYC INC Cycle Time 1− − ms

tR, tF (Note 8) INC Input Rise and Fall Time − − 500 ms

tPU (Note 8) Power−up to Wiper Stable – – 1 ms

tWR Store Cycle – 5 10 ms

7. Typical values are for TA = 25°C and nominal supply voltage.

8. This parameter is periodically sampled and not 100% tested.

9. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.

Figure 5. A.C. Timing

90% 90%

10%

(store)

MI(3)

tIC tCPH

tIW

U/D

INC

tCI

tDI tID

tIL tIH

tCYC

CAT5114

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Applications Information

(a) resistive divider (b) variable resistance (c) two−port

Figure 6. Potentiometer Configuration

Applications

Figure 7. Programmable Instrumentation

Amplifier

+5 V

+2.5 V

11 8

–

+5 V

CAT5113/5114

DPP

Figure 8. Programmable Sq. Wave Oscillator (555)

+5 V

0.01 mF

0.003 mF

+5 V

DPP

555

V1 (−)

V2 (+)

A1 = A2 = A3 = 1/4 LM6064

R2 = R3 = R4 = 5 kW

RPOT = 10 kW

pRPOT

(1−p)RPOT

CAT5114

Figure 9. Programmable Voltage Regulator Figure 10. Programmable I to V Convertor

0.1 mF

1 mF

6.8 mF

11 kW

100 kW

1.23 V

+5 V

DPP

2952

CAT5113/5114

FBSD

GND

VOUT VO (REG)

820 W

10 kW

VIN (UNREG)

SHUTDOWN

+2.5 V

+5 V

–

LT1097

+5 V

–

+5 V

CAT5113/5114

DPP

pR (1−p)R

330 W330 W1 MW

10 k

A1A2VO

CAT5114

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+5 V

+2.5 V

+5 V

IC3

CAT5114

CLO

IC1

393

IC4

–

+5 V

OSC

IC2

74HC132

0.1 mF

–

CHI 6

–

DPP

+5 V

0.001 mF

1 mF

346

–

+5 V

CAT5113/5114

DPP +2.5 V

Figure 11. Programmable Bandpass Filter

2.5 ≤ VO ≤ 5 V

VUL

VLL R1

10 kW

0 ≤ VS ≤ 2.5 V

10 kW

100 kW

50 kW

Figure 12. Automatic Gain Control

CAT5114

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PACKAGE DIMENSIONS

PDIP−8, 300 mils

CASE 646AA−01

ISSUE A

TOP VIEW

SIDE VIEW END VIEW

PIN # 1

IDENTIFICATION

Notes:

(1) All dimensions are in millimeters.

(2) Complies with JEDEC MS-001.

SYMBOL MIN NOM MAX

0.38

2.92

0.36

6.10

1.14

0.20

9.02

2.54 BSC

3.30

5.33

4.95

0.56

7.11

1.78

0.36

10.16

eB 7.87 10.92

E 7.62 8.25

2.92 3.80

3.30

0.46

6.35

1.52

0.25

9.27

7.87

CAT5114

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PACKAGE DIMENSIONS

SOIC 8, 150 mils

CASE 751BD−01

ISSUE O

E1 E

PIN # 1

IDENTIFICATION

TOP VIEW

SIDE VIEW END VIEW

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MS-012.

SYMBOL MIN NOM MAX

0º 8º

0.10

0.33

0.19

0.25

4.80

5.80

3.80

1.27 BSC

1.75

0.25

0.51

0.25

0.50

5.00

6.20

4.00

L0.40 1.27

1.35

CAT5114

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PACKAGE DIMENSIONS

TSSOP8, 4.4x3

CASE 948AL−01

ISSUE O

E1 E

TOP VIEW

SIDE VIEW END VIEW

L1 L

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MO-153.

SYMBOL

MIN NOM MAX

0º 8º

0.05

0.80

0.19

0.09

0.50

2.90

6.30

4.30

0.65 BSC

1.00 REF

1.20

0.15

1.05

0.30

0.20

0.75

3.10

6.50

4.50

0.90

0.60

3.00

6.40

4.40

CAT5114

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PACKAGE DIMENSIONS

MSOP 8, 3x3

CASE 846AD−01

ISSUE O

E1E

A1 e b

TOP VIEW

SIDE VIEW END VIEW

DETAIL A

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MO-187.

SYMBOL MIN NOM MAX

0º 6º

0.05

0.75

0.22

0.13

0.40

2.90

4.80

2.90

0.65 BSC

0.25 BSC

1.10

0.15

0.95

0.38

0.23

0.80

3.10

5.00

3.10

0.60

3.00

4.90

3.00

L1 0.95 REF

0.10

0.85

CAT5114

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PACKAGE DIMENSIONS

TDFN8, 2x2.5

CASE 511AJ−01

ISSUE A

PIN#1

IDENTIFICATION

Notes:

(1) All dimensions are in millimeters.

(2) Complies with JEDEC MO-229.

SYMBOL

ÎÎÎÎ

TOP VIEW

DETAIL A

FRONT VIEW

SIDE VIEW

DETAIL A

PIN#1 INDEX AREA

BOTTOM VIEW

DAP SIZE 1.8 x 1.6

MIN NOM MAX

A 0.70 0.75 0.80

A1 0.00 0.02 0.05

A3 0.20 REF

b 0.20 0.25 0.30

D 1.90 2.00 2.10

D2 1.40 1.50 1.60

E 2.50

E2 1.20 1.30 1.40

2.40

0.50 TYP

2.60

L 0.20 0.30 0.40

CAT5114

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PACKAGE DIMENSIONS

TDFN8, 2x3

CASE 511AK−01

ISSUE A

PIN#1

IDENTIFICATION

ebD

TOP VIEW SIDE VIEW BOTTOM VIEW

PIN#1 INDEX AREA

FRONT VIEW

Notes:

(1) All dimensions are in millimeters.

(2) Complies with JEDEC MO-229.

SYMBOL MIN NOM MAX

A 0.70 0.75 0.80

A1 0.00 0.02 0.05

A3 0.20 REF

b 0.20 0.25 0.30

D 1.90 2.00 2.10

D2 1.30 1.40 1.50

E 3.00

E2 1.20 1.30 1.40

2.90

0.50 TYP

3.10

L 0.20 0.30 0.40

A2 0.45 0.55 0.65

CAT5114

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Table 8. ORDERING INFORMATION

Orderable Part Numbers Reset Threshold Voltage Package−Pin Lead Finish

CAT5114LI−10−G 10

PDIP−8 NiPdAu

CAT5114LI−50−G 50

CAT5114LI−00−G 100

CAT5114VI−10−GT3 10

SOIC−8 NiPdAu

CAT5114VI−50−GT3 50

CAT5114VI−00−GT3 100

CAT5114VP2I10GT3 (Notes 10, 11) 10

TDFN−8

2 x 3 mm NiPdAu

CAT5114VP2I50GT3 (Notes 10, 11) 50

CAT5114VP2I00GT3 (Notes 10, 11) 100

CAT5114YI−10−GT3 10

TSSOP−8 NiPdAu

CAT5114YI−50−GT3 50

CAT5114YI−00−GT3 100

CAT5114ZI−10−GT3 10

MSOP−8 NiPdAu

CAT5114ZI−50−GT3 50

CAT5114ZI−00−GT3 100

CAT5114ZD7I−10−GT3 (Notes 10, 11) 10

TDFN−8

2 x 2.5 mm NiPdAu

CAT5114ZD7I−50−GT3 (Notes 10, 11) 50

CAT5114ZD7I−00−GT3 (Notes 10, 11) 100

10.Contact factory for package availability.

11. Part number is not exactly the same as the “Example of Ordering Information” shown above. For the indicated part numbers there are NO

hyphens in the orderable part numbers.

CAT5114

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Example of Ordering Information (Note 16)

Prefix Device # Suffix

Company ID

CAT 5114 V

Product Number

5114

I− GT3

Package

I = Industrial (−40°C to +85°C)

Temperature Range

L: PDIP

V: SOIC

Y: TSSOP

Z: MSOP

ZD7: TDFN

VP2: TDFN (Note 15)

G: NiPdAu

Blank: Matte−Tin

T: Tape & Reel

3: 3,000 Units / Reel

Tape & Reel (Note 17)

(Optional)

−10

Resistance

−10: 10 kW

−50: 50 kW

−00: 100 kW

Lead Finish

12.All packages are RoHS−compliant (Lead−free, Halogen−free).

13.The standard lead finish is NiPdAu.

14.For additional package and temperature options, please contact your nearest ON Semiconductor Sales office.

15.Contact factory for package availability.

16. The device used in the above example is a CAT5114VI−10−GT3 (SOIC, Industrial Temperature, 10 kW, NiPdAu, Tape & Reel, 3,000/Reel).

17.For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

CAT5114/D

DPP is a trademark of Semiconductor Components Industries, LLC.

PUBLICATION ORDERING INFORMATION

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USA/Canada

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Phone: 421 33 790 2910

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Phone: 81−3−5773−3850

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