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EZBuck™ 5A Simple Buck Regulator
February 2006
February 2006 www.aosmd.com Page 1 of 21
General Description
The AOZ1014 is a high efficiency, simple to use, 5A buck
regulator. The AOZ1014 works from a 4.5V to 16V input
voltage range, and provides up to 5A of continuous output
current with an output voltage adjustable down to 0.8V.
The AOZ1014 comes in SO-8 and DFN-8 packages and is
rated over a -40°C to +85°C ambient temperature range.
Features
• 4.5V to 16V operating input voltage
range
• 32 mΩ internal PFET switch for high
efficiency: up to 95%
• Internal soft start
• Output voltage adjustable to 0.8V
• 5A continuous output current
• Fixed 500kHz PWM operation
• Cycle-by-cycle current limit
• Short-circuit protection
• Thermal shutdown
• Small size SO-8 and DFN-8 packages
Applications
• Point of load dc/dc conversion
• PCIe graphics cards
• Set top boxes
• DVD drives and HDD
• LCD panels
• Cable modems
• Telecom/Networking/Datacom
equipment
Typical Application
L1
C2
VOUT
AOZ1014
C1
LX
VIN
FB
PGND
COMP
EN
AGND
22uF
100uF
4.7uH
From uPC
RC
CC
R1
R2
D1
+3.3V Output
@5A
VIN
Figure 1. 3.3V/5A Buck Down Regulator
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Ordering Information
Part Number Ambient Temperature Range Package Environmental
AOZ1014AI -40°C to +85°C SO-8 RoHS
AOZ1014DI -40°C to +85°C DFN-8 RoHS
Pin Configuration
1
2
3
4
8
7
6
5
VIN
AGND
COMP
LX
LX
EN
FB
PGND
SO-8
1
2
3
4
8
7
6
5
VIN
AGND
COMP
LX
LX
EN
FB
PGND
LX
AGND
DFN-8
Pin Description
Pin Number Pin Name Pin Function
1 VIN Supply voltage input. When VIN rises above the UVLO threshold the
device starts up.
2 PGND Power ground. Electrically needs to be connected to AGND.
3 AGND Reference connection for controller section. Also used as thermal
connection for controller section. Electrically needs to be connected
to PGND.
4 FB
The FB pin is used to determine the output voltage via a resistor
divider between the output and GND.
5 COMP External loop compensation pin.
6 EN The enable pin is active high. Connect EN pin to VIN if not used. Do
not leave the EN pin floating.
7,8 LX PWM output connection to inductor. Thermal connection for output
stage.
Absolute Maximum Ratings(1) Recommend Operating Ratings(2)
Parameter Units Parameter Units
Supply Voltage (VIN) 18V Supply Voltage (VIN) 4.5V to 16V
LX to AGND -0.7V to VIN+0.3V Output Voltage Range 0.8V to VIN
EN to AGND -0.3V to VIN+0.3V Ambient Temperature (TA) -40°C to +85°C
FB to AGND -0.3V to 6V
COMP to AGND -0.3V to 6V
Package Thermal Resistance
SO-8 (ΘJA)
DFN-8 (ΘJA)
82° C/W
50° C/W
PGND to AGND -0.3V to +0.3V
Junction Temperature (TJ) +150°C
Storage Temperature (TS) -65°C to +150°C
ESD Rating(3) 2kV
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Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified(4).
Parameter Symbol Conditions MIN TYP MAX UNITS
Supply Voltage VIN 4.5 16 V
Input Under-Voltage Lockout
Threshold
VUVLO V
IN rising
VIN falling
4.00
3.70
V
V
Supply Current (Quiescent) IIN I
OUT = 0, VFB = 1.2V,
VEN >2V
2
3 mA
Shutdown Supply Current IOFF V
EN = 0V 3 20 µA
Feedback Voltage VFB 0.782 0.8 0.818 V
Load Regulation 0.5 %
Line Regulation 1 %
Feedback Voltage Input Current IFB 200 nA
EN input Threshold VEN Off threshold
On threshold
2.0
0.6
V
V
EN Input Hysteresis VHYS 100 mV
Modulator
Frequency fO 350 500 600 kHz
Maximum Duty Cycle DMAX 100 %
Minimum Duty Cycle DMIN 6 %
Error Amplifier Voltage Gain 500 V/V
Error Amplifier Transconductance 200 µA/V
Protection
Current Limit ILIM 6 8 A
Over-Temperature Shutdown
Limit
T
J rising
TJ falling
145
100
°C
°C
Soft Start Interval tSS 4 ms
Output Stage
High-Side Switch On-Resistance VIN = 12V
VIN = 5V
25
41
32
55
mΩ
mΩ
Notes:
1. Exceeding the Absolute Maximum ratings may damage the device.
2. The device is not guaranteed to operate beyond the Maximum Operating ratings.
3. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5KΩ in series with
100pF.
4. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by
design.
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Functional Block Diagram
LEVEL SHIFTER
+
FET DRIVER
500Khz
OSCILLATOR
UVLO
&
POR
LX
FB
PGND
COMP
EN
AGND
+
-
PWM
CONTROL
LOGIC
+
–
+
ISEN
ILIMIT
PWM
COMP
5V LDO
REGULATOR
+
-
EAMP
Internal +5V
REFERENCE
&
BIAS
OTP
SOFTSTART
0.8V
LX
Vin
Q1
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Typical Performance Characteristics
Circuit of figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light load (DCM) operation
Vin
ripple
0.1V/div
Vo
ripple
50mV/div
Iin
2A/div
VLX
10V/div
1us/div
Start up to full load
Vin
5V/div
Vo
1V/div
Iin
1A/div
1ms/div
Load transient
Vo
Ripple
0.2V/div
Io
2A/div
100us/div
Full load (CCM) operation
Vin
ripple
0.1V/div
Vo
ripple
50mV/div
Iin
2A/div
VLX
10V/div
1us/div
Full load to turn off
Vin
5V/div
Vo
1V/div
Iin
1A/div
1ms/div
Light load to turn off
Vin
5V/div
Vo
1V/div
Iin
1A/div
1s/div
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Short circuit protection
Vo
2V/div
IL
2A/div
100us/div
Short circuit recovery
Vo
2V/div
IL
2A/div
1ms/div
Efficiency (Vin=12V) vs. load current
AOZ1014 Efficiency
75%
80%
85%
90%
95%
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Load curre nt (A)
E ff (% )
8 V out
5 V out
3.3 V out
8.0V output
5.0V output
3.3V output
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Thermal de-rating curves for SO-8 package part under typical input and output condition
Circuit of figure 1. 25ºC ambient temperature and natural convection (air speed<50LFM) unless otherwise specified.
AOZ1014AI De-rating curves at 5 V input
AO Z1014AI De- rating Curve at 5V Input
0
1
2
3
4
5
6
25 35 45 55 65 75 85
Ambient Temperature (Ta)
Output Current (Io
)
1.8V output 3.3V output 5V output
3.3V output
5.0V output
1.8V output
AOZ1014AI De-rating curves at 12 V input
AO Z1014AI De-rating Cur ve at 12V Input
0
1
2
3
4
5
6
25 35 45 55 65 75 85
Ambient Temperature (Ta)
Output Current (Io
)
1.8V output 3.3V output 5.0V output 8.0V output
3.3V output
5.0V output
8.0V output
1.8V output
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Thermal de-rating curves for DFN-8 package part under typical input and output condition
Circuit of figure 1. 25ºC ambient temperature and natural convection (air speed<50LFM) unless otherwise specified.
AOZ1014DI De-rating curves at 5 V input
AO Z1014DI De-rating Cur ve at 5V Input
0
1
2
3
4
5
25 35 45 55 65 75 85
Ambient Temperature (Ta)
Output Current (Io
)
1.8V output 3.3V output 5V output
3.3V output
5.0V output
1.8V output
AOZ1014DI De-rating curves at 12 V input
AOZ1014DI D e-rating Curve at 12V Input
0
1
2
3
4
5
25 35 45 55 65 75 85
Ambient Temperature (Ta)
Output Current (Io
)
1.8V output 3.3V output 5.0V output 8.0V output
3.3V output
5.0V output
8.0V output
1.8V output
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Detailed Description
The AOZ1014 is a current-mode step down regulator
with integrated high side PMOS switch and a low side
freewheeling Schottky diode. It operates from a 4.5V to
16V input voltage range and supplies up to 5A of load
current. The duty cycle can be adjusted from 6% to
100% allowing a wide range of output voltage. Features
include enable control, Power-On Reset, input under
voltage lockout, fixed internal soft-start and thermal
shut down.
The AOZ1014 is available in SO-8 and thermally
enhanced DFN-8 package.
Enable and Soft Start
The AOZ1014 has internal soft start feature to limit in-
rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 4.0V and voltage
on EN pin is HIGH. In soft start process, the output
voltage is ramped to regulation voltage in typically 4ms.
The 4ms soft start time is set internally.
The EN pin of the AOZ1014 is active high. Connect the
EN pin to VIN if enable function is not used. Pull it to
ground will disable the AOZ1014. Do not leave it open.
The voltage on EN pin must be above 2.0 V to enable
the AOZ1014. When voltage on EN pin falls below 0.6 V,
the AOZ1014 is disabled. If an application circuit
requires the AOZ1014 to be disabled, an open drain or
open collector circuit should be used to interface to EN
pin.
Steady-State Operation
Under steady-state conditions, the converter operates
in fixed frequency and Continuous-Conduction Mode
(CCM).
The AOZ1014 integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by
amplifying the voltage drop across the drain to source
of the high side power MOSFET. Output voltage is
divided down by the external voltage divider at the FB
pin. The difference of the FB pin voltage and reference
is amplified by the internal transconductance error
amplifier. The error voltage, which shows on the COMP
pin, is compared against the current signal, which is
sum of inductor current signal and ramp compensation
signal, at PWM comparator input. If the current signal is
less than the error voltage, the internal high-side switch
is on. The inductor current flows from the input through
the inductor to the output. When the current signal
exceeds the error voltage, the high-side switch is off.
The inductor current is freewheeling through the
external Schottky diode to output.
The AOZ1014 uses a P-Channel MOSFET as the high
side switch. It saves the bootstrap capacitor normally
seen in a circuit which is using an NMOS switch. It
allows 100% turn-on of the upper switch to achieve
linear regulation mode of operation. The minimum
voltage drop from VIN to VO is the load current times DC
resistance of MOSFET plus DC resistance of buck
inductor. It can be calculated by equation below:
)( )(_ inductorONDSOINMAXO RRIVV
+
×
−
=
Where VO_MAX is the maximum output voltage;
VIN is the input voltage from 4.5V to 16V;
I
O is the output current from 0A to 5A;
R
DS(ON) is the on resistance of internal
MOSFET, the value is between 25mΩ and
55mΩ depending on input voltage and junction
temperature;
Rinductor is the inductor DC resistance;
Switching Frequency
The AOZ1014 switching frequency is fixed and set by
an internal oscillator. The practical switching frequency
could range from 350kHz to 600kHz due to device
variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin with a resistor divider network. In the
application circuit shown in Figure 1. The resistor divider
network includes R1 and R2. Usually, a design is started
by picking a fixed R2 value and calculating the required
R1 with equation below.
)1(8.0
2
1
R
R
VO+×=
Some standard value of R1, R2 for most commonly used
output voltage values are listed in Table 1.
Table 1.
Vo (V) R1 (kΩ) R2 (kΩ)
0.8 1.0 open
1.2 4.99 10
1.5 10 11.5
1.8 12.7 10.2
2.5 21.5 10
3.3 31.6 10
5.0 52.3 10
Combination of R1 and R2 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
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Since the switch duty cycle can be as high as 100%,
the maximum output voltage can be set as high as the
input voltage minus the voltage drop on upper PMOS
and inductor.
Protection Features
The AOZ1014 has multiple protection features to
prevent system circuit damage under abnormal
conditions.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1014 employs peak
current mode control, the COMP pin voltage is
proportional to the peak inductor current. The COMP
pin voltage is limited to be between 0.4V and 2.5V
internally. The peak inductor current is automatically
limited cycle by cycle.
The cycle by cycle current limit threshold is set between
6A and 8A. When the load current reaches the current
limit threshold, the cycle by cycle current limit circuit
turns off the high side switch immediately to terminate
the current duty cycle. The inductor current stop rising.
The cycle by cycle current limit protection directly limits
inductor peak current. The average inductor current is
also limited due to the limitation on peak inductor
current. When cycle by cycle current limit circuit is
triggered, the output voltage drops as the duty cycle
decreasing.
The AOZ1014 has internal short circuit protection to
protect itself from catastrophic failure under output
short circuit conditions. The FB pin voltage is
proportional to the output voltage. Whenever FB pin
voltage is below 0.2V, the short circuit protection circuit
is triggered. As a result, the converter is shut down and
hiccups at a frequency equals to 1/8 of normal
switching frequency. The converter will start up via a
soft start once the short circuit condition disappears. In
short circuit protection mode, the inductor average
current is greatly reduced because of the low hiccup
frequency.
Power-On Reset (POR)
A power-on reset circuit monitors the input voltage.
When the input voltage exceeds 4V, the converter starts
operation. When input voltage falls below 3.7V, the
converter will be shut down.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit
and high side PMOS if the junction temperature
exceeds 145ºC. The regulator will restart automatically
under the control of soft-start circuit when the junction
temperature decreases to 100ºC.
Application Information
The basic AOZ1014 application circuit is shown in
Figure 1. Component selection is explained below.
Input capacitor
The input capacitor must be connected to the VIN pin
and PGND pin of the AOZ1014 to maintain steady input
voltage and filter out the pulsing input current. The
voltage rating of input capacitor must be greater than
maximum input voltage plus ripple voltage.
The input ripple voltage can be approximated by
equation below:
IN
O
IN
O
IN
O
IN V
V
V
V
Cf I
V×−×
×
=∆ )1(
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a
buck circuit, the RMS value of input capacitor current
can be calculated by:
)1(
_IN
O
IN
O
ORMSCIN V
V
V
V
II −×=
if let m equal the conversion ratio:
m
V
V
IN
O=
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Fig. 2 below. It can be seen that when VO is half of VIN,
CIN is under the worst current stress. The worst current
stress on CIN is 0.5·IO.
0 0.5 1
0
0.1
0.2
0.3
0.4
0.5
0.5
0
ICIN_RMS m()
IO
10 m
Figure 2. ICIN vs. voltage conversion ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN-RMS at
worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
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and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitor
may also be used. When selecting ceramic capacitors,
X5R or X7R type dielectric ceramic capacitors are
preferred for their better temperature and voltage
characteristics. Note that the ripple current rating from
capacitor manufactures are based on certain amount of
life time. Further de-rating may be necessary for
practical design requirement.
Inductor
The inductor is used to supply constant current to
output when it is driven by a switching voltage. For
given input and output voltage, inductance and
switching frequency together decide the inductor ripple
current, which is,
)1(
IN
OO
LV
V
LfV
I−×
×
=∆
The peak inductor current is:
2L
OLpeak I
II
∆
+=
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20%
to 30% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor needs to be checked
for thermal and efficiency requirements.
Surface mount inductors in different shape and styles
are available from Coilcraft, Elytone and Murata.
Shielded inductors are small and radiate less EMI noise.
But they cost more than unshielded inductors. The
choice depends on EMI requirement, price and size.
Table below lists some inductors for typical output
voltage design.
Table 2.
Vout L1 Manufacture
Shielded, 4.7uH
MSS1278-472MLD
Coilcraft 5.0 V
Shielded, 4.7uH
MSS1260-472MLD
Coilcraft
Un-shielded, 3.3uH
DO3316P-332MLD
Coilcraft
Shielded, 3.3uH
DO1260-332NXD
Coilcraft
3.3 V
Shield, 3.3uH
ET553-3R3
ELYTONE
Shield, 2.2uH
ET553-2R2
ELYTONE
Un-shielded, 2.2uH
DO3316P-222MLD
Coilcraft
1.8 V
Shielded, 2.2uH
MSS1260-222NXD
Coilcraft
Output Capacitor
The output capacitor is selected based on the DC
output voltage rating, output ripple voltage specification
and ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
)
81
(
O
COLO Cf
ESRIV ××
+×∆=∆
where CO is output capacitor value and ESRCO is the
Equivalent Series Resistor of output capacitor.
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified
to:
O
LO Cf
IV ××
×∆=∆ 81
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If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided
by capacitor ESR and inductor ripple current. The
output ripple voltage calculation can be further
simplified to:
COLO ESRIV ×∆=∆
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum are
recommended to be used as output capacitors.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current. It
can be calculated by:
12
_L
RMSCO I
I∆
=
Usually, the ripple current rating of the output capacitor
is a smaller issue because of the low current stress.
When the buck inductor is selected to be very small and
inductor ripple current is high, output capacitor could be
overstressed.
Loop Compensation
The AOZ1014 employs peak current mode control for
easy use and fast transient response. Peak current
mode control eliminates the double pole effect of the
output L&C filter. It greatly simplifies the compensation
loop design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole and can
be calculated by:
LO
pRC
f××
=
π
21
1
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
COO
ZESRC
f××
=
π
21
1
Where CO is the output filter capacitor;
RL is load resistor value;
ESRCO is the equivalent series resistance of
output capacitor;
The compensation design is actually to shape the
converter close loop transfer function to get desired
gain and phase. Several different types of compensation
network can be used for the AOZ1014. For most cases,
a series capacitor and resistor network connected to
the COMP pin sets the pole-zero and is adequate for a
stable high-bandwidth control loop.
In the AOZ1014, FB pin and COMP pin are the inverting
input and the output of internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
VEAC
EA
pGC
G
f××
=
π
2
2
Where GEA is the error amplifier transconductance,
which is 200•10-6 A/V;
GVEA is the error amplifier voltage gain,
which is 500 V/V;
CC is compensation capacitor;
The zero given by the external compensation network,
capacitor CC and resistor RC, is located at:
CC
ZRC
f××
=
π
21
2
To design the compensation circuit, a target crossover
frequency fC for close loop must be selected. The
system crossover frequency is where control loop has
unity gain. The crossover frequency is also called the
converter bandwidth. Generally a higher bandwidth
means faster response to load transient. However, the
bandwidth should not be too high because of system
stability concern. When designing the compensation
loop, converter stability under all line and load condition
must be considered.
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency. AOZ1014
operates at a fixed switching frequency range from
350kHz to 600kHz. It is recommended to choose a
crossover frequency less than 30kHz.
kHzfC30=
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The strategy for choosing RC and CC is to set the cross
over frequency with RC and set the compensator zero
with CC. Using selected crossover frequency, fC, to
calculate RC:
CSEA
O
FB
O
CC GG C
V
V
fR ×
×
××=
π
2
where fC is desired crossover frequency;
VFB is 0.8V;
GEA is the error amplifier transconductance,
which is 200•10-6 A/V;
GCS is the current sense circuit
transconductance, which is 9.02 A/V;
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected
crossover frequency. CC can is selected by:
1
25.1
pC
CfR
C××
=
π
Equation above can also be simplified to:
C
LO
CRRC
C×
=
An easy-to-use application software which helps to
design and simulate the compensation loop can be
found at www.aosmd.com.
Thermal management and layout consideration
In the AOZ1014 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the anode of Schottky
diode, to the cathode of Schottky diode. Current flows in
the second loop when the low side diode is on.
In PCB layout, minimizing the two loops area reduces
the noise of this circuit and improves efficiency. A
ground plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ1014.
In the AOZ1014 buck regulator circuit, the major power
dissipating components are the AOZ1014, the Schottky
diode and output inductor. The total power dissipation of
converter circuit can be measured by input power minus
output power.
OOININlosstotal IVIVP ⋅−⋅
=
_
The power dissipation in Schottky can be approximated
as:
SchottkyFWOlossdiode VDIP __ )1( ⋅−
⋅
=
Where VFW_Schottky is the Schottky diode forward voltage
drop.
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
1.1
2
_⋅⋅= inductorOlossindcutor RIP
The actual junction temperature can be calculated with
power dissipation in the AOZ1014 and thermal
impedance from junction to ambient.
JAlossinductorlossdiodelosstotaljunction PPPT
Θ
⋅
−
−
=
)( ___
The maximum junction temperature of AOZ1014 is
150ºC, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1014 under different ambient
temperature.
The thermal performance of the AOZ1014 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
The AOZ1014A is standard SO-8 package. The
AOZ1014D is a thermally enhanced DFN package,
which utilizes the exposed thermal pad at the bottom to
spread heat through PCB metal. Several layout tips are
listed below for the best electric and thermal
performance. Figure 3 below illustrates a PCB layout
example of AOZ1014A. Figure 4 below illustrates a PCB
layout example of AOZ1014D.
2. Do not use thermal relief connection to the VIN and
the PGND pin. Pour a maximized copper area to the
PGND pin and the VIN pin to help thermal
dissipation.
3. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
4. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin.
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February 2006 www.aosmd.com Page 14 of 21
5. Make the current trace from LX pins to L to Co to the
PGND as short as possible.
6. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
7. The two LX pins are connected to internal PFET
drain. They are low resistance thermal conduction
path and most noisy switching node. Connected a
copper plane to LX pin to help thermal dissipation.
This copper plane should not be too larger otherwise
switching noise may be coupled to other part of
circuit.
8. Keep sensitive signal trace far away form the LX
pins.
9. For the DFN package, thermal pad must be
soldered to the PCB metal. When multiple layer
PCB is used, 4 to 6 thermal vias should be placed
on the thermal pad and connected to PCB metal on
other layers to help thermal dissipation.
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Vin
PG
AG
FB
EN
CP
Cin
L
Cout
Via to ground plane
LX
LX
Vin Vo
GND
Figure 3. AOZ1014A (SO-8) PCB layout
LX
LXVin
PG
AG
FB
EN
CP
Cin
L
Cout
Thermal PAD: LX
Thermal PAD: AGND Via to ground plane
Vin Vo
GND
Figure 4. AOZ1014D (DFN-8) PCB layout
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SO-8 Package Marking Description
Z1014AI
FAYWLT
DFN-8 Package Marking Description
Z1014DI
FAYWLT
Note:
Logo AOS logo
Z1014AI Part number code
F&A Fab & Assembly location
Y Year code
W Week code
L&T Assembly lot code
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