AP-377 APPLICATION NOTE 16-Mbit Flash Product Family Software Drivers 28F016SA, 28F016SV, 28F016XS, 28F016XD TAYLOR GAUTIER MCD APPLICATIONS ENGINEERING PATRICK KILLELEA MCD APPLICATIONS ENGINEERING SALIM FEDEL MCD APPLICATIONS ENGINEERING December 1995 Order Number: 292126-003 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Intel retains the right to make changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata. *Other brands and names are the property of their respective owners. Since publication of documents referenced in this document, registration of the Pentium, OverDrive and iCOMP trademarks has been issued to Intel Corporation. Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 7641 Mt. Prospect, IL 60056-7641 or call 1-800-879-4683 COPYRIGHT (c) INTEL CORPORATION, 1995 16-Mbit FLASH PRODUCT FAMILY SOFTWARE DRIVERS CONTENTS PAGE INTRODUCTION AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA 1 28F016SA C DRIVERS AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA 4 28F016SA ASM86 DRIVERS AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA 26 APPENDIX A: FUNCTION CHANGES AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA A-1 APPENDIX B: GLOSSARY OF TERMS AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA B-1 APPENDIX C: ADDITIONAL INFORMATION AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA C-1 AP-377 INTRODUCTION ABOUT THE CODE This application note provides example software code for word writing, block erasing, and otherwise controlling Intel's 28F016SA, 28F016SV, 28F016XS and 28F016XD (hereafter referred to as 28F016SA) 16 Mbit symmetrically blocked memory components. Two programming languages are provided: high-level ``C'' for broad platform support, and more optimized ASM86 assembly. In many cases, the driver routines can be inserted ``as is'' into the main body of code being developed by the system software engineer. Extensive comments are included in each routine to facilitate adapting the code to specific applications. The internal automation of the 28F016SA makes software timing loops unnecessary and results in platformindependent code. The following example code is designed to be executed in any type of memory and with all processor clock rates. C code can be used with many microprocessors and microcontrollers, while ASM86 assembly code provides a solution optimized for Intel microprocessors and embedded processors. The 28F016SA, like the 28F008SA, is divided into 64 Kbyte blocks. Since the GSR and BSR are defined relative to the nearest preceding block beginning address, I often refer to this ``block base'' address in the comments. Assumptions: # Pointers (in C) or EDI offsets (in ASM86) are four (4) bytes long, providing a flat addressing space over the entire 28F016SA device. This implies the use of 386 or higher machines. If the code is to be run on a machine with a smaller address space, the code must be modified to include some sort of ``windowing'' scheme which maps segments of flash into system memory. The Intel 82365 is commonly used for this purpose. # ``Ints'' are 16 bit and ``longs'' 32 bit in C. # It is assumed that these pointers return a value equal to what they are pointing to. In other words, even though the pointer may be four (4) bytes long, this does not imply that incrementing the pointer by one will move the pointer four (4) bytes in memory. It is entirely dependent upon what the pointer is pointing to that determines how the increment will be effected. In the case of four (4) byte pointers and 16-bit ints, incrementing the pointer by one will effectively move the pointer two (2) bytes. # There exists a function ``setpin'' which can set an individual 28F016SA pin, given the pin number. # There exists a function ``getpin'' which can return the value of an individual 28F016SA pin, given the pin number. # The C code can access a function which derives the corresponding block base address from any given address. # BYTEY pin on the device determines whether addressing refers to words or bytes. I assume word writes/reads to a single device. With minor modifications this code can be adapted for a pair of 28F016SAs in Byte mode. # 28F016SA commands can be written to any address in the block or device to be affected by that command. Both the C and ASM86 code in this document contain the following routines, in this order: CSRwordbytewrites(compatible with 28F008SA) CSRblockerase(compatible with 28F008SA) CSRerasesuspendtoread(compatible with 28F008SA) lockblock lockstatusuploadtoBSR updatedatainalockedblock adddatainalockedblock ESRwordwrite twobytewrite ESRpagebufferwrite ESRblockerase ESReraseallunlockedblocks ESRsuspendtoreadarray ESRautomaticerasesuspendtowrite ESRfullstatuscheckfordatawrite ESRfullstatuscheckforerase singleloadtopagebuffer sequentialloadtopagebuffer uploaddeviceinformation RYBYreconfiguration pagebufferswap The names of these routines have been changed to more closely match the algorithms presented in the 28F016SA User's Manual (Order Number 297372). Please see Appendix A for a table documenting these changes. ABOUT THE 28F016SA Companion product datasheets for the 28F016SA should be reviewed in conjunction with this application note for a complete understanding of the device. The example code makes extensive use of bit-masking when interpreting the status registers. As a quick review, note that any bit in a register can be tested by bitwise ANDing the register with the appropriate power of two. Since all of the bits other than the one being 1 AP-377 tested are masked out, testing the resulting byte for truth is the same as testing the desired bit for truth. For example, if a register contains 01001010, the test for bit 3 would be ANDing the register with 00001000, or hex 8, and testing the result for truth: Binary 01001010 & 00001000 e 00001000 Hex 4A & 08 e 08 Register Mask for bit 3 Result GSR.7 Write State Machine Status 1 e ready 0 e busy GSR.6 Operation-suspend Status 1 e operation suspended 0 e operation in progress/ completed GSR.5 Device Operation Status 1 e operation unsuccessful 0 e operation successful or running GSR.4 Device Sleep Status 1 e device in sleep 0 e device not in sleep GSR.3 Queue Status 1 e queue full 0 e queue available GSR.2 Page Buffer Availability 1 e one/two page buffers available 0 e no page buffers available GSR.1 Page Buffer Status 1 e selected page buffer ready 0 e selected page buffer busy GSR.0 Page Buffer Select Status 1 e page buffer 1 selected 0 e page buffer 0 selected BSR.7 Block Status 1 e ready 0 e busy BSR.6 Block-lock Status 1 e block unlocked for write/erase 0 e block locked to write/erase BSR.5 Block Operation Status 1 e error in block operation 0 e successful block operation BSR.4 Block Operation Abort Status 1 e block operation aborted 0 e block operation not aborted BSR.3 Queue Status 1 e device queue full 0 e device queue available BSR.2 VPP Status 1 e VPP low detected 0 e VPP OK when operation occurred BSR.1 Reserved for future use BSR.0 Reserved for future use In this case the result byte is true, indicating that bit 3 in the register was a 1. The meanings of the individual bits of these registers is presented here for reference. Note that there are two status register spaces, both of which are distinct from the flash memory array address space. In the CSR space, the CSR is mapped to every address. In the ESR space, the GSR is mapped two words above the base of each 64K byte block, i.e. to addresses 2, 8002H, 10002H, etc. (in word mode), while each BSR is similarly mapped one word above the base of each 64K byte block to locations 1, 8001H, 10001H, etc. (in word mode), each BSR reflecting the status of its own block. CSR.7 Write State Machine Status 1 e ready 0 e busy CSR.6 Erase-suspend Status 1 e erase suspended 0 e erase in progress/ completed CSR.5 Erase Status 1 e error in block erase 0 e successful block erase CSR.4 Data-write Status 1 e error in data write 0 e successful data write CSR.3 VPP Status 1 e VPP low detect/ operation aborted 0 e VPP OK when operation occurred CSR.2 Reserved for future use CSR.1 Reserved for future use CSR.0 Reserved for future use 2 AP-377 28F016SA Commands 28F016XD and 28F016XS Feature Sets The 28F016SA command set is a superset of the 28F008SA command set, giving existing 28F008SA code the ability to run on the 28F016SA with minimal modifications. The following features are not supported on the 28F016XD and 28F016XS Fast Flash memories (as compared to the 28F016SA/SV/32SA FlashFile TM memories): # All page buffer operations (read, load, program, Up28F008SA-Compatible Commands 00 invalid/reserved 20 single block erase 40 50 word/byte write clear status registers 70 90 read CSR read ID codes B0 erase suspend D0 FF confirm/resume read flash array # # # # load Device Information) Command queuing Erase All Unlocked Blocks and Two-Byte Write Software Sleep and Abort RY/BYY reconfiguration via the Device Configuration command 28F016SA Performance-Enhancement Commands 0C 71 72 page buffer write to flash read GSR and BSRs (i.e. the ESR) page buffer swap 74 75 77 80 single load to page buffer read page buffer lock block abort 96,xx RY/BYY reconfiguration and SFI configuration (28F016XS) 97 99 A7 E0 upload BSRs with lock bit upload device information erase all unlocked blocks sequential load to page buffer F0 FB sleep two-byte write 3 AP-377 292126 - 1 4 AP-377 292126 - 2 5 AP-377 292126 - 3 6 AP-377 292126 - 4 7 AP-377 292126 - 5 8 AP-377 292126 - 6 9 AP-377 292126 - 7 10 AP-377 292126 - 8 11 AP-377 292126 - 9 12 AP-377 292126 - 10 13 AP-377 292126 - 11 14 AP-377 292126 - 12 15 AP-377 292126 - 13 16 AP-377 292126 - 14 17 AP-377 292126 - 15 18 AP-377 292126 - 16 19 AP-377 292126 - 17 20 AP-377 292126 - 18 21 AP-377 292126 - 19 22 AP-377 292126 - 20 23 AP-377 292126 - 21 24 AP-377 292126 - 22 25 AP-377 292126 - 23 26 AP-377 292126 - 24 27 AP-377 292126 - 25 28 AP-377 292126 - 26 29 AP-377 292126 - 27 30 AP-377 292126 - 28 31 AP-377 292126 - 29 32 AP-377 292126 - 30 33 AP-377 292126 - 31 34 AP-377 292126 - 32 35 AP-377 292126 - 33 36 AP-377 292126 - 34 37 AP-377 292126 - 35 38 AP-377 292126 - 36 39 AP-377 292126 - 37 40 AP-377 292126 - 38 41 AP-377 292126 - 39 42 AP-377 292126 - 40 43 AP-377 292126 - 41 44 AP-377 292126 - 42 45 AP-377 292126 - 43 46 AP-377 292126 - 44 47 AP-377 292126 - 45 48 AP-377 292126 - 46 49 AP-377 292126 - 47 50 AP-377 APPENDIX A FUNCTION CHANGES OLD FUNCTION NAME compatibleblockerase NEW FUNCTION NAME compatiblesuspendtoread CSRblockerase CSRerasesuspendtoread compatiblebytewrite CSRwordbytewrites ESRblockerase N/C ESRstatuscheckaftererase* ESRfullstatuscheckforerase ESRstatuscheckafterwrite* ESRsuspendtoread ESRfullstatuscheckfordatawrite ESRsuspendtoreadarray ESRwordwrite N/C eraseallunlockedblocks ESReraseallunlockedblocks N/C lockblock statusupload pagebufferwritetoflash sequentialpagebufferload lockstatusuploadtoBSR ESRpagebufferwrite sequentialloadtopagebuffer singlepagebufferload singleloadtopagebuffer twobytewrite N/C writeduringerase ESRautomaticerasesuspendtowrite NOTE: *code added in Rev 2.0. A-1 AP-377 APPENDIX B Glossary of Terms BSR: Block Status Register. Each BSR reflects the status of its 64KB block. CSR: Compatible Status Register. The CSR reflects the status of the entire device and is identical in format to the Status Register of the 28F008SA. EDI: ESR: Extended Data Index register on 80386 and higher CPUs. Extended Status Registers. The GSR and BSRs. GSR: Global Status Register. The GSR provides additional information about entire device status. RY/BYY: Output pin from the 28F016SA indicating status of current operation. VPP: Voltage necessary to program the 28F016SA (12V). WSM: Write State Machine. On-board processor automating write, erase and other functions. B-1 AP-377 APPENDIX C ADDITIONAL INFORMATION Order Number Document 290489 28F016SA Datasheet 292124 AP-375 Upgrade Considerations from the 28F008SA to the 28F016SA 297372 16-Mbit Flash Product User's Manual 292127 AP-378 System Optimization Using the Enhanced Features of the 28F016SA 294016 ER-33 Flash Memory Technology ETOX IV 290528 28F016SV Datasheet 292144 AP-393 28F016SV Compatibility with 28F016SA REVISION HISTORY Number Description 001 Original Version 002 Updated Version of C and ASM code, compatible with 28F016SV/XS/XD 003 Added 28F016XS and 28F016XD Feature Set notice C-1