LM7372 High Speed, High Output Current, Dual Operational Amplifier General Description Features The LM7372 is a high speed dual voltage feedback amplifier that has the slewing characteristic of current feedback amplifiers; yet it can be used in all traditional voltage feedback amplifier configurations. The LM7372 is stable for gains as low as +2 or -1. It provides a very high slew rate at 3000V/s and a wide gain bandwidth product of 120MHz, while consuming only 6.5mA/per amplifier of supply current. It is ideal for video and high speed signal processing applications such as xDSL and pulse amplifiers. With 150mA output current, the LM7372 can be used for video distribution, as a transformer driver or as a laser diode driver. Operation on 15V power supplies allows for large signal swings and provides greater dynamic range and signal-tonoise ratio. The LM7372 offers high SFDR and low THD, ideal for ADC/DAC systems. In addition, the LM7372 is specified for 5V operation for portable applications. The LM7372 is built on National's Advance VIP(R) III (Vertically integrated PNP) complementary bipolar process. -80dBc highest harmonic distortion @1MHz, 2VPP Very high slew rate: 3000V/s Wide gain bandwidth product: 120MHz -3dB frequency @ AV = +2: 200MHz Low supply current: 13mA (both amplifiers) High open loop gain: 85dB High output current: 150mA Differential gain and phase: 0.01%, 0.02 Applications HDSL and ADSL Drivers Multimedia broadcast systems Professional video cameras CATV/Fiber optics signal processing Pulse amplifiers and peak detectors HDTV amplifiers Typical Application 20004903 FIGURE 1. Single Supply Application (16-Pin SOIC) VIP(R) is a registered trademark of National Semiconductor Corporation. (c) 2008 National Semiconductor Corporation 200049 www.national.com LM7372 High Speed, High Output Current, Dual Operational Amplifier June 24, 2008 LM7372 Connection Diagrams 16-Pin SOIC 8-Pin PSOP 20004902 20004929 * Heatsink Pins. See note 4 Top View Top View Note: For PSOP and SOIC the exposed pad should be tied either to V- or left electrically floating. (Die attach material is conductive and is internally tied to V-) Ordering Information Symbol Temperature Range Package Marking Transport Media NSC Drawing -40C to 85C 16-Pin SOIC 8-Pin PSOP www.national.com LM7372IMA LM7372IMAX LM7372MR LM7372MRX LM7372IMA LM7372MR 2 48 Units/Rail 2.5k Units Tape and Reel 95 Units/Rail 2.5k Units Tape and Reel M16A MRA08B If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Operating Ratings ESD Tolerance Human Body Model 150C (Note 1) 9V VS 36V Supply Voltage 1.5kV (Note 2) Machine Model Suppy Voltage (V+-V-) Differential Input Voltage (VS = 15V) Output Short Circuit to Ground (Note 3) Storage Temp. Range Soldering Information V- to V+ Junction Temperature Range (TJ) 200V (Note 2) 36V 10V LM7372 -40C TJ 85C Thermal Resistance(JA) 16-Pin SOIC see (Note 4) Continuous -65C to 150C Infrared or Convection Reflow (20 sec.) 235C Wave Soldering Lead Temperature (10 sec.) 260C 106C/W 70C/W 8-Pin PSOP (Note 4) (see Application Information) 47C/W 15V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, VCM = 0V and RL = 1k. Boldface apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units 2.0 8.0 10.0 mV VOS Input Offset Voltage TC VOS Input Offset Voltage Average Drift 12 IB Input Bias Current 2.7 10 12 A IOS Input Offset Current 0.1 4.0 6.0 A RIN Input Resistance V/C Common Mode 40 M Differential Mode 3.3 M RO Open Loop Output Resistance 15 CMRR Common Mode Rejection Ratio VCM = 10V 75 70 93 dB PSRR Power Supply Rejection Ratio VS = 15V to 5V 75 70 90 dB VCM Input Common-Mode Voltage Range CMRR > 60dB 13 V AV Large Signal Voltage Gain (Note 7) RL = 1k 75 70 85 dB RL = 100 70 66 81 dB 13 12.7 13.4 V -13 -12.7 -13.3 V IOUT = - 150mA 11.8 11.4 12.4 V IOUT = 150mA -11.2 -10.8 -11.9 V Sourcing 260 mA Sinking 250 mA VO ISC IS Output Swing Output Short Circuit Current RL = 1k Supply Current (both Amps) 13 3 17 19 mA www.national.com LM7372 Input Voltage Maximum Junction Temperature (Note 4) Absolute Maximum Ratings (Notes 1, 3) LM7372 15V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, VCM = 0V and RL = 1k. Boldface apply at the temperature extremes. Symbol SR Parameter Slew Rate (Note 8) Conditions Min (Note 6) Typ (Note 5) AV = +2, VIN 13VP-P 3000 AV = +2, VIN 10VP-P 2000 Unity Bandwidth Product Max (Note 6) Units V/s 120 MHz -3dB Frequency AV = +2 220 MHz m Phase Margin AVOL = 6dB 70 deg tS Settling Time (0.1%) AV = -1, AO = 5V, 50 ns 6.0 ns RL = 500 tP Propagation Delay AV = -2, VIN = 5V, RL = 500 AD Differential Gain (Note 9) 0.01 % D Differential Phase (Note 9) 0.02 deg hd2 Second Harmonic Distortion FIN = 1MHz, AV = +2 VOUT = 2VP-P, RL = 100 -80 dBc VOUT = 16.8VP-P, RL = 100 -73 dBc VOUT = 2VP-P, RL = 100 -91 dBc hd3 Third Harmonic Distortion FIN = 1MHz, AV = +2 VOUT = 16.8VP-P, RL = 100 -67 dBc IMD Intermodulation Distortion Fin 1 = 75kHz, Fin 2 = 85kHz VOUT = 16.8VP-P, RL = 100 -87 dBc en Input-Referred Voltage Noise f = 10kHz 14 nV/ in Input-Referred Current Noise f = 10kHz 1.5 pA/ 5V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, VCM = 0V and RL = 1k. Boldface apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units 8.0 10.0 mV VOS Input Offset Voltage 2.2 TC VOS Input Offset Voltage Average Drift 12 IB Input Bias Current 3.3 10 12 A IOS Input Offset Current 0.1 4 6 A RIN Input Resistance V/C Common Mode 40 M Differential Mode 3.3 M 15 RO Open Loop Output Resistance CMRR Common Mode Rejection Ratio VCM = 2.5V 70 65 90 dB PSRR Power Supply Rejection Ratio VS = 15V to 5V 75 70 90 dB VCM Input Common-Mode Voltage Range CMRR > 60dB AV Large Signal Voltage Gain (Note 7) www.national.com 3 V RL = 1k 70 65 78 dB RL = 100 64 60 72 dB 4 VO Parameter Output Swing Conditions Min (Note 6) Typ (Note 5) 3.2 3.0 3.4 V -3.2 -3.0 -3.4 V IOUT = - 80mA 2.5 2.2 2.8 V IOUT = 80mA -2.5 -2.2 -2.7 V 150 mA RL = 1k ISC Output Short Circuit Current IS Supply Current (both Amps) Sourcing Sinking Max (Note 6) Units 150 12.4 mA 16 18 mA 5V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, VCM = 0V and RL = 1k. Boldface apply at the temperature extremes. Symbol SR Parameter Slew Rate (Note 8) Conditions Min (Note 6) AV = +2, VIN 3VP-P Unity Bandwidth Product -3dB Frequency AV = +2 Typ (Note 5) Max (Note 6) Units 700 V/s 100 MHz 125 MHz m Phase Margin 70 deg tS Settling Time (0.1%) AV = -1, VO = 1V, RL = 500 70 ns tP Propagation Delay AV = +2, VIN = 1V, RL = 500 7 ns AD Differential Gain (Note 9) 0.02 % D Differential Phase (Note 9) 0.03 deg hd2 Second Harmonic Distortion FIN = 1MHz, AV = +2 VOUT = 2VP-P, RL = 100 -84 dBc hd3 Third Harmonic Distortion FIN = 1MHz, AV = +2 VOUT = 2VP-P, RL = 100 -94 dBc en Input-Referred Voltage Noise f = 10kHz 14 nV/ in Input-Referred Current Noise f = 10kHz 1.8 pA/ Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: For testing purposes, ESD was applied using human body model, 1.5k in series with 100pF. Machine model, 0 in series with 200pF. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Note 4: The maximum power dissipation is a function of T(JMAX), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (T (JMAX) - TA)/JA. All numbers apply for packages soldered directly into a PC board. The value for JA is 106C/W for the 16-Pin SOIC package. With a total area of 4sq. in of 1oz CU connected to pins 1,6,8,9 & 16, JA for the 16-Pin SOIC is decreased to 70C/W. 8-Pin PSOP package JA is with 2 in2 heatsink (top and bottom layer each) and 1 oz. copper (see Table 2). Note 5: Typical values represent the most likely parametic norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Large signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = 15V, VOUT = 10V. For VS = 5V, VOUT = 2V Note 8: Slew Rate is the average of the rising and falling slew rates. Note 9: Differential gain and phase are measured with AV = +2, VIN = 1VPP at 3.58 MHz and output is 150 terminated. 5 www.national.com LM7372 Symbol LM7372 Typical Performance Characteristics Harmonic Distortion vs. Frequency Harmonic Distortion vs. Frequency 20004904 20004905 Harmonic Distortion vs. Frequency Harmonic Distortion vs. Frequency 20004907 20004906 Harmonic Distortion vs. Output Level Harmonic Distortion vs. Output Level 20004908 www.national.com 20004909 6 LM7372 Harmonic Distortion vs. Output Level Harmonic Distortion vs. Output Level 20004910 20004911 Harmonic Distortion vs. Load Resistance Harmonic Distortion vs. Load Resistance 20004912 20004913 Harmonic Distortion vs. Load Resistance Harmonic Distortion vs. Load Resistance 20004914 20004915 7 www.national.com LM7372 Frequency Response Frequency Response 20004917 20004916 Frequency Response Small Signal Pulse Response 20004920 20004918 Large Signal Pulse Response Thermal Performance of 8ld-PSOP 20004921 20004922 www.national.com 8 Input Bias Current (A) vs. Temperature 20004923 20004927 Output Voltage vs. Output Current 20004924 9 www.national.com LM7372 Harmonic Distortion vs. Frequency LM7372 Simplified Schematic Diagram 20004928 Application Information The LM7372 is a high speed dual operational amplifier with a very high slew rate and very low distortion, yet like many other op amps, it is used in conventional voltage feedback amplifier applications. Also, again like many op amps, it has a class AB output stage in order to be able to deliver high currents to low impedance loads, yet draw a low quiescent supply current in most situations (the supply current increases when necessary to keep up with large output swing and/or high frequency. See "High Frequency/Large Signal Swing Considerations" section below). For most op amps in typical applications, this topology means that internal power dissipation is rarely an issue, even with the trend to smaller surface mount packages. However, the LM7372 has been designed for applications where significant levels of power dissipation will be encountered, and an effective means of removing the internal heat generated by this power dissipation is needed to maintain the semiconductor junction temperature at acceptable levels, particularly in environments with elevated ambient temperatures. Several factors contribute to power dissipation and consequently higher semiconductor junction temperatures, and these factors need to be well understood if the LM7372 is to perform to the desired specifications in a given application. Since different applications will have different dissipation levels and different compromises can be made between the ways these factors will contribute to the total junction temperature, this section will examine the typical application shown on the front page of this data sheet as an example, and offer suggestions for solutions where excessive junction temperatures are encountered. There are two major contributors to the internal power dissipation; the product of the supply voltage and the LM7372 quiescent current when no signal is being delivered to the external load, and the additional power dissipated while delivering power to the external load. For low frequency (<1MHz) applications, the LM7372 supply current specification will sufwww.national.com fice to come up with the quiescent power dissipation (see "High Frequency/Large Signal Swing Considerations" section for cases where the frequency range exceeds 1MHz and the LM7372 supply current increases) . The LM7372 quiescent supply current is given as 6.5mA per amplifier, so with a 24Volt supply the power dissipation is PQ = VS x 2Iq (VS = V+ - V-) = 24 x 2 x (6.5 x 10-3) = 312mW This is already a high level of internal power dissipation, and in a small surface mount package with a thermal resistance (JA = 140C/Watt (a not unreasonable value for an 8-Pin SOIC package) would result in a junction temperature 140C/ W x 0.312W = 43.7C above the ambient temperature. A similar calculation using the worst case maximum supply current specification of 8.5mA per amplifier at an 85C ambient will yield a power dissipation of 456mW with a junction temperature of 149C, perilously close to the maximum permitted junction temperature of 150C! The second contributor to high junction temperature is the additional power dissipated internally when power is being delivered to the external load. This cause of temperature rise can be less amenable to calculation, even when the actual operating conditions are known. For a Class B output stage, one transistor of the output pair will conduct the load current as the output voltage swings positive, with the other transistor drawing no current, and hence dissipating no power. During the other half of the signal swing this situation is reversed, with the lower transistor sinking the load current and the upper transistor is cut off. The current in each transistor will be a half wave rectified version of the total load current. Ideally neither transistor will dissipate power when there is no signal swing, but will dissipate increasing power as the output current increases. However, as 10 amplitudes which may demonstrate lower average power dissipation levels. The average current for a load power of 20mW is 14.1mA (= (20mW/100)). Neglecting the AB bias current, this appears as a full-wave rectified current waveform in the supply current with a peak value of 19.9mA. The peak to average ratio for a waveform of this shape is 1.57, so the total average load current is 12.7mA (= 19.9mA/1.57). Adding this to the quiescent current, and subtracting the power dissipated in the load (20mV x 2 = 40mW) gives the same package power dissipation level calculated above (= (12.7 + 13) mA x 24V -40mV = 576 mW). Nevertheless, when the supply current peak swing is measured, it is found to be significantly lower because the AB bias current is contributing to the load current. The supply current has a peak swing of only 14mA (compared to 19.9mA) superimposed on the quiescent current, with a total average value of only 21mA. Therefore the total package power dissipation in this application is PD = VSVL/RL - VL2/2RL..........(1) Where VS is the supply voltage and VL is the peak signal swing across the load RL. For the package, the power dissipation will be doubled since there are two amplifiers in the package, each contributing half the swing across the load. The circuit in Figure 1 is using the LM7372 as the upstream driver in an ADSL application with Discrete MultiTone modulation. With DMT the upstream signal is spread into 32 adjacent channels each 4kHz wide. For transmission over POTS, the regular telephone service, this upstream signal from the CPE (Customer Premise Equipment) occupies a frequency band from around 20kHz up to a maximum frequency of 135kHz. At first sight, these relatively low transmission frequencies certainly do not seem to require the use of very high speed amplifiers with GBW products in the range of hundreds of megahertz. However, the close spacing of multiple channels places stringent requirements on the linearity of the amplifier, since non-linearities in the presence of multiple tones will cause harmonic products to be generated that can easily interfere with the higher frequency down stream signals also present on the line. The need to deliver 3rd Harmonic distortion terms lower than -75dBc is the reason for the LM7372 quiescent current levels. Each amplifier is running over 3mA in the output stage alone in order to minimize crossover distortion. xDSL signal levels are adjusted to provide a given power level on the line, and in the case of ADSL this is an average power of 13dBm. For a line with a characteristic impedance of 100 this is only 20mW (= 1mW x 10(13/10)). Because the transformer shown in Figure 1 is part of a transceiver circuit, two back-termination resistors are connected in series with each amplifier output. Therefore the equivalent RL for each amplifier is also 100, and each amplifier is required to deliver 20mW to this load. PD(TOTAL) = (VS x Iavg) - Power in Load = (24 x 21)mW - 40mW = 464mW This level of power dissipation would not take the junction temperature in the 8-Pin SOIC package over the absolute maximum rating at elevated ambient temperatures (barely), but there is no margin to allow for component tolerances or signal variances. To develop 20mW in a 100 requires each amplifier to deliver a peak voltage of only 2V, or 4V(P-P). This level of signal swing does not require a high supply voltage but the application uses a 24V supply. This is because the modulation technique uses a large number of tones to transmit the data. While the average power level is held to 20mW, at any time the phase and amplitude of individual tones will be such as to generate a combined signal with a higher peak value than 2V. For DMT this crest factor is taken to be around 5.33 so each amplifier has to be able to handle a peak voltage swing of VLpeak = 1.4 x 5.33 = 7.5V or 15V(P-P) If other factors, such as transformer loss or even higher peak to average ratios are allowed for, this means the amplifiers must each swing between 16 to 18V(P-P). The required signal swing can be reduced by using a step-up transformer to drive the line. For example a 1:2 ratio will reduce the peak swing requirement by half, and this would allow the supply to be reduced by a corresponding amount. This is not recommended for the LM7372 in this particular application for two reasons. Although the quiescent power contribution to the overall dissipation is reduced by about 150mW, the internal power dissipation to drive the load remains the same, since the load for each amplifier is now 25 instead of 100. Furthermore, this is a transceiver application where downstream signals are simultaneously appearing at the transformer secondary. The down stream signals appear differentially across the back termination resistors and are now stepped down by the transformer turns ratio with a consequent loss in receiver sensitivity compared to using a 1:1 transformer. Any trade-off to reduce the supply voltage by an increase in turns ratio should bear these factors in mind, as well as the increased signal current levels required with lower impedance loads. At an elevated ambient temperature of 85C and with an average power dissipation of 464mW, a package thermal resistance between 60C/W and 80C/W will be needed to keep the maximum junction temperature in the range 110C to 120C. The PSOP package would be the package of choice Since VL2/2RL = 20mW then VL = 2V(peak). Using Equation (1) with this value for signal swing and a 24V supply, the internal power dissipation per amplifier is 132.8mW. Adding the quiescent power dissipation to the amplifier dissipation gives the total package internal power dissipation as PD(TOTAL) = 312mW + (2 x 132.8mW) = 578mW This result is actually quite pessimistic because it assumes that the dissipation as a result of load current is simply added to the dissipation as a result of quiescent current. This is not correct since the AB bias current in the output stage is diverted to load current as the signal swing amplitude increases from zero. In fact with load currents in excess of 3.3mA, all the bias current is flowing in the load, consequently reducing the quiescent component of power dissipation. Also, it assumes a sine wave signal waveform when the actual waveform is composed of many tones of different phases and 11 www.national.com LM7372 the signal voltage across the load increases with load current, the voltage across the output transistor (which is the difference voltage between the supply voltage and the instantaneous voltage across the load) will decrease and a point will be reached where the dissipation in the transistor will begin to decrease again. If the signal is driven into a square wave, ideally the transistor dissipation will fall all the way back to zero. For each amplifier then, with an effective load each of RL and a sine wave source, integration over the half cycle with a supply voltage VS and a load voltage VL yields the average power dissipation LM7372 through the small diameter bonding wires. Values of JA in C/W for the PSOP package with various areas and weights of copper are tabulated below. here with ample board copper area to aid in heat dissipation (see table 2). For most standard surface mount packages, 8-Pin SOIC, 14Pin SOIC, 16-Pin SOIC etc, the only means of heat removal from the die is through the bond wires to external copper connecting to the leads. Usually it will be difficult to reduce the thermal resistance of these packages below 100C/W by these methods and several manufacturers, including National, offer package modifications to enhance the thermal characteristics. TABLE 2. Thermal Resistance of PSOP Package FIGURE 2. Copper Heatsink Patterns The LM7372 is available in the 16-Pin SOIC package. Since only 8 pins are needed for the two operational amplifiers, the remaining pins are used for heat sink purposes. Each of the end pins, 1,8,9 & 16 are internally bonded to the lead frame and form an effective means of transferring heat to external copper. This external copper can be either electrically isolated or be part of the topside ground plane in a single supply application. Figure 2. shows a copper pattern which can be used to dissipate internal heat from the LM7372. Table 1 gives some values of JA for different values of L and H with 1oz copper. TABLE 1. 16-Pin SOIC Thermal Resistance with Area of Cu H (in) JA (C/W) 1 0.5 83 2 1 70 3 1.5 67 0.5 in2 (each side) 1.0 in2 (each side) 2.0 in2 (each side) 0.5 oz 1.0 oz 2.0 oz Top Layer Only 115 91 74 105 79 60 102 72 52 0.5 oz 1.0 oz 2.0 oz Bottom Layer Only 102 92 85 88 75 66 81 65 54 0.5 oz 1.0 oz 2.0 oz Top And Bottom 83 71 63 70 57 48 63 47 37 HIGH FREQUENCY/LARGE SIGNAL SWING CONSIDERATIONS The LM7372 employs a unique input stage in order to support large slew rate and high output current capability with large output swings, with a relatively low quiescent current. This input architecture boosts the device supply current when the application demands it. The result is a supply current which increases at high enough frequencies when the output swing is large enough with added power dissipation as a consequence. Figure 3 shows the amount of increase in supply current as a function of frequency for various sinusoidal output swing amplitudes: From Table 1 it is apparent that two areas of 1oz copper at each end of the package, each 2 in2 in area (for a total of 2600mm2) will be sufficient to hold the maximum junction temperature under 120C with an 85C ambient temperature. An even better package for removing internally generated heat is a package with an exposed die attach paddle. Improved removal of internal heat can be achieved by directly connecting bond wires to the lead frame inside the package. Since this lead frame supports the die attach paddle, heat is transferred directly from the substrate to the outside copper by these bond wires. The LM7372 is also available in the 8Pin PSOP package. For this package the entire lower surface of the paddle is not covered with plastic, which would otherwise act as a thermal barrier to heat transfer. Heat is transferred directly from the die through the paddle rather than www.national.com Area Table 2 clearly demonstrates the superior thermal qualities of the exposed pad package. For example, using the topside copper only in the same way as shown for the SOIC package (Figure 2), the PSOP requires half the area of 1 oz copper (2 in2, total or 1300mm2), for a comparable thermal resistance of 72C/Watt. This gives considerably more flexibility in the pcb layout aside from using less copper. The shape of the heat sink shown in Figure 2 is necessary to allow external components to be connected to the package pins. If thermal vias are used beneath the PSOP to the bottom side ground plane, then a square pattern heat sink can be used and there is no restriction on component placement on the top side of the board. Even better thermal characteristics are obtained with bottom layer heat sinking. A 2 inch square of 0.5oz copper gives the same thermal resistance (81C/W) as a competitive thermally enhanced 8-Pin SOIC package which needs two layers of 2 oz copper, each 4 in2 (for a total of 5000 mm2). With heavier copper, thermal resistances as low as 54C/W are possible with bottom side heat sinking only, substantially improving the long term reliability since the maximum junction temperature is held to less than 110C, even with an ambient temperature of 85C. If both top and bottom copper planes are used, the thermal resistance can be brought to under 40C/W. 20004925 L (in) Copper 12 PD(TOTAL) = PQ + PDC + PAC PQ = |IS * VS| PDC = |IO * (VR - VO)| Op Amp Quiescent Power Dissipation DC Load Power PAC = See Table 3 below AC Load Power where: 20004930 FIGURE 3. Power Supply Current Increase Figure 3 shows that there could be 1mA or more excess supply current per amplifier with close to full output swing (24VPP) when frequency is just above 1MHz (or at higher frequencies when the output swing is less). This boost in supply current enables the output to "keep up" with high frequency/ large signal output swing, but in turn, increases the total package power dissipation and therefore raises the device junction temperature. As a consequence, these demanding applications, especially ones which run at higher supply voltages, need special attention to the package heatsink design. For that reason, Figure 3 has the safe operating limits for the 8-Pin PSOP package (e.g. "30V supply (2 amplifiers)" horizontal line) superimposed on top of it (with TJ limit of 140C when operated at 85C ambient), so that the designer can readily decide whether or not there is need for additional heat sinking. For example, if the LM7372 is operating similarly to Figure 1 schematic with a single power supply of 10V, Figure 3 shows that it is safe to have up to 10VPP output swing at up to 40MHz with no additional heat sinking. This determination is from inspection of Figure 3 where the "10V supply (2 amplifiers)" safe operating limit intercepts the 10VPP swing graph at around 40MHz. Use the "10V supply (1 amplifier)" safe operating limit line in cases where the second amplifier in the LM7372 package does not experience high frequency/high output swing conditions. At any given "IS increase" value (y axis), the product of frequency and output swing remains essentially constant for all output swing plots. This holds true for the lower frequency range before the plots experience a slope increase. Therefore, if the application example just discussed operates up to 60MHz instead, it is possible to calculate the junctiontemperature-limited maximum output swing of 6.7VPP (= 40MHz x 10VPP/60MHz) instead. Please note that Figure 3 precludes any additional amplifier power dissipation related to load (this topic is discussed below in detail). This load current, if large enough, will reduce the operating frequency/output swing further. It is important to note that the LM7372 can be destroyed if it is allowed to dissipate enough power that compromises its maximum junction temperature limit of 150C. With the op amp tied to a load, the device power dissipation consists of the quiescent power due to the supply current flow into the device, in addition to power dissipation due to the load current. The load portion of the power itself could include an IS Supply Current VS Total Supply Voltage (V+ - V-) IO Average Load Current VO Average Output Voltage VR Reference Voltage (V+ for sourcing and V- for sinking current) Table 3 below shows the maximum AC component of the load power dissipated by the op amp for standard Sinusoidal, Triangular, and Square Waveforms: TABLE 3. Normalized maximum AC Power Dissipated in the Output Stage for Standard Waveforms PAC (W./V2) Sinusoidal Triangular Square 50.7 x 10-3 46.9 x 10-3 62.5 x 10-3 The table entries are normalized to VS2/RL. These entries are computed at the output swing point where the amplifier dissipation is the highest for each waveform type. To figure out the AC load current component of power dissipation, simply multiply the table entry corresponding to the output waveform by the factor VS2/RL. For example, with 5V supplies, a 100 load and triangular output waveform, power dissipation in the output stage is calculated as: PAC = 46.9 x 10-3 x 102/100 = 46.9mW which contributes another 2.2C (= 46.9mW x 47C/W) rise to the LM7372 junction temperature in the 8-Pin PSOP package. POWER SUPPLIES The LM7372 is fabricated on a high voltage, high speed process. Using high supply voltages ensures adequate headroom to give low distortion with large signal swings. In Figure 1, a single 24V supply is used. To maximize the output dynamic range the non-inverting inputs are biased to half supply voltage by the resistive divider R1, R2. The input signals are AC coupled and the coupling capacitors (C1, C2) can be scaled with the bias resistors (R3, R4) to form a high pass filter if unwanted coupling from the POTS signal occurs. Supply decoupling is important at both low and high frequencies. The 10F Tantalum and 0.1F Ceramic capacitors should be connected close to the supply Pin 14. Note that the V- pin (pin 6), and the PCB area associated with the heatsink (Pins 1,8,9 & 16) are at the same potential. Any layout should avoid running input signal leads close to this ground plane, or unwanted coupling of high frequency supply currents may generate distortion products. Although this application shows a single supply, conversion to a split supply is straightforward. The half supply resistive divider network is eliminated and the bias resistors at the non- 13 www.national.com LM7372 average value (due to a DC load current) and an AC component. DC load current would flow if there is an output voltage offset, or the output AC average current is non-zero, or if the op amp operates in a single supply application where the output is maintained somewhere in the range of linear operation. Therefore: LM7372 inverting inputs are returned to ground, see Figure 4 (the pin numbers in Figure 4 are given for PSOP package, those in Figure 1 are for the SOIC package). With a split supply, note that the ground plane and the heatsink copper must be separate and are at different potentials, with the heatsink (pin 4 of the PSOP, pins 6,1,8,9 &16 of the SOIC) now at a negative potential (V-). In either configuration, the area under the input pins should be kept clear of copper (Whether ground plane copper or heatsink copper) to avoid parasitic coupling to the inputs. The LM7372 is stable with non inverting closed loop gains as low as +2. Typical of any voltage feedback operational amplifier, as the closed loop gain of the LM7372 is increased, there is a corresponding reduction in the closed loop signal bandwidth. For low distortion performance it is recommended to keep the closed loop bandwidth at least 10X the highest signal frequency. This is because there is less loop gain (the difference between the open loop gain and the closed loop gain) available at higher frequencies to reduce harmonic distortion terms. 20004926 FIGURE 4. Split Supply Application (PSOP) PRINTED CIRCUIT BOARD LAYOUT and EVALUATION BOARDS Generally, a good high-frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitance on these nodes to ground will cause frequency response peaking and possible circuit oscillations (see Application Note OA-15 for more information). National Semiconductor suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization: www.national.com Device Package LM7372MA LM7372MR 16-Pin SOIC 8-Pin PSOP Evaluation Board PN None CLC730121 These free evaluation boards are shipped automatically when a device sample request is placed with National Semiconductor. The DAP (die attach paddle) on the 8-Pin PSOP should be tied to V-. It should not be tied to ground. See the respective Evaluation Board documentation. 14 LM7372 Physical Dimensions inches (millimeters) unless otherwise noted 16-Pin SOIC NS Package Number M16A 8-Pin PSOP NS Package Number MRA08B 15 www.national.com LM7372 High Speed, High Output Current, Dual Operational Amplifier Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH www.national.com/webench Audio www.national.com/audio Analog University www.national.com/AU Clock Conditioners www.national.com/timing App Notes www.national.com/appnotes Data Converters www.national.com/adc Distributors www.national.com/contacts Displays www.national.com/displays Green Compliance www.national.com/quality/green Ethernet www.national.com/ethernet Packaging www.national.com/packaging Interface www.national.com/interface Quality and Reliability www.national.com/quality LVDS www.national.com/lvds Reference Designs www.national.com/refdesigns Power Management www.national.com/power Feedback www.national.com/feedback Switching Regulators www.national.com/switchers LDOs www.national.com/ldo LED Lighting www.national.com/led PowerWise www.national.com/powerwise Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors Wireless (PLL/VCO) www.national.com/wireless THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. 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