AUTOMOTIVE GRADE Features Advanced Planar Technology Dual N Channel MOSFET Low On-Resistance Logic Level Gate Drive Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * AUIRF7103Q S1 1 8 D1 G1 2 7 D1 S2 3 6 D2 G2 4 5 D2 Package Type AUIRF7103Q SO-8 50V RDS(on) max. ID Top View Description Specifically designed for Automotive applications, this cellular design of HEXFET(R) Power MOSFETs utilizes the latest processing techniques to achieve low on-resistance per silicon area. This benefit combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in Automotive and a wide variety of other applications. Base part number VDSS 130m 3.0A SO-8 AUIRF7103Q G Gate Standard Pack Form Quantity Tape and Reel 4000 D Drain S Source Orderable Part Number AUIRF7103QTR Absolute Maximum Ratings Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25C, unless otherwise specified. Symbol Parameter Max. ID @ TA = 25C Continuous Drain Current, VGS @ 4.5V 3.0 ID @ TA = 70C IDM PD @TA = 25C Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current Maximum Power Dissipation 2.5 25 2.4 VGS EAS IAR EAR dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Thermal Resistance Symbol RJL RJA Parameter Junction-to-Drain Lead Junction-to-Ambient Units A W 16 20 22 See Fig.19,20, 16b, 16c 12 -55 to + 175 W/C V mJ A mJ V/ns C Typ. Max. Units --- --- 20 62.5 C/W HEXFET(R) is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-9-30 AUIRF7103Q Static @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Trans conductance IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 50 --- --- V VGS = 0V, ID = 250A --- 0.057 --- V/C Reference to 25C, ID = 1mA --- --- 130 VGS = 10V, ID = 3.0A m --- --- 200 VGS = 4.5V, ID = 1.5A 1.0 --- 3.0 V VDS = VGS, ID = 250A 3.4 --- --- S VDS = 15V, ID = 3.0A --- --- 2.0 VDS =40V, VGS = 0V A --- --- 25 VDS = 40V,VGS = 0V,TJ =55C --- --- 100 VGS = 20V nA --- --- -100 VGS = -20V Dynamic Electrical Characteristics @ TJ = 25C (unless otherwise specified) Total Gate Charge Qg Qgs Gate-to-Source Charge Qgd Gate-to-Drain Charge td(on) Turn-On Delay Time Rise Time tr td(off) Turn-Off Delay Time Fall Time tf Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge ton Forward Turn-On Time --- --- --- --- --- --- --- --- --- --- 10 1.2 2.8 5.1 1.7 15 2.3 255 69 29 15 --- --- --- --- --- --- --- --- --- Min. Typ. Max. Units --- --- 3.0 --- --- 12 --- --- --- --- 35 45 1.2 53 67 ID = 2.0A nC VDS = 40V VGS = 10V VDD = 25V ID = 1.0A ns RG = 6.0 RD = 25 VGS = 0V pF VDS = 25V = 1.0MHz Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25C,IS = 1.5A,VGS = 0V ns TJ = 25C ,IF = 1.5A, nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400s; duty cycle 2%. Surface mounted on 1" in square Cu board. Starting TJ = 25C, L = 4.9mH, RG = 25, IAS = 3.0A. (See Fig. 12) ISD 2.0A, di/dt 155A/s, VDD V(BR)DSS, TJ 175C. Limited by TJmax , see Fig.16b, 16c, 19, 20 for typical repetitive avalanche performance. 2 2015-9-30 AUIRF7103Q 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 4.5V 10 20s PULSE WIDTH Tj = 25C 10 1 20s PULSE WIDTH Tj = 175C 0.1 1 0.1 1 10 0.1 100 2.5 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current ) 100.00 T J = 175C T J = 25C VDS = 25V 20s PULSE WIDTH 1.00 3.0 6.0 9.0 12.0 10 100 Fig. 2 Typical Output Characteristics Fig. 1 Typical Output Characteristics 10.00 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 15.0 VGS, Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 4.5V ID = 3.0A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 V GS= 10V 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( C) Fig. 4 Normalized On-Resistance vs. Temperature 2015-9-30 AUIRF7103Q 10000 12 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd VGS, Gate-to-Source Voltage (V) Ciss Coss 100 V DS = 40V V DS = 25V V DS = 10V 9 1000 Crss 6 3 10 0 1 10 100 0 3 6 9 12 Q G, Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 100 ID, Drain-to-Source Current (A) C, Capacitance(pF) Coss = Cds + Cgd I D = 2.0A OPERATION IN THIS AREA LIMITED BY R DS (on) 10 1 100sec 1msec 0.1 Tc = 25C Tj = 175C Single Pulse 0.01 0 1 10msec 10 100 1000 VDS , Drain-toSource Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 4 Fig 8. Maximum Safe Operating Area 2015-9-30 AUIRF7103Q 3.0 ID , Drain Current (A) 2.4 1.8 1.2 Fig 10a. Switching Time Test Circuit 0.6 0.0 25 50 75 100 125 T C , Case Temperature 150 175 ( C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response ( Z thJA ) C/W 100 D = 0.50 0.20 0.10 0.05 10 0.02 0.01 1 0.1 SINGLE PULSE ( THERMAL RESPONSE ) 0.01 1E-006 1E-005 0.0001 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + TA 0.001 0.01 0.1 1 10 100 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 5 2015-9-30 0.15 R DS (on) , Drain-to-Source On Resistance ( ) RDS(on) , Drain-to -Source On Resistance ( ) AUIRF7103Q 0.14 0.13 0.12 ID = 3.0A 0.11 0.10 0.09 4.5 6.0 7.5 9.0 10.5 12.0 13.5 2.500 2.000 VGS = 4.5V 1.500 1.000 0.500 VGS = 10V 0.000 0 15.0 Fig 12. Typical On-Resistance Vs. Gate Voltage 15 20 25 30 35 40 70 60 1.8 50 ID = 250A Power (W) V GS(th) Gate threshold Voltage (V) 10 Fig 13. Typical On-Resistance Vs. Drain Current 2.0 1.5 40 30 20 1.3 10 1.0 -75 -50 -25 0 25 50 75 100 125 150 TJ , Temperature ( C ) Fig. 14. Typical Threshold Voltage Vs. Junction Temperature 6 5 ID , Drain Current (A) -VGS, Gate -to -Source Voltage (V) 0 1.00 10.00 100.00 1000.00 Time (sec) Fig 15. Typical Power Vs. Time 2015-9-30 EAS , Single Pulse Avalanche Energy (mJ) AUIRF7103Q 15V 60 ID 1.2A 2.5A 3.0A TOP 48 BOTTOM D.U.T RG 36 DRIVER L VDS + V - DD IAS 20V 24 A 0.01 tp Fig 16b. Unclamped Inductive Test Circuit 12 V(BR)DSS 0 25 50 75 100 125 150 Starting T ,JJunction Temperature tp 175 ( C) Fig 16a. Maximum Avalanche Energy vs. Drain Current I AS Fig 16c. Unclamped Inductive Waveforms Id Vds Vgs Vgs(th) Qgs1 Qgs2 Fig 17. Gate Charge Test Circuit 7 Qgd Qgodr Fig 18. Basic Gate Charge Waveform 2015-9-30 AUIRF7103Q 1000 Duty Cycle = Single Pulse Avalanche Current (A) 100 Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses 10 1 0.01 0.1 0.05 0.10 0.01 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 tav (sec) Fig 19. Typical Avalanche Current vs. Pulse width EAR , Avalanche Energy (mJ) 25 Notes on Repetitive Avalanche Curves , Figures 19, 20: (For further info, see AN-1005 at www.infineon.com) TOP Single Pulse BOTTOM 10% Duty Cycle ID = 3.0A 20 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16b, 16c. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 11, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 11) 15 10 5 0 25 50 75 100 125 150 Starting T J , Junction Temperature (C) 175 PD (ave) = 1/2 ( 1.3*BV*Iav) = T/ ZthJC Iav = 2T/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav Fig 20. Maximum Avalanche Energy vs. Temperature 8 2015-9-30 AUIRF7103Q SO-8 Package Outline (Dimensions are shown in millimeters (inches) D D IM B 8 6 7 6 M IN A .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 E .1497 .1574 3.80 4.00 e .050 B ASIC 1.27 B ASIC e1 5 H E 1 6X 2 3 0.25 [ .010] 4 A e e1 0.25 [ .010] A1 C A M AX .025 B ASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0 8 0 8 K x 45 A C 8X b M ILLIM ETERS M AX 5 A IN C H ES M IN y 0.10 [ .004] B 8X L F O O T P R IN T N O TE S : 1. D IM E N S IO N IN G & T O L E R A N C IN G P E R A S M E Y 1 4 . 5 M - 1 9 9 4 . 2. C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R 3. D IM E N S IO N S A R E S H O W N IN M IL L IM E T E R S [ IN C H E S ] . 4. O U T L IN E C O N F O R M S T O J E D E C O U T L IN E M S - 0 1 2 A A . 5 D IM E N S IO N D O E S N O T IN C L U D E M O L D P R O T R U S IO N S . M O L D P R O T R U S IO N S N O T T O E X C E E D 0 .1 5 [ . 0 0 6 ] . 6 D IM E N S IO N D O E S N O T IN C L U D E M O L D P R O T R U S IO N S . M O L D P R O T R U S IO N S N O T T O E X C E E D 0 .2 5 [ . 0 1 0 ] . 7 D IM E N S IO N IS T H E L E N G T H O F L E A D F O R S O L D E R IN G T O A S U B S TR A TE . 8X c 7 8 X 0 .7 2 [ .0 2 8 ] 6 .4 6 [ .2 5 5 ] 3 X 1 .2 7 [ .0 5 0 ] 8 X 1 .7 8 [ .0 7 0 ] SO-8 Part Marking Information 9 2015-9-30 AUIRF7103Q SO-8 Tape and Reel (Dimensions are shown in millimeters (inches) TERMINAL NUMBER 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 330.00 (12.992) MAX. 14.40 ( .566 ) 12.40 ( .488 ) NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541. 10 2015-9-30 AUIRF7103Q Qualification Information Qualification Level Moisture Sensitivity Level Machine Model Human Body Model ESD Charged Device Model RoHS Compliant Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon's Industrial and Consumer qualification level is granted by extension of the higher Automotive level. SO-8 MSL1 Class M1A (+/- 50V) AEC-Q101-002 Class H0 (+/- 250V) AEC-Q101-001 Class C5 (+/- 1125V) AEC-Q101-005 Yes Highest passing voltage. Revision History Date 4/3/2014 9/30/2015 Comments Added "Logic Level Gate Drive" bullet in the features section on page 1 Updated data sheet with new IR corporate template Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 Munchen, Germany (c) Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies' products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 11 2015-9-30