Pb Lead-free Green A product Line of Diodes Incorporated PI6CB18401 Very Low Power 4-Output PCIe Clock Buffer With On-chip Termination Features Description II1.8V supply voltage The PI6CB18401 is an 4-output very low power PCIe Gen1/Gen2/ Gen3/Gen4 clock buffer. It takes an reference input to fanout four 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 16 external resistors and make layout easier. Individual OE pin for each output provides easier power management. IIHCSL input: 100MHz, also suppport 50MHz or 125MHz via SMBus II4 differential low power HCSL outputs with on-chip termination IIIndividual output enable IIProgrammable Slew rate and output amplitude for each output IIDifferential outputs blocked until PLL is locked IIStrapping pins or SMBus for configuration; II3.3V tolerant SMBus interface support IIVery low jitter outputs yyDifferential cycle-to-cycle jitter <50ps yyDifferential output-to-output skew <50ps yyPCIe Gen1/Gen2/Gen3/Gen4 compliant IITotally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) IIHalogen and Antimony Free. "Green" Device (Note 3) IIFor automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/ IIPackaging (Pb-free & Green): 32-lead 5x5mm TQFN It uses Diodes proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4 requirements. Other than PCIe 100MHz support, this device also support Ethernet application with 50MHz or 125MHz via SMBus. It provides various options such as different slew rate and amplitude through strapping pins or SMBUS so that users can configure the device easily to get the optimized performance for their individual boards. Block Diagram OE[3:0]# Q3 Q2 IN+ IN- PLL Q1 Q0 SCLK SDATA SADR_TRI BW_SEL_TRI PD# CTRL LOGIC Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated's definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green" products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CB18401 Document Number DS40617 Rev 3-2 1 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 OE3# Q3- 30 29 28 VDDO GND 31 Q3+ PD# 32 GND SADR_TRI Pin Configuration 27 26 25 BW_SEL_TRI 1 24 OE2# NC 2 23 Q2- 22 Q2+ 21 VDDA 20 GNDA NC 3 VDD_R 4 IN+ 5 IN- 6 19 Q1- GND_R 7 18 Q1+ GND_DIG 8 17 OE1# 9 10 11 12 13 14 15 16 VDD_DIG SCLK SDATA OE0# Q0+ Q0- GND VDDO GND Pin Description Pin Number Pin Name Type BW_SEL_TRI 2 NC Internal connected for feedback loop. Do not connect this pin 3 NC Internal connected for feedback loop. Do not connect this pin 4 VDD_R Power Power supply for input differential buffers 5 IN+ Input Differential true clock input 6 IN- Input Differential complementary clock input 7 GND_R Power Ground for input differential buffers 8 GND_DIG Power Ground for digital circuitry 9 VDD_DIG Power Power supply for digital circuitry, nominal 1.8V 10 SCLK Input CMOS SMBUS clock input, 3.3V tolerant 11 SDATA Input/ Output CMOS SMBUS Data line, 3.3V tolerant 12 OE0# Input CMOS 13 Q0+ Output HCSL Differential true clock output 14 Q0- Output HCSL Differential complementary clock output 15, 26, 30 GND Power Ground 16, 25 VDDO Power Power supply for differential outputs 17 OE1# Input Document Number DS40617 Rev 3-2 Tri-level Latch to select low loop bandwidth, bypass PLL, and high loop bandwidth. This pin has both internal pull-up and pull-down 1 PI6CB18401 Input Description CMOS Active low input for enabling Q0 pair. This pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs Active low input for enabling Q1 pair. This pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs 2 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Pin Description Cont. Pin Number Pin Name Type Description 18 Q1+ Output HCSL Differential true clock output 19 Q1- Output HCSL Differential complementary clock output 20 GNDA Power Ground for analog circuitry 21 VDDA Power Power supply for analog circuitry 22 Q2+ Output HCSL Differential true clock output 23 Q2- Output HCSL Differential complementary clock output 24 OE2# Input CMOS Active low input for enabling Q2 pair. This pin has an internal pulldown. 1 =disable outputs, 0 = enable outputs 27 Q3+ Output HCSL Differential true clock output 28 Q3- Output HCSL Differential complementary clock output 29 OE3# Input CMOS Active low input for enabling Q3 pair. This pin has an internal pulldown. 1 =disable outputs, 0 = enable outputs 31 PD# Input CMOS Input notifies device to sample latched inputs and start up on first high assertion. Low enters Power Down Mode, subsequent high assertions exit Power Down Mode. This pin has internal pull-up resistor. 32 SADR_TRI Input Tri-level PI6CB18401 Document Number DS40617 Rev 3-2 Latch to select SMBus Address. This pin has an internal pull-down 3 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 SMBus Address Selection Table SADR Address +Read/Write Bit 0 1101011 X M 1101100 X 1 1101101 X State of SADR on first application of PD# Power Management Table PD# IN SMBus OE bit OEn# Qn+ Qn- PLL Status 0 X X X Low Low Off 1 Running 0 X Low Low On(1) 1 Running 1 0 Running Running On(1) 1 Running 1 1 Low Low On(1) Note: 1. If PLL Bypass mode is selected, the PLL will be off and outputs will be running. PLL Operating Mode Select Table BW_SEL_TRI Operating Mode Byte1 [7:6] Readback Byte1 [4:3] Readback 0 PLL with low Bandwidth 00 00 M PLL Bypass 01 01 1 PLL with high Bandwidth 11 11 Frequency Select table Freq. Select Byte 3 [4:3] IN (MHz) Qn (MHz) 00 (default) 100 100 01 50 50 10 125 125 11 Reserved Reserved PI6CB18401 Document Number DS40617 Rev 3-2 4 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Storage Temperature........................................................... -65C to +150C Supply Voltage to Ground Potential, VDDxx ..................-0.5V to +2.5V Input Voltage ................................. -0.5V to VDD+0.5V, not exceed 2.5V SMBus, Input High Voltage .................................................................... 3.6V ESD Protection (HBM) ...................................................................... 2000 V Junction Temperature ................................... ...............................125 C max Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Conditions Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions Symbol Parameters VDD, VDDA, VDD_R, VDD_DIG Conditions Min.. Typ. Max. Units Power Supply Voltage 1.7 1.8 1.9 V VDDO Output Power Supply Voltage 1.7 1.8 1.9 V IDDA Analog Power Supply Current VDDA + VDD_R, PLL mode, All outputs active @100MHz 11 15 mA IDD Power Supply Current VDD + VDD_DIG, All outputs active @100MHz 8 10 mA IDDO Power Supply Current for Outputs All outputs active @100MHz 17 25 mA IDDA_PD Analog Power Supply Power Down(1) Current VDDA + VDD_R, PLL mode, All outputs active @100MHz 0.7 1 mA IDD_PD Power Supply Power Down(1) Current VDD + VDD_DIG+ VDDO, All outputs LOW/LOW 1.2 mA TA Ambient Temperature Commercial grade Industrial grade 0 70 -40 85 C Note: 1. Input clock is not running. Input Electrical Characteristics Symbol Parameters Rpu Internal pull up resistance 120 KW Rdn Internal pull down resistance 120 KW LPIN Pin inductance PI6CB18401 Document Number DS40617 Rev 3-2 Conditions Min. Typ. Max. 7 5 www.diodes.com Units nH June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 SMBus Electrical Characteristics Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions Symbol Parameters VDDSMB Nominal bus voltage Conditions Min. Typ. Max. Units 1.7 3.6 V SMBus, VDDSMB = 3.3V 2.1 3.6 SMBus, VDDSMB < 3.3V 0.65 VDDSMB VIHSMB SMBus Input High Voltage VILSMB SMBus Input Low Voltage ISMBSINK SMBus sink current SMBus, at VOLSMB VOLSMB SMBus Output Low Voltage SMBus, at ISMBSINK 0.4 V f MAXSMB SMBus operating frequency Maximum frequency 400 kHz tRMSB SMBus rise time (Max VIL - 0.15) to (Min VIH + 0.15) 1000 ns tFMSB SMBus fall time (Min VIH + 0.15) to (Max VIL - 0.15) 300 ns Max. Units VDD +0.3 V 0.6VDD V 0.25 VDD V 20 mA V SMBus, VDDSMB = 3.3V 0.6 SMBus, VDDSMB < 3.3V 0.6 V 4 mA LVCMOS DC Electrical Characteristics Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions Symbol Parameters Conditions Min. VIH Input High Voltage Single-ended inputs, except SMBus 0.75 VDD VIM Input Mid Voltage SADR_TRI, BW_SEL_TRI VIL Input Low Voltage Single-ended inputs, except SMBus IIH Input High Current Single-ended inputs, VIN = VDD IIL Input Low Current Single-ended inputs, VIN = 0V IIH Input High Current Single-ended inputs with pull up / pull down resistor, VIN = VDD IIL Input Low Current Single-ended inputs with pull up / pull down resistor, VIN = 0V CIN Input Capacitance PI6CB18401 Document Number DS40617 Rev 3-2 0.4VDD -0.3 0.5VDD -20 A 220 -220 1.5 6 Typ. mA A 5 www.diodes.com pF June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 LVCMOS AC Electrical Characteristics Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions Symbol Parameters Conditions tOELAT Output enable latency tPDLAT PD# de-assertion Min. Q start after OE# assertion Q stop after OE# deassertion Typ. 1 Differential outputs enable after PD# deassertion 20 Max. Units 3 clocks 300 us HCSL Input Characteristics(1) Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions Symbol VIHDIF Parameters Conditions Diff. Input High Voltage(3) Voltage(3) Min. Typ. Max. Units IN+, IN-, single-end measurement 600 800 1150 mV IN+, IN-, single-end measurement -300 0 300 mV 150 1000 mV 300 1450 mV 200 MHz VILDIF Diff. Input Low VCOM Diff. Input Common Mode Voltage VSWING Diff. Input Swing Voltage Peak to peak value (VIHDIF - VILDIF) f INBP Input Frequency PLL Bypass mode 1 f IN100 Input Frequency 100MHz PLL 60 100 110 MHz f IN125 Input Frequency 125MHz PLL 75 125 137.5 MHz f IN156 Input Frequency 50MHz PLL 30 50 65 MHz tSTAB Clock stabilization From VDD Power-Up and after input clock stabilization or de-assertion of PD# to 1st clock 0.6 1.0 ms tRF Diff. Input Slew Rate(2) Measured differentially 0.4 IIN Diff. Input Leakage Current VIN = VDD, VIN = GND -5 tDC Diff. Input Duty Cycle Measured differentially 45 tjc-c Diff. Input Cycle to cycle jitter Measured differentially V/ns 0.01 5 uA 55 % 125 ps Note: 1. Guaranteed by design and characterization, not 100% tested in production 2. Slew rate measured through +/-75mV window centered around differential zero 3. The device can be driven by a single-ended clock by driving the true clock and biasing the complement clock input to the Vbias, where Vbias is (VIH-V IL)/2 PI6CB18401 Document Number DS40617 Rev 3-2 7 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 HCSL Output Characteristics Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions Symbol Parameters Condition VOH Output Voltage High(1) VOL Output Voltage Low(1) Statistical measurement on single-ended signal using oscilloscope math function VOMAX Output Voltage Maximum(1) VOMIN VOSWING VOC DVOC Output Voltage Minimum (1) Output Swing Voltage(1,2,3) Output Cross Voltage(1,2,4) VOC Magnitude Min. Typ. Max. Units 660 774 900 mV 150 mV 1150 mV -150 821 Measurement on single ended signal using absolute value -300 -15 mV Scope averaging off 300 1536 mV 250 430 550 mV 12 140 mV Max. Units Change(1,2,5) Note: 1. At default SMBUS amplitude settings 2. Guaranteed by design and characterization, not 100% tested in production 3. Measured from differential waveform 4. This one is defined as voltage where Q+ = Q- measured on a component test board and only applied to the differential rising edge 5. The total variation of all Vcross measurements in any particular system. This is a subset of Vcross_min/max allowed. HCSL Output AC Characteristics Temperature = TA; Supply voltages per normal operation conditions; See test circuits for the load conditions Symbol Parameters fOUT Output Frequency BW PLL bandwidth(1,8) tjpeak PLL Jitter Peaking tRF Slew rate(1,2,3) DtRF Slew rate matching(1,2,4) (1,2) tSKEW Output Skew tPDELAY Propagation delay tjc-c Cycle to cycle jitter(1,2) tjPHASE Condition Min. 100 2 2.7 4 MHz -3dB point in Low Bandwidth Mode 1 1.4 2 MHz 1.2 2 dB Peak pass band gain Scope averaging on fast setting 2.2 3 6.5 V/ns Scope averaging on slow setting 0.4 2 3 V/ns Scope averaging on 7 20 % Averaging on, VT = 50% 43 50 ps 3000 3600 4500 ps 0 90 200 ps 14 50 ps PLL Bypass mode, VT = 50% PLL mode, VT = 50% PCIe Gen 1 20 22 86 ps PCIe Gen 2 Low Band, 10kHz < f < 1.5MHz 0.2 0.3 3.0 ps 1.6 2.0 3.1 ps 0.3 0.35 1.0 ps 1.9 2 ps PCIe Gen 3 (PLL BW of 2-4 or 2-5MHz, CDR =10MHz) 125MHz, 1.5MHz to 20MHz, -20dB/decade Rollover < 1.5MHz, -40dB/decade rolloff > 10MHz 9 PI6CB18401 Document Number DS40617 Rev 3-2 MHz -3dB point in High Bandwidth Mode PCIe Gen 2 High Band, 1.5MHz < f < NyIntegrated phase jitter (RMS) quist (50MHz) 1,5,6 Typ. 8 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 HCSL Output AC Characteristics Cont. Symbol tjPHASEA Parameters Additive Integrated phase jitter (RMS)(1,5,10) Condition Min. Typ. Max. Units PCIe Gen 1 0.6 5 ps PCIe Gen 2 Low Band, 10kHz < f < 1.5MHz 0.1 0.3 ps PCIe Gen 2 High Band, 1.5MHz < f < Nyquist (50MHz) 0.05 0.1 ps PCIe Gen 3 (PLL BW of 2-4 or 2-5MHz, CDR =10MHz) 0.05 0.1 ps PCIe Gen 4 (PLL BW of 2-4 or 2-5MHz, CDR =10MHz) (BW_SEL_TRI=M) 0.03 0.05 ps 125MHz, 1.5MHz to 20MHz, -20dB/decade Rollover < 1.5MHz, -40dB/decade rolloff > 10MHz 0.15 0.3 ps tDC Duty Cycle(1,2) Measured differentially, PLL Mode 45 50 55 % tDCD Duty Cycle Distortion(1,7) Measured differentially, PLL Bypass Mode at 100MHz -1 0 1 % tSTARTUP Start up time 10 ms tLOCK PLL lock time 20 ms Note: 1. Guaranteed by design and characterization, not 100% tested in production 2. Measured from differential waveform 3. Slew rate is measured through the Vswing voltage range centered around differential 0V, within +/-150mV window 4. Slew rate matching is measured using a +/-75mV window centered at differential zero 5. See http://www.pcisig.com for complete specs 6. Sample size of at least 100k cycles. This can be extrapolated to 108ps pk-pk @ 1M cycles for a BER of 10 -12 7. Duty cycle distortion is the difference in duty cycle between the out and input clock when te device is operated in the PLL bypass mode 8. The Min and Max values of each BW setting track each other, low BW max will never occur with high BW min 9. Applies to all differential outputs 10. For additive jitter RMS value is calculated by the following equation = SQRT [(total jitter)*2 - (input jitter)*2] PI6CB18401 Document Number DS40617 Rev 3-2 9 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 SMBus Serial Data Interface PI6CB18401 is a slave only device that supports block read and block write protocol using a single 7-bit address and read/write bit as shown below. Read and write block transfers can be stopped after any complete byte transfer. Address Assignment A6 A5 A4 A3 A2 A1 A0 1 1 0 1 See SBMus Address Selection table R/W 1/0 Note: SMBus address is latched on SADR pin How to Write 1 bit 7 bits 1 bit 1 bit 8 bits 1 bit Beginning Start bit Add. W(0) Ack Byte loca- Ack tion = N 8 bits Data Byte count = X 1 bit 8 bits 1 bit 8 bits Beginning Ack Data Byte Ack Data Byte ....... (N+X-1) (N) 1 bit 1 bit Ack Stop bit How to Read 1 bit 7 bits 1 bit 1 bit Start bit Address W(0) Ack 8 bits 1 bit Beginning Byte location = N Ack 1 bit Repeat Start bit 7 bits 1 bit 1 bit 8 bits Address R(1) Ack Data Byte count = X 1 bit PI6CB18401 Document Number DS40617 Rev 3-2 Data Byte (N+X-1) 10 1 bit Beginning Ack 8 bits ....... 8 bits Data Byte Ack (N) 1 bit 1 bit NAck Stop bit www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Byte 0: Output Enable Register(1) Type Power Up Condition 0 Bit Control Function Description 1 7 Reserved 6 Q3_OE Q6 output enable RW 1 Low/Low Enabled 5 Q2_OE Q5 output enable RW 1 Low/Low Enabled 4 Reserved 3 Q1_OE Low/Low Enabled 2 Reserved 1 Q0_OE Low/Low Enabled 0 Reserved 1 1 Q3 output enable RW 1 1 Q1 output enable RW 1 1 Note: 1. A low on these bits will override the OE# pins and force the differential outputs to Low/Low states Byte 1: PLL Operating Mode and Output Amplitude Control Register Bit Control Function Description Type Power Up Condition 0 7 PLLMODERB1 PLL Mode Readback Bit1 R Latch 6 PLLMODERB0 PLL Mode Readback Bit0 R Latch 5 PLLMODE_SWCTR Enable SW control of PLL Mode RW 0 4 PLLMODE1 PLL Mode control Bit1 RW(1) 0 PLL Mode control Bit0 RW(1) 0 3 PLLMODE0 2 Reserved 1 Amplitude1 0 Amplitude0 1 See PLL Operating Mode Table Values in Values in B1[7:6] set PLL B1[4:3] set PLL Mode Mode See PLL Operating Mode Table 1 Control output amplitude RW 1 RW 0 '00' = 0.6V, '01' = 0.7V, '10' = 0.8V, '11' = 0.9V Note: 1. B1[5] must be set to a 1 for these bits to have any effect on the part PI6CB18401 Document Number DS40617 Rev 3-2 11 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Byte 2: Differential Output Slew Rate Control Register Bit Control Function Description 7 Reserved 6 SLEWRATECTR_Q3 Control slew rate of Q6 RW 5 SLEWRATECTR_Q2 Control slew rate of Q5 RW 4 Reserved 3 SLEWRATECTR_Q1 2 Reserved 1 SLEWRATECTR_Q0 0 Reserved Type Power Up Condition 0 1 1 Slow setting Fast setting 1 Slow setting Fast setting Slow setting Fast setting Slow setting Fast setting 0 1 SW Freq. selection disabled SW Freq. selection enabled 1 1 Control slew rate of Q3 RW 1 Control slew rate of Q1 RW 1 1 1 Byte 3: Frequency Select Control Register Type Power Up Condition Bit Control Function Description 7 Reserved 1 6 Reserved 1 5 FREQ_SEL_EN Enable SW selection of frequency RW 0 4 FSEL1 Freq. Select Bit 1 RW(1) 0 Freq. Select Bit 0 RW(1) 0 3 FSEL0 2 Reserved 1 1 Reserved 1 0 SLEWRATESEL FB Adjust Slew Rate of Feedback signal See Frequency Select Table RW 1 2.0V/ns 3.0V/ns Type Power Up Condition 0 1 Note: 1. B1[5] must be set to a 1 for these bits to have any effect on the part Byte 4: Reserved Bit Control Function Description 7:0 Reserved PI6CB18401 Document Number DS40617 Rev 3-2 1 12 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Byte 5: Revision and Vendor ID Register Bit Control Function Description Type Power Up Condition 7 RID3 R 0 6 RID2 R 0 5 RID1 R 0 4 RID0 R 0 3 PVID3 R 0 2 PVID3 R 0 1 PVID3 R 1 0 PVID3 R 1 Revision ID Vendor ID 0 1 rev = 0000 Pericom = 0011 Byte 6: Device Type/Device ID Register Bit Control Function Description Type Power Up Condition 0 7 DTYPE1 R 0 '00' = CG, '01' = ZDB, 6 DTYPE0 R 1 '10' = Reserve, '11' = ZDB 5 DID5 R 0 4 DID4 R 0 3 DID3 R 0 2 DID2 R 1 1 DID1 R 0 0 DID0 R 0 Type Power Up Condition Device type Device ID 1 000100 binary, 04Hex Byte 7: Byte Count Register Bit Control Function Description 7 Reserved 0 6 Reserved 0 5 Reserved 0 4 BC4 RW 0 3 BC3 RW 1 2 BC2 RW 0 1 BC1 RW 0 0 BC0 RW 0 PI6CB18401 Document Number DS40617 Rev 3-2 Byte count programming 13 0 1 Writing to this register will configure how many bytes will be read back, default is 8 bytes www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Plots 100MHz HCSL Clock Low-Power HCSL Differential Output Test Load 5 inches Rs Zo=100 Rs 2pF 2pF Differential Output with integrated Rs Figure 1. Low Power HCSL Test Circuit R 3.3V Driving LVDS R1a R1b R2a R2b Cc Rs Rs Zo Cc Differential Output R PI6CB18401 Document Number DS40617 Rev 3-2 LVDS Clock input Figure 2. Differential Output driving LVDS 14 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Alternate Differential Output Terminations Component Receiver with termination Receiver without termination Unit R1a, R1b 10,000 140 W R 2a, R 2b 5,600 75 W CC 0.1 0.1 mF VCM 1.2 1.2 V 1.8V 5% VDD_Ox 0.1F 1 or VDDA Ferrite Bead 0.1F 10F Figure 3. Power Supply Filter Part Marking ZH Package PI6CB18 401ZHIE ZYYWWXX Z: Die Rev YY: Year WW: Workweek 1st X: Assembly Code 2nd X: Fab Code PI6CB18401 Document Number DS40617 Rev 3-2 m 15 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 Packaging Mechanical: 32-TQFN (ZH) For latest package info. please check: http://www.diodes.com/design/support/packaging/pericom-packaging/packaging-mechanicals-and-thermal-characteristics/ Ordering Information Ordering Code Package Code Package Description Pin 1 Location PI6CB18401ZHIEX ZH 32-Contact, Very Thin Quad Flat No-Lead (TQFN) Top Right Corner PI6CB18401ZHIEX-13R ZH 32-Contact, Very Thin Quad Flat No-Lead (TQFN) Top Left Corner Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated's definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green" products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. 4. I = Industrial 5. E = Pb-free and Green 6. X suffix = Tape/Reel 7. For packaging detail, go to our website at: https://www.diodes.com/assets/MediaList-Attachments/Diodes-Package-Information.pdf PI6CB18401 Document Number DS40617 Rev 3-2 16 www.diodes.com June 2020 Diodes Incorporated A product Line of Diodes Incorporated PI6CB18401 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 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LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright (c) 2020, Diodes Incorporated www.diodes.com PI6CB18401 Document Number DS40617 Rev 3-2 17 www.diodes.com June 2020 Diodes Incorporated