LMX2571EVM User's Guide
User's Guide
Literature Number: SNAU176
January 2015
User's Guide
SNAU176–January 2015
LMX2571EVM User's Guide
The Texas Instruments LMX2571EVM evaluation module (EVM) helps designers evaluate the operation
and performance of the LMX2571 Wideband Frequency Synthesizer. The EVM contains one Frequency
Synthesizer.
Device: U1
IC: LMX2571
Package: QFN36
Topic ........................................................................................................................... Page
1 Setup.................................................................................................................. 3
2 Using the EVM Software ....................................................................................... 6
3 Board Construction.............................................................................................. 9
4 PCB Layers ....................................................................................................... 12
5 Measured Performance Data................................................................................ 17
6 Bill of Materials.................................................................................................. 25
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Setup
1 Setup
1.1 Input and Output Connector Description
Figure 1. Evaluation Board Setup
Table 1. Inputs and Outputs
Output Name(s) Input/Output Required? Function
One of these outputs needs to be attached to phase noise
RFoutRx Output Required measurement equiptment, like the Agilent E5052. The unused
RFoutRx output need not be connected.
Connect to a 3.3 V Power Supply. Ensure the current limit is set
Vcc3p3 Input Required above 100 mA.
Instead of using the Vcc3p3 connector, one can connect 5V to
Vcc5V Input Optional one of these outputs and it is regulated down to 3.3V on the
Vcc5VTV_TB board.
Programming Connect the board to a PC using the USB2ANY (HPA665-001)
Input Required
Interface interface provided in kit.
The on-board 20 MHz XO has been enabled. To use this input,
OSCin Input Optional the XO power supply resistor (R1) should be removed and
resistor R3 moved to position R2.
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Setup
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1.2 Installing the EVM Software
Go to http://www.ti.com/tool/codeloader and download and run the most current software.
1.3 Loop Filter Values and Configuration Information
Table 2. Loop Filter values and Configuration
Category Parameter Value
OSCin Frequency (MHz) 20 MHz
Phase Detector Frequency (MHz) 80 MHz
Configuration VCO Frequency 4300 to 5400 MHz
Charge Pump Gain 1x 1240 µA
VCO_L 46 to 61 MHz/V
VCO Gain VCO_M 50 to 65 MHz/V
VCO_H 55 to 73 MHz/V
C1_LF 390 pF
C2_LF 4.7 nF
C3_LF (Internal) 50 pF
Loop Filter Components C4_LF (Internal) 50 pF
R2_LF 680 Ω
R3_LF (Internal) 800 Ω
R4_LF (Internal) 800 Ω
Loop Filter Characteristics Loop Bandwidth 234 kHz
(Assuming Fvco=4.8 GHz, Phase Margin 43.7°
Kvco=56 MHz/V)
1.4 Readback Notification
Although the LMX2571 does support readback, there are some issues with the CodeLoader software and
board to do this. In order to readback, this needs to be done with external software. As a means of
debugging, consider using the power down feature and monitoring the changes in the current
consumption.
1.5 Lock Detect Notification
The lock detect on the LMX2571 works perfectly well. However, the LED decides to light when it feels like
it. Pressing on the LED with one's fingernail can sometimes get it to work better. The key takeaway from
this is the green LED is not reliable for lock detect. If it is on, it indicates lock, but if it is off, it indicates
unlock or an issue with the LED diode.
1.6 Pin 8 Component Notification
Note that Pin 8 has a capacitor to ground, but it was found that this component provided no benefit,
although it does no harm either.
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Setup
1.7 Crystal Oscillator Noise Notification
The following plot shows the XO noise compared to a much cleaner reference. The XO is included for
quick startup and evaluation, but can be bypassed or changed. The criteria for choosing the XO was
availability and standard footprint, which took priority over phase noise and stability. Sometimes if the XO
is burn in by letting the board run for a few hours, the phase noise and stability will improve. Optimal
phase noise is obtained with a clean input signal.
Figure 2. Impact of XO Noise
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Using the EVM Software
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2 Using the EVM Software
2.1 Main Setup and Default Mode
Choose the default startup mode on the main tab as shown. After the default mode is loaded, don't forget
to load the device with Ctrl+L or with Keyboard Controls -> Load Device.
Figure 3. Loading Default Mode for the Main Configuration Screen
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Using the EVM Software
2.2 Port Setup
On the Port Setup tab, the user may select the type of communication port (USB or Parallel) that will be
used to program the device on the evaluation board. If parallel port is selected, the user should ensure
that the correct port address is entered. CodeLoader does NOT auto detect the correct settings for this.
The identify function verifies that the computer is communicating wit the USB2ANY board, but does NOT
verify that the USB2ANY board is communicating with the device.
Figure 4. Port Setup Tab
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Using the EVM Software
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2.3 Bits/Pins Settings
To view the function of any bit on the CodeLoader configuration tabs, place the cursor over the desired bit
register label and click the right mouse button on it for a description.
Figure 5. Bits/Pins Tab
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Top Layer
Prepreg (16mil)
GND
Core (22mil)
Power
Prepreg (16mil)
Bottom Layer
Total Height (60.8mil)
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Board Construction
3 Board Construction
3.1 Board Layer Stack Up
The board is made on FR4 for the Prepreg and Core Layers. The top layer is 1 oz copper.
Figure 6. Board Layer Stack Up
FR4 material was chosen because of convenience, availability, and cost.
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PCB Layers
In the Top Layer, Figure 9, the ground plane is pulled far away from the signal traces to minimize the
potential of spur energy coupling onto them. This board can be assembled with all components on the top
layer.
Figure 9. Top Layer
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PCB Layers
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On the Ground Layer, Figure 10, notice that there is a separate ground plane below the OSCin signal.
This is to prevent the OSCin signal coupling to the other ground plane. They are connected by a resistor
on the top layer.
Figure 10. Ground Layer
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PCB Layers
The power layer, Figure 11, effort is made to avoid putting any plane below the OSCin signal ground, to
minimize the potential of spur coupling. The upper right plaine is the 5V plane and the lower left is the
3.3V pPlane.
Figure 11. Power Layer
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Measured Performance Data
5 Measured Performance Data
5.1 Phase Noise in Default Mode
Figure 13 shows the phase noise in default mode.
Figure 13. Phase Noise (Default Mode)
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Figure 14 shows the phase noise in default mode as well. The dim trace is the default mode (Fpd=80MHz)
and the bright trace has Fpd=20 MHz and 4 times the charge pump current (to keep the same bandwidth).
We see that the results are similar.
Figure 14. Default Mode vs. Fpd = 20 MHz and 4x Higher Charge Pump Gain
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Measured Performance Data
Figure 15 Shows the impact of taking a 4800 MHz VCO signal and dividing with the pre divider values of
4,5,6, and 7. We see a textbook 20*log relationship for phase noise. about -155 dBc/Hz. The second plot
shows when the secondary channel divider is used. Close in, we see the 20*log relationship, but
eventually, this hits a noise floor.
Figure 15. Phase Noise (Default Mode)
Figure 16. Noise Floor with CHDIV2
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Measured Performance Data
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5.2 VCO Phase Noise
5.2.1 Fvco = 4400 MHz / 4
Figure 17 shows the phase noise of just the VCO at 4400 MHz and divided by 4. To take this
measurement, the charge pump was set to tri-state and this is why the frequency is off.
Figure 17. VCO Phase Noise
Fvco = 4800 MHz/4
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Measured Performance Data
5.2.2 Fvco = 4800 MHz/4
Figure 18 shows the phase noise of just the VCO at 4800 MHz and divided by 4. To take this
measurement, the charge pump was set to tri-state and this is why the frequency is off.
Figure 18. VCO Phase Noise
Fvco = 4800 MHz/4
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Measured Performance Data
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5.2.3 Fvco = 5200 MHz/4
Figure 19shows the phase noise of just the VCO at 5200 MHz and divided by 4. To take this
measurement, the charge pump was set to tri-state and this is why the frequency is off.
Figure 19. VCO Phase Noise
Fvco = 5200 MHz/4
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Measured Performance Data
5.3 Fractional Spurs and Spur-b-Gone
This plot is for a VCO frequency of 4881 MHz, which is very close to the integer boundary of 4880 MHz.
Note the 1 MHz spur and also we see 1 MHz/4 = 250 kHz from the output divider
Figure 20. No Spur-b-Gone
Fvco = 4881 MHz/10,
Fpd = 80 MHz
After using Spur-B-Gone, the phase detector changes from 80 to 110 MHz and we see that the spurs are
substantially reduced.
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Bill of Materials
6 Bill of Materials
Table 3. LMX2571 Bill of Materials
Ite RoH Manufactu Qua
Designator Description PartNumber
m S rer ntity
CAP, CERM, 1 µF, 16 V, +/- 10%, X7R, GRM188R71C105
1 C1, C20, C24, C25, C26, C33 Y MuRata 6
0603 KA12D
CAP, CERM, 390pF, 50V, +/-5%, C0G/NP0,
2 C1LFA Y AVX 06035A391JAT2A 1
0603
C2, C3, C4, C5, C6, C7, C14,
3 C16, C19, C21, C22, C23, CAP, CERM, 0.1uF, 16V, +/-5%, X7R, 0603 Y AVX 0603YC104JAT2A 14
C29, C31 CAP, CERM, 4700pF, 100V, +/-5%, X7R,
4 C2LFA Y AVX 06031C472JAT2A 1
0603
CAP, CERM, 100pF, 50V, +/-5%, C0G/NP0, C0603C101J5GAC
5 C12, C13 Y Kemet 2
0603 TU
CAP, CERM, 2.2uF, 10V, +/-10%, X5R, C0603C225K8PAC
6 C15 Y Kemet 1
0603 TU
CAP, CERM, 1000pF, 100V, +/-5%, X7R,
7 C17, C18 Y AVX 06031C102JAT2A 2
0603
CAP, CERM, 0.01uF, 50V, +/-10%, X5R, GRM188R61H103
8 C27 Y MuRata 1
0603 KA01D
CAP, CERM, 10 µF, 25 V, +/- 20%, X5R, GRM188R61E106
9 C28, C30, C32 Y MuRata 3
0603 MA73
SML-LX2832GC-
10 D1 LED, Green, SMD Y Lumex 1
TR
Emerson
Fin, OSCin, RFoutRx,
11 Connector, End launch SMA, 50 ohm, SMT Y Network 142-0701-851 5
RFoutTx, Vcc3p3 Power
Vishay- CRCW060310R0J
12 R1, R30 RES, 10 ohm, 5%, 0.1W, 0603 Y 2
Dale NEA
Vishay- CRCW0603680RJ
13 R2LFA RES, 680 ohm, 5%, 0.1W, 0603 Y 1
Dale NEA
R3, R8, R9, R10, R11, R13,
R14, R21, R22, R26, R27, Vishay- CRCW06030000Z0
14 RES, 0 ohm, 5%, 0.1W, 0603 Y 21
R28, R29, R32, R33, R35, Dale EA
R40, R41, R46, R52, R53 Yageo RC0603JR-
15 R12 RES, 330 ohm, 5%, 0.1W, 0603 Y 1
America 07330RL
Yageo RC0603FR-
16 R15, R17, R18, R20 RES, 330 ohm, 1%, 0.1W, 0603 Y 4
America 07330RL
Vishay- CRCW060318R0J
17 R16, R19, R23, R24, R25 RES, 18 ohm, 5%, 0.1W, 0603 Y 5
Dale NEA
Vishay- CRCW060341K2F
18 R36 RES, 41.2 k, 1%, 0.1 W, 0603 Y 1
Dale KEA
Vishay- CRCW060313K0J
19 R37 RES, 13k ohm, 5%, 0.1W, 0603 Y 1
Dale NEA
Vishay- CRCW060310K0J
20 R42, R44, R48, R50, R55 RES, 10k ohm, 5%, 0.1W, 0603 Y 5
Dale NEA
Vishay- CRCW060312K0J
21 R43, R45, R47, R54 RES, 12k ohm, 5%, 0.1W, 0603 Y 4
Dale NEA
Richco
22 S1, S2, S3, S4 HEX STANDOFF SPACER, 9.53 mm Y TCBS-6-01 4
Plastics
Texas
Low Power Synthesizer with FSK
23 U1 Instrument LMX2571RHHR 1
Modulation, RHH0036C s
Ultra Low Noise, 150mA Linear Regulator National LP5900SD-
24 U3 for RF/Analog Circuits Requires No Bypass Y Semicondu 1
3.3/NOPB
Capacitor, 6-pin LLP, Pb-Free ctor
25
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Bill of Materials
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Table 3. LMX2571 Bill of Materials (continued)
Texas
Ultra Low Noise, 800 mA Linear Voltage LP38798SD-
25 U4 Y Instrument 1
Regulator for RF/Analog Circuits, DNT0012B ADJ/NOPB
s
0.75-O DUAL SPST ANALOG SWITCH Texas
26 U5 WITH 1.8-V COMPATIBLE INPUT LOGIC, Y Instrument TS5A21366DCUR 1
DCU0008A s
Header (shrouded), 100mil, 5x2, Gold
27 uWire Y FCI 52601-S10-8LF 1
plated, SMD
Terminal Block, 10.76x17x11 mm, 2POS,
28 Vcc5V_TB Y Weidmuller 1592820000 1
26-12AWG, TH Connor-
29 Y1 Oscillator, 20MHz, 3.3 V, SMD Y CWX813-020.0M 1
Winfield
CAP, CERM, 0.47uF, 16V, +/-10%, X7R, C0603C474K4RAC
30 C1LFB Y Kemet 0
0603 TU
CAP, CERM, 4.7uF, 16V, +/-10%, X5R, GRM188R61C475
31 C2ALFB, C2BLFB, C2LFB Y MuRata 0
0603 KAAJ
CAP, CERM, 0.039uF, 100V, +/-10%, X7R, C0603C393K1RAC
32 C3LFB, C4LFB Y Kemet 0
0603 TU
CAP, CERM, 100pF, 50V, +/-5%, C0G/NP0, C0603C101J5GAC
33 C8, C9 Y Kemet 0
0603 TU
CAP, CERM, 1000pF, 100V, +/-5%, X7R,
34 C10, C11 Y AVX 06031C102JAT2A 0
0603
35 C34 CAP, CERM, 0.1uF, 16V, +/-5%, X7R, 0603 Y AVX 0603YC104JAT2A 0
Emerson
36 ExtFSKin, OSCin*, Vcc5V Connector, End launch SMA, 50 ohm, SMT Y Network 142-0701-851 0
Power
Header (shrouded), 100mil, 5x2, Gold
37 FSK Y FCI 52601-S10-8LF 0
plated, SMD
38 L1, L2 Inductor, Ferrite, 1uH, 0.7A, 0.15 ohm, SMD Y MuRata LQM18PN1R0MFH 0
R2, R5, R6, R7, R31, R34, Vishay- CRCW06030000Z0
39 R38, R39, R56, R59, R60, RES, 0 ohm, 5%, 0.1W, 0603 Y 0
Dale EA
R61, R62 Vishay- CRCW060310R0J
40 R2LFB, R3LFB, R4LFB RES, 10 ohm, 5%, 0.1W, 0603 Y 0
Dale NEA
Yageo RC0603FR-
41 R4 RES, 51.0 ohm, 1%, 0.1W, 0603 Y 0
America 0751RL
Vishay- CRCW060368R0J
42 R24b RES, 68 ohm, 5%, 0.1W, 0603 Y 0
Dale NEA
Vishay- CRCW060310K0J
43 R49 RES, 10k ohm, 5%, 0.1W, 0603 Y 0
Dale NEA
Vishay- CRCW060312K0J
44 R51 RES, 12k ohm, 5%, 0.1W, 0603 Y 0
Dale NEA
Vishay- CRCW06031K00J
45 R57, R58 RES, 1.0k ohm, 5%, 0.1W, 0603 Y 0
Dale NEA
Crystek CVCO55BE-1800-
46 U2 VCO, 1800-2200MHz, SMD Y Corporatio 0
2200
n
Terminal Block, 10.76x17x11 mm, 2POS,
47 Vcc3p3_TB Y Weidmuller 1592820000 0
26-12AWG, TH TXC
48 Y1x Crystal, 10.000MHz, 10pF, SMD Y Corporatio 7B-10.000MEEQ-T 0
n
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Revision History
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Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
This Revision History highlights the technical changes made to this document
SNAU136 Revisions
SEE ADDITIONS/MODIFICATIONS/DELETIONS
General Comments:
SNAU136 Initial Document Revision
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