REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADG506A/ADG507A
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703 © Analog Devices, Inc., 1997
CMOS
8-/16-Channel Analog Multiplexers
FUNCTIONAL BLOCK DIAGRAM
FEATURES
44 V Supply Maximum Rating
VSS to VDD Analog Signal Range
Single/Dual Supply Specifications
Wide Supply Ranges (10.8 V to 16.5 V)
Extended Plastic Temperature Range
(–408C to +858C)
Low Power Dissipation (28 mW max)
Low Leakage (20 pA typ)
Available in 28-Lead DIP, SOIC, PLCC, TSSOP and LCCC
Packages
Superior Alternative to:
DG506A, Hl-506
DG507A, Hl-507
GENERAL DESCRIPTION
The ADG506A and ADG507A are CMOS monolithic analog
multiplexers with 16 channels and dual 8 channels, respectively.
The ADG506A switches one of 16 inputs to a common output,
depending on the state of four binary addresses and an enable
input. The ADG507A switches one of eight differential inputs to
a common differential output, depending on the state of three
binary addresses and an enable input. Both devices have TTL
and 5 V CMOS logic compatible digital inputs.
The ADG506A and ADG507A are designed on an enhanced
LC
2
MOS process, which gives an increased signal capability of
V
SS
to V
DD
and enables operation over a wide range of supply
voltages. The devices can operate comfortably anywhere in the
10.8 V to 16.5 V single or dual supply range. These multiplexers
also feature high switching speeds and low R
ON
.
PRODUCT HIGHLIGHTS
1. Single/Dual Supply Specifications with a Wide Tolerance
The devices are specified in the 10.8 V to 16.5 V range for
both single and dual supplies.
2. Extended Signal Range
The enhanced LC
2
MOS processing results in a high break-
down and an increased analog signal range of V
SS
to V
DD
.
3. Break-Before-Make Switching
Switches are guaranteed break-before-make so input signals
are protected against momentary shorting.
4. Low Leakage
Leakage currents in the range of 20 pA make these multiplexers
suitable for high precision circuits.
ORDERING GUIDE
Temperature Package
Model
1
Range Option
2
ADG506AKN –40°C to +85°C N-28
ADG506AKR –40°C to +85°C R-28
ADG506AKP –40°C to +85°C P-28A
ADG506ABQ –40°C to +85°C Q-28
ADG506ATQ –55°C to +125°C Q-28
ADG506ATE –55°C to +125°C E-28A
ADG507AKN –40°C to +85°C N-28
ADG507AKR –40°C to +85°C R-28
ADG507AKP –40°C to +85°C P-28A
ADG507AKRU –40°C to +85°C RU-28
ADG507ABQ –40°C to +85°C Q-28
ADG507ATQ –55°C to +125°C Q-28
ADG507ATE –55°C to +125°C E-28A
NOTES
1
To order MIL-STD-883, Class B processed parts, add /883B to part number.
See Analog Devices’ Military/Aerospace Reference Manual (1994) for military
data sheet.
2
E = Leadless Ceramic Chip Carrier (LCCC); N = Plastic DIP; P = Plastic
Leaded Chip Carrier (PLCC); Q = Cerdip; R = 0.3" Small Outline IC (SOIC);
RU = Thin Shrink Small Outline Package (TSSOP).
–2– REV. B
ADG506A/ADG507A–SPECIFICATIONS
Dual Supply
(VDD = +10.8 V to +16.5 V, VSS = –10.8 V to –16.5 V unless otherwise noted)
ADG506A ADG506A ADG506A
ADG507A ADG507A ADG507A
K Version B Version T Version
–408C to –408C to –558C to
Parameter +258C +858C +258C +858C +258C +1258C Units Comments
ANALOG SWITCH
Analog Signal Range V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V min
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V max
R
ON
280 280 280 Ω typ –10 V ≤ V
S
≤ +10 V, I
DS
= 1 mA; Test Circuit 1
450 600 450 600 450 600 Ω max
300 400 300 400 Ω max V
DD
= 15 V (±10%), V
SS
= –15 V (±10%)
300 400 Ω max V
DD
= 15 V (±5%), V
SS
= –15 V (+5%)
R
ON
Drift 0.6 0.6 0.6 %/°C typ –10 V ≤ V
S
≤ +10 V, I
DS
= 1 mA
R
ON
Match 5 5 5 % typ –10 V ≤ V
S
≤ +10 V, I
DS
= 1 mA
Is (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1 = ±10 V, V2 = 710 V; Test Circuit 2
1 50 1 50 1 50 nA max
I
D
(OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1 = ±10 V, V2 = 710 V; Test Circuit 3
ADG506A 1 200 1 200 1 200 nA max
ADG507A 1 100 1 100 1 100 nA max
I
D
(ON), On Channel Leakage 0.04 0.04 0.04 nA typ V1 = ±10 V, V2 = 710 V; Test Circuit 4
ADG506A 1 200 1 200 1 200 nA max
ADG507A 1 100 1 100 1 100 nA max
I
DIFF
, Differential Off Output
Leakage (ADG507A Only) 25 25 25 nA max V1 = ±10 V, V2 = 710 V; Test Circuit 5
DIGITAL CONTROL
V
INH
, Input High Voltage 2.4 2.4 2.4 V min
V
INL
, Input Low Voltage 0.8 0.8 0.8 V max
I
INL
or I
INH
111µA max V
IN
= 0 to V
DD
C
IN
Digital Input Capacitance 8 8 8 pF max
DYNAMIC CHARACTERISTICS
t
TRANSITION1
200 200 200 ns typ V1 = ±10 V, V2 = +10 V; Test Circuit 6
300 400 300 400 300 400 ns max
t
OPEN1
50 50 50 ns typ Test Circuit 7
25 10 25 10 25 10 ns min
t
ON
(EN)
1
200 200 200 ns typ Test Circuit 8
300 400 300 400 300 400 ns max
t
OFF
(EN)
1
200 200 200 ns typ Test Circuit 8
300 400 300 400 300 400 ns max
OFF Isolation 68 68 68 dB typ V
EN
= 0.8 V, R
L
= 1 kΩ, C
L
= 15 pF,
50 50 50 dB min V
S
= 7 V rms, f = 100 kHz
C
S
(OFF) 5 5 5 pF typ V
EN
= 0.8 V
C
D
(OFF)
ADG506A 44 44 44 pF typ V
EN
= 0.8 V
ADG507A 22 22 22 pF typ
Q
INJ
, Charge Injection 4 4 4 pC typ R
S
= 0 Ω, V
S
= 0 V; Test Circuit 9
POWER SUPPLY
I
DD
0.6 0.6 0.6 mA typ V
IN
= V
INL
or V
lNH
1.5 1.5 1.5 mA max
I
SS
20 20 20 µA typ V
IN
= V
IN
or V
INH
0.2 0.2 0.2 mA max
Power Dissipation 10 10 10 mW typ
28 28 28 mW max
NOTES
1
Sample tested at +25°C to ensure compliance.
Specifications subject to change without notice.
–3–
REV. B
ADG506A/ADG507A
Single Supply
(VDD = +10.8 V to +16.5 V, VSS = GND = 0 V unless otherwise noted)
ADG506A ADG506A ADG506A
ADG507A ADG507A ADG507A
K Version B Version T Version
–408C to –408C to –558C to
Parameter +258C +858C +258C +858C +258C +1258C Units Comments
ANALOG SWITCH
Analog Signal Range V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V min
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V max
R
ON
500 500 500 Ω typ 0 V ≤ V
S
≤ +10 V, I
DS
= 0.5 mA; Test Circuit 1
700 1000 700 1000 700 1000 Ω max
R
ON
Drift 0.6 0.6 0.6 %/°C typ 0 V ≤ V
S
≤ +10 V, I
DS
= 0.5 mA
R
ON
Match 5 5 5 % typ 0 V ≤ V
S
≤ +10 V, I
DS
= 0.5 mA
Is (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V;
1 50 1 50 1 50 nA max Test Circuit 2
I
D
(OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V;
ADG506A 1 200 1 200 1 200 nA max Test Circuit 3
ADG507A 1 100 1 100 1 100 nA max
I
D
(ON), On Channel Leakage 0.04 0.04 0.04 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V;
ADG506A 1 200 1 200 1 200 nA max Test Circuit 4
ADG507A 1 100 1 100 1 100 nA max
I
DIFF
, Differential Off Output V1 = +10 V/0 V, V2 = 0 V/ +10 V;
Leakage (ADG507A Only) 25 25 25 nA max Test Circuit 5
DIGITAL CONTROL
V
INH
, Input High Voltage 2.4 2.4 2.4 V min
V
INL
, Input Low Voltage 0.8 0.8 0.8 V max
I
INL
or I
INH
111µA max V
IN
= 0 to V
DD
C
IN
Digital Input Capacitance 8 8 8 pF max
DYNAMIC CHARACTERISTICS
t
TRANSITION1
300 300 300 ns typ V1 = +10 V/0 V, V2 = +10 V; Test Circuit 6
450 600 450 600 450 600 ns max
t
OPEN1
50 50 50 ns typ Test Circuit 7
25 10 25 10 25 10 ns min
t
ON
(EN)
1
250 250 250 ns typ Test Circuit 8
450 600 450 600 450 600 ns max
t
OFF
(EN)
1
250 250 250 ns typ Test Circuit 8
450 600 450 600 450 600 ns max
OFF Isolation 68 68 68 dB typ V
EN
= 0.8 V, R
L
= 1 kΩ, C
L
= 15 pF,
50 50 50 dB min V
S
= 3.5 V rms, f = 100 kHz
C
S
(OFF) 5 5 5 pF typ V
EN
= 0.8 V
C
D
(OFF)
ADG506A 44 44 44 pF typ V
EN
= 0.8 V
ADG507A 22 22 22 pF typ
Q
INJ
, Charge Injection 4 4 4 pC typ R
S
= 0 Ω, V
S
= 0 V; Test Circuit 9
POWER SUPPLY
I
DD
0.6 0.6 0.6 mA typ V
IN
= V
INL
or V
lNH
1.5 1.5 1.5 mA max
Power Dissipation 10 10 10 mW typ
25 25 25 mW max
NOTES
1
Sample tested at +25°C to ensure compliance.
Specifications subject to change without notice.
Truth Table (ADG506A)
A3 A2 A1 A0 EN On Switch
XXXX0 NONE
000011
000112
001013
001114
010015
010116
011017
011118
100019
1001110
1010111
1011112
1100113
1101114
1110115
1111116
Truth Table (ADG507A)
A2 A1 A0 EN On Switch Pair
XXX0 NONE
00011
00112
01013
01114
10015
10116
11017
11118
X = Don’t Care
ADG506A/ADG507A
–4– REV. B
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG506A/ADG507A feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C unless otherwise noted)
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –25 V
Analog Inputs
2
Voltage at S, D . . . . . . . . . . . . . . . . . . . . . . . V
SS
– 2 V to V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 2 V or
. . . . . . . . . . . . . . . . . . . . . . 20 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA
Pulsed Current S or D
1 ms Duration, 10% Duty Cycle . . . . . . . . . . . . . . . . 40 mA
Digital Inputs
2
Voltage at A, EN . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
– 4 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . to V
DD
+ 4 V or
. . . . . . . . . . . . . . . . . . . . . . 20 mA, Whichever Occurs First
Power Dissipation (Any Package)
Up to +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
Derates above +75°C by . . . . . . . . . . . . . . . . . . 6 mW/°C
Operating Temperature
Commercial (K Version) . . . . . . . . . . . . . . –40°C to +85°C
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Overvoltage at A, EN, S or D will be clamped by diodes. Current should be limited
to the Maximum Rating above.
PIN CONFIGURATIONS
DIP, SOIC
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
ADG506A
NC = NO CONNECT
V
DD
S7
S8
V
SS
D
NC
NC
S16
S4
S5
S6
S15
S14
S13
S12
S11
S10 S1
S2
S3
S9
GND
NC
A3
EN
A2
A1
A0
LCCC
28 271
2
3426
25
21
22
23
24
19
20
5
6
7
8
9
10
11
12 13 14 15 16 17 18
TOP VIEW
(Not to Scale)
NC = NO CONNECT
S7A
S6A
S5A
S4A
S3A
S2A
S1A
GND
NC
A1
A0
S8B
NC
DB
V
DD
DA
S8A
EN
S7B
S6B
S5B
S4B
S3B
S2B
S1B
V
SS
ADG507A
A2
NC
PLCC
7
8
9
10
11
5
6
28 27 261234
21
22
23
24
25
19
20
12 13 14 15 16 17 18
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
S7B
S6B
S5B
S4B
S3B
S7A
S6A
S5A
S4A
S3A
NC = NO CONNECT
ADG507A
S2B
S1B
S2A
S1A
NC
V
DD
A2
A1
A0 V
SS
GND
NC
EN
DB
DA
NC
S8A
S8B
PLCC
7
8
9
10
11
5
6
28 27 261234
21
22
23
24
25
19
20
12 13 14 15 16 17 18
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
S15
S14
S13
S12
S11
S7
S6
S5
S4
S3
NC = NO CONNECT
ADG506A
S10
S9
S2
S1
NC
NC
V
DD
D
A3
A2
A1
A0 V
SS
S8
GND
NC
EN
S16
DIP, SOIC, TSSOP
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
ADG507A
NC = NO CONNECT
VDD
S7A
S8A
VSS
DA
DB
NC
S8B
S4A
S5A
S6A
S7B
S6B
S5B
S4B
S3B
S2B S1A
S2A
S3A
S1B
GND
NC
NC
EN
A2
A1
A0
LCCC
28 271
2
3426
25
21
22
23
24
19
20
5
6
7
8
9
10
11
12 13 14 15 16 17 18
TOP VIEW
(Not to Scale)
NC = NO CONNECT
S7
S6
S5
S4
S3
S2
S1
GND
NC
A3
A1
A0
EN
S15
S14
S13
S12
S11
S10
S9
S16
NC
NC
VDD
D
VSS
S8
ADG506A
A2
ADG506A/ADG507A
–5–
REV. B
Typical Performance Characteristics–
The multiplexers are guaranteed functional with reduced single or dual supplies down to 4.5 V.
Figure 1. R
ON
as a Function of V
D
(V
S
): Dual Supply
Voltage, T
A
= +25
°
C
Figure 2. Leakage Current as a Function of Temperature
(Note: Leakage Currents Reduce as the Supply Voltages
Reduce)
Figure 3. t
TRANSITION
vs. Supply Voltage: Dual and Single
Supplies, T
A
= + 25
°
C (Note: For V
DD
and /V
SS
/ < 10 V; V1 =
V
DD
/V
SS
, V2 = V
SS
/V
DD
. See Test Circuit 6)
Figure 4. R
ON
as a Function of V
D
(V
S
) Single Supply
Voltage, T
A
= +25
°
C
Figure 5. Trigger Levels vs. Power Supply Voltage, Dual
or Single Supply, T
A
= +25
°
C
Figure 6. I
DD
vs. Supply Voltage: Dual or Single Supply,
T
A
= +25
°
C
ADG506A/ADG507A
–6– REV. B
–Test Circuits
Note: All Digital Input Signal Rise and Fall Times Measured from 10% to 90% of 3 V. t
R
= t
F
= 20 ns.
Test Circuit 6. Switching Time of Multiplexer, t
TRANSITION
Test Circuit 7. Break-Before-Make Delay, t
OPEN
Test Circuit 1. R
ON
Test Circuit 2. I
S
(OFF) Test Circuit 3. I
D
(OFF)
Test Circuit 4. I
D
(ON) Test Circuit 5. I
DIFF
ADG506A/ADG507A
–7–
REV. B
SINGLE SUPPLY AUTOMOTIVE APPLICATION
The excellent performance of the multiplexers under single
supply conditions makes the ADG506A/ADG507A suitable in
applications such as automotive and disc drives where only
positive power supply voltages are normally available. The fol-
lowing application circuit shows the ADG507A connected as an
8-channel differential multiplexer in an automotive, data acqui-
sition application circuit.
Figure 7. ADG507A in a Single Supply Automotive Data Acquisition Application
The AD7580 is a 10-bit successive approximation ADC, which
has an on-chip sample-hold amplifier and provides a conversion
result in 20 µs. The ADC has differential analog inputs and is
configured in the application circuit for a span of 2.5 V over a
common-mode range 0 V to + 5 V. Wider common-mode ranges
can be accommodated. See the AD7579/AD7580 data sheet for
more details. The complete system operates from +12 V (+10%)
and +5 V supplies. The analog input signals to the ADG507A
contain information such as temperature, pressure, speed etc.
Test Circuit 8. Enable Delay, t
ON
(EN), t
OFF
(EN)
Test Circuit 9. Charge Injection
ADG506A/ADG507A
–8– REV. B
C1150b–7–1/97
PRINTED IN U.S.A.
TERMINOLOGY
R
ON
Ohmic resistance between terminals D and S
R
ON
Match Difference between the R
ON
of any two channels
R
ON
Drift Change in R
ON
versus temperature
I
S
(OFF) Source terminal leakage current when the switch
is off
I
D
(OFF) Drain terminal leakage current when the switch
is off
I
D
(ON) Leakage current that flows from the closed switch
into the body
V
S
(V
D
) Analog voltage on terminal S or D
C
S
(OFF) Channel input capacitance for “OFF” condition
C
D
(OFF) Channel output capacitance for “OFF” condition
C
IN
Digital input capacitance
t
ON
(EN) Delay time between the 50% and 90% points of
the digital input and switch “ON” condition
t
OFF
(EN) Delay time between the 50% and 10% points of
the digital input and switch “OFF” condition
t
TRANSITION
Delay time between the 50% and 90% points of
the digital inputs and switch “ON” condition
when switching from one address state to
another
t
OPEN
“OFF” time measured between 50% points of
both switches when switching from one address
state to another
V
INL
Maximum input voltage for Logic “0”
V
INH
Minimum input voltage for Logic “1”
I
INL
(I
INH
) Input current of the digital input
V
DD
Most positive voltage supply
V
SS
Most negative voltage supply
I
DD
Positive supply current
I
SS
Negative supply current
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
28-Pin Plastic DIP (Suffix N)
1.45(36.83)
1.44 (36.58)
0.550 (13.97)
0.53 (13.47)
0.020 (0.508)
0.015 (0.381) 0.175 (4.45)
0.12 (3.05)
0.2
(5.08)
MAX
0.105 (2.67)
0.095 (2.42)
0.065 (1.66)
0.045 (1.15)
0.606 (15.4)
0.594 (15.09)
0.012 (0.305)
0.008 (0.203)
0.16 (4.07)
0.14 (3.56)
158
0
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42
28-Pin Cerdip (Suffix Q)
0.525 (13.33)
0.515 (13.08)
GLASS
SEALANT
15°
0°
0.18(4.57)
MAX
0.012 (0.305)
0.008 (0.203)
0.22 (5.59)
MAX
1.490 (37.84) MAX
0.125
(3.175)
MIN
0.02 (0.5)
0.016 (0.406)
0.11 (2.79)
0.099 (2.28)
0.06 (1.52)
0.05 (1.27) 0.62 (15.74)
0.59 (14.93)
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42
28-Lead SOIC (Suffix R)
0.011 (0.28)
0.004 (0.10)
0.019 (0.48)
0.014 (0.36)
0.104 (2.64)
0.093 (2.36)
0.0500 (1.27)
BSC 0.015 (0.38)
0.007 (0.18) 0.50 (1.27)
0.016 (0.40)
0.512 (13.00)
0.469 (12.60)
0.419 (10.65)
0.319 (10.00)
0.300 (7.60)
0.292 (7.40)
28 15
141
28-Lead TSSOP (Suffix RU)
28 15
14
1
0.386 (9.80)
0.378 (9.60)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0256 (0.65)
BSC
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8°
0°
28-Terminal Plastic Leaded Chip Carrier (Suffix P)
4PIN 1
IDENTIFIER
526
25
1112 19
18
TOP VIEW
(PINS DOWN)
0.498 (12.57)
0.485 (12.32) SQ
0.456 (11.582)
0.450 (11.430) SQ
0.021 (0.533)
0.013 (0.331) 0.430 (10.5)
0.390 (9.9)
0.032 (0.812)
0.026 (0.661)
0.180 (4.51)
0.165 (4.20)
0.120 (3.04)
0.090 (2.29)
0.050 60.005
01.27 60.13
28-Terminal Leadless Ceramic Chip Carrier (Suffix E)
1
28 5
11
12
18
26
BOTTOM
VIEW
19
4
2
50.028 (0.71)
0.022 (0.56)
45° TYP
0.015 (0.38)
MIN
0.055 (1.40)
0.045 (1.14)
0.050
(1.27)
BSC
0.075
(1.91)
REF
0.011 (0.28)
0.007 (0.18)
R TYP
0.095 (2.41)
0.075 (1.90)
0.150
(3.51)
BSC
0.300 (7.62)
BSC
0.200
(5.08)
BSC
0.075
(1.91)
REF
0.458 (11.63)
0.442 (11.23)
SQ 0.458
(11.63)
MAX
SQ
0.100 (2.54)
0.064 (1.63)
0.088 (2.24)
0.054 (1.37)
