SLUS025F - MAY 2001 - REVISED JULY 2002 FEATURES D Ideal for Single (4.1 V or 4.2 V) and Dual-Cell D D D D D D D D D D D D D DESCRIPTION (8.2 V or 8.4 V) Li-Ion or Li-Pol Packs Requires Small Number of External Components 0.3 V Dropout Voltage for Minimizing Heat Dissipation Better Than 1% Voltage Regulation Accuracy With Preset Voltages AutoCompt Dynamic Compensation of Battery Pack's Internal Impedance to Reduce Charge Time Optional Cell-Temperature Monitoring Before and During Charge Integrated Voltage and Current Regulation With Programmable Charge-Current and Highor Low-Side Current Sensing Integrated Cell Conditioning for Reviving Deeply Discharged Cells and Minimizing Heat Dissipation During Initial Stage Of Charge Charge Status Output for Single or Dual Led or Host Processor Interface Automatic Battery-Recharge Feature Charge Termination by Minimum Current Automatic Low-Power Sleep Mode When VCC Is Removed EVMs Available for Quick Evaluation Packaging: 8-Pin SOIC, 8-Pin TSSOP, 8-Pin MSOP The BENCHMARQ bq2057 series advanced Lithium-Ion (Li-Ion) and Lithium-Polymer (Li-Pol) linear charge-management ICs are designed for costsensitive and compact portable electronics. They combine high-accuracy current and voltage regulation, battery conditioning, temperature monitoring, charge termination, charge-status indication, and AutoComp charge-rate compensation in a single 8-pin IC. MSOP, TSSOP, and SOIC package options are offered to fit a wide range of end applications. The bq2057 continuously measures battery temperature using an external thermistor. For safety, the bq2057 inhibits charge until the battery temperature is within user-defined thresholds. The bq2057 then charges the battery in three phases: conditioning, constant current, and constant voltage. If the battery voltage is below the low-voltage threshold, V(min), the bq2057 precharges using a low current to condition the battery. The conditioning charge rate is approximately 10% of the regulation current. The conditioning current also minimizes heat dissipation in the external passelement during the initial stage of the charge. After conditioning, the bq2057 applies a constant current to the battery. An external sense-resistor sets the current. The sense-resistor can be on either the high or low side of the battery without additional components. The constant-current phase continues until the battery reaches the charge-regulation voltage. bq2057xSN or bq2057xTS SOIC (SN) or TSSOP (TS) PACKAGE (TOP VIEW) SNS BAT VCC TS 1 8 2 7 3 6 4 5 COMP CC VSS STAT bq2057xDGK MSOP (DGK) PACKAGE (TOP VIEW) VCC TS STAT VSS 1 8 2 7 3 6 4 5 BAT SNS COMP CC Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. AutoComp is a trademark of Texas Instruments. !"#$%! & '("")% $& ! *(+'$%! ,$%)"!,('%& '!!"# %! &*)''$%!& *)" %.) %)"#& ! )/$& &%"(#)%& &%$,$", 0$""$%1- "!,('%! *"!')&&2 ,!)& !% )')&&$"+1 '+(,) %)&%2 ! $++ *$"$#)%)"&- Copyright 2002, Texas Instruments Incorporated www.ti.com 1 SLUS025F - MAY 2001 - REVISED JULY 2002 DESCRIPTION (continued) The bq2057 then begins the constant-voltage phase. The accuracy of the voltage regulation is better than 1% over the operating-temperature and supply-voltage ranges. For single and dual cells, the bq2057 is offered in four fixed-voltage versions: 4.1 V, 4.2 V, 8.2 V, and 8.4 V. Charge stops when the current tapers to the charge termination threshold, I(TERM). The bq2057 automatically restarts the charge if the battery voltage falls below the V(RCH) threshold. The designer also may use the AutoComp feature to reduce charging time. This proprietary technique allows safe and dynamic compensation for the internal impedance of the battery pack during charge. AVAILABLE OPTIONS PACKAGE TA -20C to 70C CHARGE REGULATION VOLTAGE SOIC (SN) MSOP (DGK) 4.1 V Not available bq2057TS bq2057DGK 4.2 V bq2057CSN bq2057CTS bq2057CDGK 8.2 V Not available bq2057TTS 8.4 V bq2057WSN bq2057WTS Note the difference in pinout for this package. 2 TSSOP (TS) www.ti.com Not available SLUS025F - MAY 2001 - REVISED JULY 2002 function block diagram VCC Internal Reference VCC _ DONE + Sleep Mode _ BAT V-Control + G(comp) + _ CC I-Control Voltage Regulation COMP Battery Recharge VCC + _ VCC Battery Conditioning Control Block STAT _ + TS TS2 Trip _ + TS1 Trip I-Control 0.5 VCC _ High/Low SNS Set + SNS VCC-V(SNS) + _ Current Regulation VSS-V(SNS) + _ Charge Termination VSS www.ti.com 3 SLUS025F - MAY 2001 - REVISED JULY 2002 Terminal Functions TERMINAL NO. NAME I/O DESCRIPTION SOIC (SN) and TSSOP (TS) MSOP (DGK) BAT 2 8 I Voltage sense input CC 7 5 O Charge control output COMP 8 6 I Charge-rate compensation input (AutoComp) SNS 1 7 I Current sense input STAT 5 3 O Charge status output TS 4 2 I Temperature sense input VCC 3 1 I Supply voltage VSS 6 4 Ground detailed description current-sense input Battery current is sensed via the voltage developed on this pin by an external sense resistor. The external resistor can be placed on either the high or low side of the battery. (See schematics for details.) battery-voltage input Voltage sense-input tied directly to the positive side of the battery. temperature sense input Input for an external battery-temperature monitoring circuit. Connecting this input to VCC/2 disables this feature. charge-status output 3-state indication of charge in progress, charge complete, and temperature fault or sleep mode. charge-control output Source-follower output that drives an external pass-transistor (PNP or P-channel MOSFET) for current and voltage regulation. charge-rate compensation input Sets the charge-rate compensation level. The voltage-regulation output may be programmed to vary as a function of the charge current delivered to the battery. supply voltage input Power supply input and current reference for high-side sensing configuration. 4 www.ti.com SLUS025F - MAY 2001 - REVISED JULY 2002 absolute maximum ratings over operating free-air temperature (unless otherwise noted) Supply voltage (VCC with respect to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +18 V Input voltage, SNS, BAT, TS, COMP (all with respect to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VCC+0.3 V Sink current (STAT pin) not to exceed PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Source current (STAT pin) not to exceed PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA Output current (CC pin) not to exceed PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Total power dissipation, PD (at 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20C to 70C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 125C Lead temperature (soldering, 10 s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE DGK DERATING FACTOR ABOVE TA = 25C TA 25C POWER RATING 3.4 mW/C 424 mW TA = 70C POWER RATING 271 mW recommended operating conditions MIN MAX Supply voltage, VCC 4.5 15 UNIT V Operating free-air temperature range, TA -20 70 C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER I(VCC) VCC Current I(VCCS) VCC Sleep current IIB(BAT) IIB(SNS) Input bias current on BAT pin IIB(TS) IIB(COMP) Input bias current on TS pin Input bias current on SNS pin Input bias current on COMP pin TEST CONDITIONS MIN VCC > VCC(min), Excluding external loads For bq2057 and bq2957C, V(BAT) V(min), V(BAT) - VCC 0.8 V TYP MAX 2 4 3 6 UNIT mA A A For bq2057T and bq2957W, V(BAT) V(min), V(BAT) - VCC 0.8 V 10 V(BAT) = V(REG) V(SNS)= 5 V 1 A 5 A V(TS) = 5 V V(COMP) = 5 V 5 A 5 A BATTERY VOLTAGE REGULATION VO(REG) Output voltage bq2057, See Notes 1, 2, 3 4.059 4.10 4.141 bq2057C, See Notes 1, 2, 3 4.158 4.20 4.242 bq2057T, See Notes 1, 2, 3 8.119 8.20 8.282 bq2057W, See Notes 1, 2, 3 8.317 8.40 8.484 V NOTES: 1. For high-side current sensing configuration 2. For low-side current sensing configuration, the tolerance is 1% for TA = 25C and 1.2% for -20C TA 70C 3. V(BAT)+0.3 V VCC VCC(max) www.ti.com 5 SLUS025F - MAY 2001 - REVISED JULY 2002 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS MIN TYP MAX bq2057 and bq2057C, High-side current sensing configuration 95.4 105 115.5 bq2057T and bq2057W, High-side current sensing configuration 113.6 125 137.5 bq2057 and bq2057C, Low-side current sensing configuration 100 110 121 bq2057T and bq2057W, Low-side current sensing configuration 118.1 130 143 -24 -14 -4 29.1 30 30.9 58.3 60 61.8 bq2057 2.94 3 3.06 bq2057C 3.04 3.1 3.16 bq2057T 5.98 6.1 6.22 bq2057W 6.18 6.3 6.43 UNIT CURRENT REGULATION V(SNS) Current regulation threshold mV CHARGE TERMINATION DETECTION I(TERM) Charge termination current detect threshold Voltage at pin SNS, relative to VCC for high-side sensing, and to Vss for low-side sensing, 0C TA 50C mV TEMPERATURE COMPARATOR V(TS1) V(TS2) Lower temperature threshold Upper temperature threshold TS pin voltage %VCC PRECHARGE COMPARATOR V(min) Precharge threshold V PRECHARGE CURRENT REGULATION I(PRECHG) Precharge current regulation Voltage at pin SNS, relative to VCC for high-side sensing, and to VSS for low-side sensing, 0C TA 50C Voltage at pin SNS, relative to VCC for high-side sensing, 0C TA 50C, VCC = 5 V 13 mV 3 13 22 bq2057 and bq2057C VO(REG)- 98 mV VO(REG)- 100 mV VO(REG)- 102 mV bq2057T and bq2057W VO(REG)- 196 mV VO(REG)- 200 mV VO(REG)- 204 mV V(BAT)+0.3 V VCC VCC(max), bq2057, bq2057C, bq2057T, bq2057W 1.87 2.2 2.53 V(BAT)+0.3 V VCC VCC(max), bq2057T and bq2057W in low-side sensing configuration 2.09 2.4 2.76 mV VRCH COMPARATOR (Battery Recharge Threshold) V(RCH) Recharge threshold V CHARGE-RATE COMPENSATION (AutoComp) G(COMP) AutoComp gain V/V STAT PIN VOL(STAT) Output (low) voltage IOL = 10 mA VOH(STAT) Output (high) voltage IOH = 5 mA 0.7 V VCC-0.5 CC PIN VOL(CC) IO(CC) 6 Output low voltage Sink current IO(CC) = 5 mA (sink) Not to exceed power rating specification (PD) www.ti.com 5 1.5 V 40 mA SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION RSNS 0.2 Q1 FZT788B PACK+ DC+ C1 0.1 F VCC R1 1 k PACK- NTC VCC bq2057 CC C2 0.1 F COMP SNS BAT VCC TS VSS STAT RT1 TEMP D1 GND RT2 Battery Pack R2 2 k Figure 1. Low Dropout Single- or Two-Cell Li-Ion/Li-Pol Charger functional description The bq2057 is an advanced linear charge controller for single or two-cell Li-Ion or Li-Pol applications. Figure 1 shows the schematic of charger using a PNP pass transistor. Figure 2 is an operational state diagram, and Figure 3 is a typical charge profile. Figure 4 shows the schematic of a charger using P-channel MOSFET. www.ti.com 7 SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION POR Sleep Mode VCC > V(BAT) Checked at All Times Indicate SLEEP MODE (STAT = Hi-Z) No Yes Suspend Charge TS Pin in TS1 to TS2 Range Indicate CHARGE SUSPEND (STAT = Hi-Z) No Yes Regulate I(PRECHG) V(BAT) <V(min) Indicate Charge In-Progress (STAT = High) Yes Suspend Charge No TS Pin in TS1 to TS2 Range Regulate Current or Voltage No Indicate Charge In-Progress (STAT = High) Indicate CHARGE SUSPEND (STAT = Hi-Z) Yes No Suspend Charge No TS Pin in TS1 to TS2 Range TS Pin in TS1 to TS2 Range V(BAT) < V(min) Indicate CHARGE SUSPEND (STAT = Hi-Z) No Yes Yes Yes TS Pin in TS1 to TS2 Range No V(BAT) < V(min) Yes No Terminate Charge Yes I(TERM) Detected Yes Indicate CHARGE Done (STAT = Low) V(BAT) < V(RCH) Yes Figure 2. Operation Flowchart 8 www.ti.com No SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION Preconditioning Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase Regulation Voltage Regulation Current Minimum Charge Voltage Preconditioning and Taper Detect Figure 3. Typical Charge Profile qualification and precharge When power is applied, the bq2057 starts a charge-cycle if a battery is already present or when a battery is inserted. Charge qualification is based on battery temperature and voltage. The bq2057 suspends charge if the battery temperature is outside the V(TS1) to V(TS2) range and suspends charge until the battery temperature is within the allowed range. The bq2057 also checks the battery voltage. If the battery voltage is below the precharge threshold V(min), the bq2057 uses precharge to condition the battery. The conditioning charge rate I(PRECHG) is set at approximately 10% of the regulation current. The conditioning current also minimizes heat dissipation in the external pass-element during the initial stage of charge. See Figure 3 for a typical charge-profile. www.ti.com 9 SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION D1 Q1 SI6475DQ RSNS 0.2 PACK+ DC+ Battery Pack C2 0.1 F R2 1 k PACK- NTC U1 bq2057 CC RT1 COMP SNS BAT VCC TS VSS STAT TEMP R4 RT2 511 C1 0.1 F U2 R5 1 k R3 1 k CMD67- 22SRUC GND Figure 4. 0.5-A Charger Using P-Channel MOSFET current regulation phase The bq2057 regulates current while the battery-pack voltage is less than the regulation voltage, VO(REG). The bq2057 monitors charge current at the SNS input by the voltage drop across a sense-resistor, RSNS, in series with the battery pack. In high-side current sensing configuration (Figure 5), RSNS is between the VCC and SNS pins, and in low-side sensing (Figure 6) the RSNS is between VSS (battery negative) and SNS (charger ground) pins. Charge-current feedback, applied through pin SNS, maintains a voltage of V(SNS) across the current sense resistor. The following formula calculates the value of the sense resistor: V R SNS + I (1) (SNS) O(REG) Where IO(REG) is the desired charging current. 10 www.ti.com SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION DC+ DC+ RSNS BAT+ BAT+ bq2057 bq2057 SNS COMP BAT CC VCC VSS TS SNS COMP BAT CC VCC VSS TS STAT BAT- DC- STAT DC- RSNS BAT- Figure 5. High-Side Current Sensing Figure 6. Low-Side Current Sensing voltage regulation phase The voltage regulation feedback is through the BAT pin. This input is tied directly to the positive side of the battery pack. The bq2057 monitors the battery-pack voltage between the BAT and VSS pins. The bq2057 is offered in four fixed-voltage versions: 4.1 V, 4.2 V, 8.2 V and 8.4 V. Other regulation voltages can be achieved by adding a voltage divider between the positive and negative terminals of the battery pack and using bq2057T or bq2057W. The voltage divider presents scaled battery-pack voltage to BAT input. (See Figure 7 and Figure 8.) The resistor values RB1 and RB2 for the voltage divider are calculated by the following equation: R R B1 + B2 V N V (CELL) O(REG) (2) -1 Where: N = Number of cells in series V(CELL) = Desired regulation voltage per cell www.ti.com 11 SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION DC+ DC+ BAT+ RSNS BAT+ RB1 bq2057 RB1 bq2057 SNS COMP BAT CC VCC VSS TS RB2 BAT- STAT SNS COMP BAT CC VCC VSS TS STAT DC- RB2 BAT- RSNS DC- Figure 7. Optional Voltage Divider for Nonstandard Regulation Voltage, (High-Side Current Sensing) Figure 8. Optional Voltage Divider for Nonstandard Regulation Voltage, (Low-Side Current Sensing) charge termination and recharge The bq2057 monitors the charging current during the voltage-regulation phase. The bq2057 declares a done condition and terminates charge when the current tapers off to the charge termination threshold, I(TERM). A new charge cycle begins when the battery voltage falls below the V(RCH) threshold. battery temperature monitoring The bq2057 continuously monitors temperature by measuring the voltage between the TS and VSS pins. A negative- or a positive-temperature coefficient thermistor (NTC, PTC) and an external voltage divider typically develop this voltage. (See Figure 9.) The bq2057 compares this voltage against its internal V(TS1) and V(TS2) thresholds to determine if charging is allowed. (See Figure 10.) The temperature sensing circuit is immune to any fluctuation in VCC, since both the external voltage divider and the internal thresholds (V(TS1) and V(TS2)) are referenced to VCC. The resistor values of R(T1) and R(T2) are calculated by the following equations: For NTC Thermistors R R 12 T1 + T2 + 5 3 R (3) TC RTC * RTH 5 2 R TH R R TH -7 TC R TC R (4) TH www.ti.com SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION battery temperature monitoring (continued) For PTC Thermistors R R T1 + T2 + 5 R R TH (5) TC RTH * RTC 3 5 2 R R TH R -7 TH TC R (6) TC Where R(TC) is the cold temperature resistance and R(TH) is the hot temperature resistance of thermistor, as specified by the thermistor manufacturer. RT1 or RT2 can be omitted If only one temperature (hot or cold) setting is required. Applying a voltage between the V(TS1) and V(TS2) thresholds to pin TS disables the temperature-sensing feature. DC+ DC+ RSNS BAT+ BAT+ bq2057 RT1 SNS DC- bq2057 COMP SNS BAT CC BAT CC VCC VSS VCC VSS TS TS STAT COMP STAT RT1 DC- RT2 Thermistor RT2 BAT- BAT- Thermistor RSNS High-Side Current Sensing Low-Side Current Sensing Figure 9. Temperature Sensing Circuits VCC Temperature Fault V(TS2) Normal Temperature Range V(TS1) Temperature Fault VSS Figure 10. bq2057 TS Input Thresholds www.ti.com 13 SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION charge inhibit function The TS pin can be used as charge-inhibit input. The user can inhibit charge by connecting the TS pin to VCC or VSS (or any level outside the V(TS1) to V(TS2) thresholds). Applying a voltage between the V(TS1) and V(TS2) thresholds to pin TS returns the charger to normal operation. charge status indication The bq2057 reports the status of the charger on the 3-state STAT pin. The following table summarized the operation of the STAT pin. CONDITION STAT PIN Battery conditioning and charging High Charge complete (Done) Low Temperature fault or sleep mode Hi-Z The STAT pin can be used to drive a single LED (Figure 1), dual-chip LEDs (Figure 4) or for interface to a host or system processor (Figure 11). When interfacing the bq2057 to a processor, the user can use an output port, as shown in Figure 11, to recognize the high-Z state of the STAT pin. In this configuration, the user needs to read the input pin, toggle the output port and read the STAT pin again. In a high-Z condition, the input port always matches the signal level on the output port. Host Processor bq2057CTS SNS COMP BAT CC VCC VSS TS OUT IN STAT Figure 11. Interfacing the bq2057 to a Host Processor low-power sleep mode The bq2057 enters the sleep mode if the VCC falls below the voltage at the BAT input. This feature prevents draining the battery pack during the absence of VCC. 14 www.ti.com SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION selecting an external pass-transistor The bq2057 is designed to work with both PNP transistor and P-channel MOSFET. The device should be chosen to handle the required power dissipation, given the circuit parameters, PCB layout and heat sink configuration. The following examples illustrate the design process for either device: PNP transistor: Selection steps for a PNP bipolar transistor: Example: VI = 4.5 V, I(REG) = 1 A, 4.2-V single-cell Li-Ion (bq2057C). VI is the input voltage to the charger and I(REG) is the desired charge current (see Figure 1). 1. Determine the maximum power dissipation, PD, in the transistor. The worst case power dissipation happens when the cell voltage, V(BAT), is at its lowest (typically 3 V at the beginning of current regulation phase) and VI is at its maximum. Where VCS is the voltage drop across the current sense resistor. PD = (VI - VCS - V (BAT)) x IREG PD = (4.5 - 0.1 - 3) x 1 A PD= 1.4 W (7) 2. Determine the package size needed in order to keep the junction temperature below the manufacturer's recommended value, T(J)max. Calculate the total theta, (C/W), needed. JC + T(J)max * TA(max) P (8) D (150-40) + JC 1.4 JC + 78CW Now choose a device package with a theta at least 10% below this value to account for additional thetas other than the device. A SOT223 package, for instance, has typically a theta of 60C/W. 3. Select a collector-emitter voltage, V(CE), rating greater than the maximum input voltage. A 15-V device will be adequate in this example. 4. Select a device that has at least 50% higher drain current IC rating than the desired charge current I(REG). 5. Using the following equation, calculate the minimum beta ( or hFE) needed: b (9) I + CMAX min I B 1 0.035 b min + b min + 28 where Imax(C)) is the maximum collector current (in this case same as I(REG)), and IB is the base current (chosen to be 35 mA in this example). NOTE: The beta of a transistor drops off by a factor of 3 over temperature and also drops off with load. Therefore, note the beta of device at I(REG) and the minimum ambient temperature when choosing the device. This beta should be larger than the minimum required beta. Now choose a PNP transistor that is rated for V(CE) 15 V, JC 78C/W, IC 1.5 A, min 28 and that is in a SOT223 package. www.ti.com 15 SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION selecting an external pass-transistor (continued) P-channel MOSFET: Selection steps for a P-channel MOSFET: Example: VI = 5.5 V, I(REG) = 500 mA, 4.2-V single-cell Li-Ion (bq2057C). VI is the input voltage to the charger and I(REG) is the desired charge current. (See Figure 4.) 1. Determine the maximum power dissipation, PD, in the transistor. The worst case power dissipation happens when the cell voltage, V(BAT), is at its lowest (typically 3 V at the beginning of current regulation phase) and VI is at its maximum. Where VD is the forward voltage drop across the reverse-blocking diode (if one is used), and VCS is the voltage drop across the current sense resistor. PD = (VI - VD - V(CS) - V(BAT)) x I(REG) PD = (5.5 - 0.4 - 0.1 -3) x 0.5 A PD = 1 W (10) 2. Determine the package size needed in order to keep the junction temperature below the manufacturer's recommended value, TJMAX. Calculate the total theta, (C/W), needed. JC + Tmax(J)-TA(max) P (11) D (150-40) + JC 1 JC + 110CW Now choose a device package with a theta at least 10% below this value to account for additional thetas other than the device. A TSSOP-8 package, for instance, has typically a theta of 70C/W. 3. Select a drain-source voltage, V(DS), rating greater than the maximum input voltage. A 12 V device will be adequate in this example. 4. Select a device that has at least 50% higher drain current (ID) rating than the desired charge current I(REG). 5. Verify that the available drive is large enough to supply the desired charge current. V(GS) = (VD +V(CS) + VOL(CC)) - VI V(GS) = (0.4 + 0.1 + 1.5) - 5.5 V(GS) = -3.5 (12) Where V(GS) is the gate-to-source voltage, VD is the forward voltage drop across the reverse-blocking diode (if one is used), and VCS is the voltage drop across the current sense resistor, and VOL(CC) is the CC pin output low voltage specification for the bq2057. Select a MOSFET with gate threshold voltage, V(GSth), rating less than the calculated V(GS). Now choose a P-channel MOSFET transistor that is rated for VDS -15 V, JC 110C/W, ID 1 A, V(GSth) -3.5 V and in a TSSOP package. 16 www.ti.com SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION selecting input capacitor In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.1 F ceramic, placed in proximity to VCC and VSS pins, works well. The bq2057 works with both regulated and unregulated external dc supplies. If a non-regulated supply is chosen, the supply unit should have enough capacitance to hold up the supply voltage to the minimum required input voltage at maximum load. If not, more capacitance must be added to the input of the charger. selecting output capacitor The bq2057 does not require any output capacitor for loop stability. The user can add output capacitance in order to control the output voltage when a battery is not present. The charger quickly charges the output capacitor to the regulation voltage, but the output voltage decays slowly, because of the low leakage current on the BAT pin, down to the recharge threshold. Addition of a 0.1F ceramic capacitor, for instance, results in a 100 mV(pp) ripple waveform, with an approximate frequency of 25Hz. Higher capacitor values can be used if a lower frequency is desired. automatic charge-rate compensation To reduce charging time, the bq2057 uses the proprietary AutoComp technique to compensate safely for internal impedance of the battery pack. The AutoComp feature is disabled by connecting the COMP pin to VCC in high-side current-sensing configuration, and to VSS in low-side current-sensing configuration. The COMP pin must not be left floating. Figure 12 outlines the major components of a single-cell Li-Ion battery pack. The Li-Ion battery pack consists of a cell, protection circuit, fuse, connector, current sense-resistors, and some wiring. Each of these components contains some resistance. Total impedance of the battery pack is the sum of the minimum resistances of all battery-pack components. Using the minimum resistance values reduces the odds for overcompensating. Overcompensating may activate the safety circuit of the battery pack. BAT+ Terminal Wire Fuse Cell Protection Controller BAT- Terminal Wire Wire Discharge Wire Charge Figure 12. Typical Components of a Single-Cell Li-Ion Pack Compensation is achieved through input pin COMP (Figure 13). A portion of the current-sense voltage, presented through this pin, is scaled by a factor of G(COMP) and summed with the regulation threshold, VO(REG). This process increases the output voltage to compensate for the battery pack's internal impedance and for undesired voltage drops in the circuit. www.ti.com 17 SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION automatic charge-rate compensation (continued) AutoComp setup requires the following information: D Total impedance of battery pack (Z(PACK)) D Maximum charging current (I(REG)) The voltage drop across the internal impedance of battery pack, V(Z), can then be calculated using the following equation: V(Z) = Z(PACK) x I(REG) (13) The required compensation is then calculated using the following equations: V V (COMP) V (PACK) + G +V (14) (Z) (COMP) O(REG) ) G (COMP) V (COMP Where V(COMP) is the voltage on COMP pin. This voltage is referenced to VCC in high-side current sensing configuration and to VSS for low-side sensing. V(PACK) is the voltage across the battery pack. The values of R(COMP1) and R(COMP2) can be calculated using the following equation: (15) V R (COMP) COMP2 + R )R V COMP1 COMP2 (SNS) BAT+ DC+ DC+ RCOMP2 BAT+ RCOMP1 bq2057 DC- SNS bq2057 RSNS COMP SNS COMP BAT CC BAT CC VCC VSS VCC VSS TS TS STAT STAT DC- RCOMP2 RSNS RCOMP1 BAT- High-Side Current Sensing Low-Side Current Sensing Figure 13. AutoComp Circuits 18 www.ti.com SLUS025F - MAY 2001 - REVISED JULY 2002 APPLICATION INFORMATION automatic charge-rate compensation (continued) The following example illustrates these calculations: Assume Z(PACK) = 100 m, I(REG) = 500 mA, high-side current sensing bq2057C V (Z) +Z I (PACK) (16) (REG) + 0.1 0.5 (Z) V(Z) = 50 mV V V V V (COMP) + (COMP) + 0.05 2.2 G (17) (Z) (COMP) V(COMP) = 22.7 mV Let RCOMP2 = 10 k R R COMP1 R + COMP1 R COMP1 COMP2 + 10k V(SNS) * V(COMP) V (18) (COMP) (105 mV * 22.7 mV) 22.7 mV + 36.25 kW Use the closest standard value (36.0 k) for RCOMP1 www.ti.com 19 SLUS025F - MAY 2001 - REVISED JULY 2002 MECHANICAL DATA 8-Pin SOIC Narrow (SN) 8-Pin SN ( 0.150" SOIC ) Inches Millimeters Min. Max. Min. Max. A 0.060 0.070 1.52 1.78 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 Dimension C 0.007 0.010 0.18 0.25 D 0.185 0.200 4.70 5.08 E 0.150 0.160 3.81 4.06 e 0.045 0.055 1.14 1.40 H 0.225 0.245 5.72 6.22 L 0.015 0.035 0.38 0.89 TS: 8-Pin TSSOP Inches Dimension Min. Millimeters Max. Min. Max. A - 0.043 - 1.10 A1 0.002 0.006 0.05 0.15 B 0.007 0.012 0.18 0.30 C 0.004 0.007 0.09 0.18 D 0.1 14 0.122 2.90 3.10 E 0.169 0.176 4.30 4.48 e H 0.0256BSC 0.246 0.256 0.65BSC 6.25 6.50 Notes: 1. Controlling dimension: millimeters. Inches shown for reference only. 2 'D' and 'E' do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0,15 mm per side 3 Each lead centerline shall be located within 0,10 mm of its exact true position. 4 Leads shall be coplanar within 0,08 mm at the seating plane. 5 Dimension 'B' does not include dambar protrusion. The dambar protrusion(s) shall not cause the lead width to exceed 'B' maximum by more than 0,08 mm. 6 Dimension applies to the flat section of the lead between 0,10 mm and 0,25 mm from the lead tip. 7 'A1' is defined as the distance from the seating plane to the lowest point of the package body (base plane). www.ti.com 20 PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) BQ2057CDGK ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR BQ2057CDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR BQ2057CDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR BQ2057CDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR BQ2057CSN ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057CSNG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057CSNTR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057CSNTRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057CTS ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057CTSG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057CTSTR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057CTSTRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057DGK ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR BQ2057DGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR BQ2057SN ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057SNG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057TS ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 16-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) BQ2057TSG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057TSN ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057TSNG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057TTS ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057TTSG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057TTSTR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057TTSTRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057WSN ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057WSNG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057WSNTR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057WSNTRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM BQ2057WTS ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057WTSG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057WTSTR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR BQ2057WTSTRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2 Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device BQ2057CDGKR Package Package Pins Type Drawing VSSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 BQ2057CSNTR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 BQ2057CTSTR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 BQ2057TTSTR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 BQ2057WSNTR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 BQ2057WTSTR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ2057CDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 BQ2057CSNTR SOIC D 8 2500 367.0 367.0 35.0 BQ2057CTSTR TSSOP PW 8 2000 367.0 367.0 35.0 BQ2057TTSTR TSSOP PW 8 2000 367.0 367.0 35.0 BQ2057WSNTR SOIC D 8 2500 367.0 367.0 35.0 BQ2057WTSTR TSSOP PW 8 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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