Datasheet 1 Rev. 1.0
www.infineon.com/hitfet 2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
1 Overview
Basic Features
• Single channel device
• Very low output leakage current in OFF state
• Electrostatic discharge protection (ESD)
• Embedded protection functions (see below)
• Green Product (RoHS compliant)
• AEC Qualified
Applications
• Suitable for resistive, inductive and capacitive loads
• Replaces electromechanical relays, fuses and discrete circuits
Description
The BTS3050TF is a 50 mΩ single channel Smart Low-Side Power Switch within a PG-TO252-3 package
providing embedded protective functions. The power transistor is built by an N-channel vertical power
MOSFET.
The device is monolithically integrated. The BTS3050TF is automotive qualified and is optimized for 12 V
automotive applications.
Type Package Marking
BTS3050TF PG-TO252-3 S3050TF
Table 1 Product Summary
Operating voltage range VOUT 0 .. 31 V
Maximum load voltage VBAT(LD) 40 V
Maximum input voltage VIN 5.5 V
Maximum On-State resistance at TJ = 150°C, VIN = 5 V RDS(ON) 100 mΩ
Nominal load current IL(NOM) 4A
Minimum current limitation IL(LIM) 15 A
Maximum OFF state load current at TJ ≤85°C IL(OFF)_85 0.6 µA
Datasheet 2 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Overview
Protection Functions
• Over temperature shut-down with automatic-restart
• Active clamp over voltage protection
•Current limitation
Detailed Description
The device is able to switch all kind of resistive, inductive and capacitive loads, limited by maximum clamping
energy and maximum current capabilities.
The BTS3050TF offers ESD protection on the IN pin which refers to the Source pin (Ground).
The over temperature protection prevents the device from overheating due to overload and/or bad cooling
conditions. The temperature information is given by a temperature sensor in the power MOSFET.
The BTS3050TF has an auto-restart thermal shut-down function. The device will turn on again, if input is still
high, after the measured temperature has dropped below the thermal hysteresis.
The over voltage protection can be activated during load dump or inductive turn off conditions. The power
MOSFET is limiting the drain-source voltage, if it rises above the VOUT(CLAMP).
Datasheet 3 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Pin Assignment BTS3050TF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3 Voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3.1 PCB set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3.2 Transient Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.1 Output On-state Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.2 Resistive Load Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.3 Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.3.1 Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.3.1.1 Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.4 Reverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.5 Inverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.1 Over Voltage Clamping on OUTput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.2 Thermal Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.3 Short Circuit Protection / Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7 Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.1 Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.1 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.2 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.3 Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9 Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.1 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.2 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
9.3 Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
10 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
10.1 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
11 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table of Contents
Datasheet 4 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Block Diagram
2 Block Diagram
Figure 1 Block Diagram
OUT
GND
IN
Over
Voltage
Protection
Gate
Driving
Unit
Over-
temperature
Protection
Short circuit
detection /
Current
Limitation
BlockDiagram_3 pin.emf
ESD
Protection
Datasheet 5 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Pin Configuration
3 Pin Configuration
3.1 Pin Assignment BTS3050TF
Figure 2 Pin Configuration. PG-TO252-3
3.2 Pin Definitions and Functions
3.3 Voltage and current definition
Figure 3 shows all external terms used in this data sheet, with associated convention for positive values.
Figure 3 Naming definition of electrical parameters
Pin Symbol Function
1IN Input pin
2,4 OUT Drain, Load connection for power DMOS
3 GND Ground, Source of power DMOS
(top view )
4 (Tab)
13
2
V
BAT
GND
IN
V
BAT
V
IN
I
IN
GND
I
GND
Z
L
I
L
,I
D
V
OUT
OUT
Datasheet 6 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
General Product Characteristics
4 General Product Characteristics
4.1 Absolute Maximum Ratings
Table 2 Absolute Maximum Ratings 1)
Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Parameter Symbol Values Unit Note or Test Condition Number
Min. Typ. Max.
Voltages
Output voltage VOUT – – 40 V internally clamped P_4.1.1
Battery voltage for short circuit
protection
VBAT(SC) ––31Vl = 0 or 5 m
RSC = 20 mΩ + RCable
RCable = l * 16 mΩ/m
LSC = 5 µH + LCable
LCable = l * 1 µH/m
VIN = 5 V
P_4.1.2
Battery voltage for load dump
protection
VBAT(LD) ––40V
2)
RI = 2 Ω
RL = 4.5 Ω
tD = 400 ms
suppressed pulse
P_4.1.4
Input Pin
Input Voltage VIN -0.3 – 5.5 V - P_4.1.7
Input current
in inverse condition on OUT to
GND
IIN ––2mA
3)
VOUT < -0.3 V
P_4.1.10
Power Stage
Load current | IL |––IL(LIM) A - P_4.1.11
Energies
Unclamped single inductive
energy single pulse
EAS ––64mJIL(0) = IL(NOM)
VBAT = 13.5 V
TJ(0) = 150°C
P_4.1.14
Unclamped repetitive inductive
energy pulse with 10 k cycles
EAR(10k) ––64mJIL(0) = IL(NOM)
VBAT = 13.5 V
TJ(0) = 105°C
P_4.1.22
Unclamped repetitive inductive
energy pulse with 100 k cycles
EAR(100k) ––51mJIL(0) = IL(NOM)
VBAT = 13.5 V
TJ(0) = 105°C
P_4.1.26
Unclamped repetitive inductive
energy pulse with 1 M cycles
EAR(1M) ––40mJIL(0) = IL(NOM)
VBAT = 13.5 V
TJ(0) = 105°C
P_4.1.30
Datasheet 7 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
General Product Characteristics
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2 Functional Range
Temperatures
Operating temperature TJ-40 – +150 °C – P_4.1.37
Storage temperature TSTG -55 – +150 °C – P_4.1.38
ESD Susceptibility
ESD susceptibility (all pins) VESD -4 – 4 kV HBM4) P_4.1.39
ESD susceptibility OUT-pin to
GND
VESD -10 – 10 kV HBM4) P_4.1.40
ESD susceptibility VESD -2 – 2 KV CDM5) P_4.1.41
1) Not subject to production test, specified by design.
2) VBAT(LD) is setup without the DUT connected to the generator per ISO 7637-1;
RI is the internal resistance of the load dump test pulse generator;
tD is the pulse duration time for load dump pulse (pulse 5) according ISO 7637-1, -2.
3) Maximum allowed value. Consider also inverse input current in inverse condition P_8.3.7 in Chapter 8
4) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
5) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1
Table 3 Functional Range 1)
Please refer to “Electrical Characteristics” on Page 18 for test conditions
Parameter Symbol Values Unit Note or Test Condition Number
Min. Typ. Max.
Battery Voltage Range for Nominal
Operation
VBAT(NOR) 6.0 – 18.0 V – P_4.2.1
Extended Battery Voltage Range
for Operation
VBAT(EXT) 0 – 31 V parameter deviations
possible
P_4.2.2
Input Voltage Range for Nominal
Operation
VIN(NOR) 3.0 – 5.5 V – P_4.2.3
Junction Temperature TJ-40 – 150 °C – P_4.2.5
Table 2 Absolute Maximum Ratings 1) (cont’d)
Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Parameter Symbol Values Unit Note or Test Condition Number
Min. Typ. Max.
Datasheet 8 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
General Product Characteristics
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
4.3 Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
4.3.1 PCB set up
The following PCB set up was implemented to determine the transient thermal impedance1)
Figure 4 Cross section JEDEC2s2p
1) Not subject to production test, specified by design
Table 4 Thermal Resistance PG-TO252-3
Parameter Symbol Values Unit Note or
Test Condition
Number
Min. Typ. Max.
Junction to Soldering Point RthJSP –2.5–K/W
1) 2)
1) Not subject to production test, specified by design
2) Specified RthJSPvalue is simulated at natural convection on a cold plate setup (all pins are fixed to ambient
temperature).
TA = 85°C. Device is loaded with 1 W power.
P_4.3.2
Junction to Ambient (2s2p) RthJA(2s2p) –26–K/W
1) 3)
3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board;
The product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu,
2 x 35 µm Cu). Where applicable a thermal via array under the ex posed pad contacted the first inner copper layer.
TA = 85°C, Device is loaded with 1 W power.
P_4.3.6
Junction to Ambient
(1s0p+600 mm2 Cu)
RthJA(1s0p) –40–K/W
1) 4)
4) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board;
The product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper
area of 600 mm2 and 70 µm thickness. TA = 85°C, Device is loaded with 1 W power.
P_4.3.10
1) (*) means percentual Cu metalization on each layer
70µm modelled (traces)
35µm, 100% metalization*
1
,
5 mm
70µm, 5% metalization*
Datasheet 9 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
General Product Characteristics
Figure 5 Cross section JEDEC1s0p
Figure 6 PCB layout
4.3.2 Transient Thermal Impedance
70µm modelled (traces, cooling area)
1
,
5 mm
70µm; 5% metalization*
JEDEC 1s0p / 600mm² JEDEC 1s0p / footprint
JEDEC 2s2p
Detail:Solder Pads
Vias
Datasheet 10 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
General Product Characteristics
Figure 7 Typical transient thermal impedance ZthJA = f(tp), TA = 85°C
Value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The
product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner
copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Device is dissipating 1 W power.
Figure 8 Typical transient thermal impedance ZthJA = f(tp), Ta = 85°C
Value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board. Device is
dissipating 1 W power.
0
5
10
15
20
25
30
0,000001 0,00001 0,0001 0,001 0,01 0,1 1 10 100 1000
ZthJA
[K/W]
t
p
. [s]
0
20
40
60
80
100
120
0,000001 0,00001 0,0001 0,001 0,01 0,1 1 10 100 1000
10000
ZthJA [K/W]
tp. [s]
JEDEC 1s0p / 600mm²
JEDEC 1s0p / 300mm²
JEDEC 1s0p / footprint
Datasheet 11 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Power Stage
5 Power Stage
5.1 Output On-state Resistance
The on-state resistance depends on the junction temperature TJ and on the applied input voltage. Figure 9
show this dependencies in terms of temperature and voltage for the typical on-state resistance RDS(ON). The
behavior in reverse polarity is described in“Reverse Current capability” on Page 13
Figure 9 Typical On-State Resistance,
RDS(ON) = f(TJ), VIN = 3 V; VIN = 5 V
5.2 Resistive Load Output Timing
Figure 10 shows the typical timing when switching a resistive load.
Figure 10 Definition of Power Output Timing for Resistive Load
0
20
40
60
80
100
120
140
-40 -20 0 20 40 60 80 100 120 140
RDS(ON) [m
:
]
TJ[°C]
3V
5V
t
V
OUT
V
BAT
Switching.e
t
10 %
90 %
t
ON
t
DON
t
OFF
t
DOFF
V
IN
V
IN(TH)
50 %
-(
Δ
V/
Δ
t)
ON
(
Δ
V/
Δ
t)
OFF
t
F
t
R
Datasheet 12 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Power Stage
5.3 Inductive Load
5.3.1 Output Clamping
When switching off inductive loads with low side switches, the Drain-Source voltage VOUT rises above battery
potential, because the inductance intends to continue driving the current. To prevent unwanted high voltages
the device has a voltage clamping mechanism to keep the voltage at VOUT(CLAMP). During this clamping
operation mode the device heats up as it dissipates the energy from the inductance. Therefore the maximum
allowed load inductance is limited. See Figure 11 and Figure 12 for more details.
Figure 11 Output Clamp Circuitry
Figure 12 Switching an Inductive Load
GND ( DMOS Source)
OUT ( DMOS Drain
I
GND
V
BAT
Z
L
I
L
V
OUT
t
t
V
OUT
V
BAT
Id i O Cl f
t
I
OUT
V
OUT(CLAMP)
V
IN
Datasheet 13 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Power Stage
5.3.1.1 Maximum Load Inductance
While demagnetization of inductive loads, energy has to be dissipated by the BTS3050TF.
This energy can be calculated by the following equation:
(5.1)
Following equation simplifies under the assumption of RL = 0
(5.2)
For maximum single avalanche energy please also refer to EAS value in “Energies” on Page 6.
Figure 13 Maximum load inductance for single pulse
L = f(IL), TJ(0) = TJ, start = 150°C, VBAT = 13.5 V
5.4 Reverse Current capability
A reverse battery situation means the OUT pin is pulled below GND potentials to -VBAT via the load ZL.
In this situation the load is driven by a current through the intrinsic body diode of the BTS3050TF. During
Reverse Battery all protection functions like current limitation, over temperature shut down and over voltage
clamping are not available.
L
L
CLAMPOUTBAT
LL
L
CLAMPOUTBAT
CLAMPOUT
R
L
I
VV
IR
R
VV
V×
⎥
⎥
⎦
⎤
⎢
⎢
⎣
⎡+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−
×
−×
−
×=
)(
)(
)(
1lnE
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−
−×=
)(
2
1
2
1
CLAMPOUTBAT
BAT
L
VV
V
LIE
1
10
100
1000
110
L [mH]
I
L
[A]
Datasheet 14 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Power Stage
The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS
reverse body diode “-VOUT”.
5.5 Inverse Current capability
An inverse current situation means the OUT pin is pulled below GND potential by current flowing from GND to
OUT (for example in half-bridge configuration and inductive load using freewheeling via the low side path).
In this situation the load is driven by a current through the intrinsic body diode (device off) of the BTS3050TF.
During Inverse operation all protection functions like current limitation, over temperature shut-down and
over voltage clamping are not available.
The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS
reverse body diode “-VOUT”.
Input current behavior during inverse condition on Output
Please note that during inverse current on drain an increased input current can flow. To limit this current it is
needed to place a resistor (RIN) in line with the input, also to prevent the microcontroller I/O pins from latching
up in this case. The value of this resistor is a compromise of input voltage level in normal operation and
maximum allowed device input current IIN or I/O current (for example of microcontroller).
(5.3)
with IIN(max) = 2 mA (see also “Absolute Maximum Ratings” on Page 6) allow for the device;
VOHµC(max) maximum high level voltage of the control signal (microcontroller I/O)
5.6 Characteristics
Please see “Power Stage” on Page 11 for electrical characteristic table.
(max)
(max)
(min)
IN
OHuC
IN I
V
R=
Datasheet 15 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Protection Functions
6 Protection Functions
The device provides embedded protection functions. Integrated protection functions are designed to prevent
IC destruction under fault conditions described in the datasheet. Fault conditions are considered as “outside”
normal operation. Protection functions are not designed for continuous repetitive operation.
6.1 Over Voltage Clamping on OUTput
The BTS3050TF is equipped with a voltage clamp circuitry that keeps the drain-source (OUT to GND) voltage
VDS at a certain level VOUT(CLAMP). The over voltage clamping is overruling the other protection functions. Power
dissipation has to be limited to not exceed the maximum allowed junction temperature.
This function is also used in terms of inductive clamping. Please see also Chapter 5.3.1 for more details.
6.2 Thermal Protection
The device is protected against over temperature due to overload and / or bad cooling conditions. To ensure
this a temperature sensor is located in the power MOSFET.
The BTS3050TF has a thermal protection function with automatic restart. After the device has switched off due
to over temperature the device will stay off until the junction temperature has dropped down below the
thermal hysteresis “Thermal Protection” on Page 15.
Figure 14 Thermal protective switch OFF scenario with thermal restart
6.3 Short Circuit Protection / Current limitation
The condition short circuit is an overload condition to the device. If the load current reaches the limitation
value of IL(LIM) the device limits the current and starts heating up. When the thermal shutdown temperature is
reached, the device turns off.
The time from the beginning of current limitation until the over temperature switch off depends strongly on
the cooling conditions.
If input is still high, the device will turn on again after the measured temperature has dropped below the
thermal hysteresis.
Figure 15 shows this simplified behavior.
IN
0V
5V
t
Thermal shutdown
t
T
j
T
J(SD)
ΔT
J(SD)_HYS
Thermal _ f ault_ rest art .emf
V
OUT
V
BAT
t
Thermal restart
Datasheet 16 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Protection Functions
Figure 15 Short circuit protection via current limitation and over temperature switch off with auto-
restart
6.4 Characteristics
Please see “Protection Functions” on Page 15 for electrical characteristic table.
IN
0
5V
t
T
j
T
J(SD)
Short_circuit_restart.emf
Turn off due to over temperat ure
I
D
I
L(LIM)
Restart into short circuit after cooling down
Restart into normal load condition
V
bat
/Z
sc
ΔT
J_HYS
t
t
Occurren ce of O ver current
or h igh oh mic S hort circuit
Datasheet 17 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Input Stage
7 Input Stage
7.1 Input Circuit
Figure 16 shows the input circuit of the BTS3050TF. In case of open or floating input pin, the device will
automatically switch off and remain off. An ESD Zener structure protects the input circuit against ESD pulses.
Figure 16 Simplified Input circuitry
7.2 Characteristics
Please see “Input Stage” on Page 21 for electrical characteristic table.
IN
GND
ESD protection circuit
Input circuit.emf
Datasheet 18 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Electrical Characteristics
8 Electrical Characteristics
8.1 Power Stage
Please see Chapter “Power Stage” on Page 11 for parameter description and further details.
Table 5 Electrical Characteristics: Power Stage
Tj = -40°C to +150°C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter Symbol Values Unit Note or
Test Condition
Number
Min. Typ. Max.
Power Stage
On-State resistance
at hot temperature (150°C)
RDS(ON)_150 – 85 100 mΩTJ = 150°C;
VIN = 5 V
IL = IL(NOM)
P_8.1.2
On-State resistance
at ambient temperature (25°C)
RDS(ON)_25 –44–mΩTJ = 25°C;
VIN = 5 V;
IL = IL(NOM)
P_8.1.6
Nominal load current IL(NOM) –4–A1)
TJ < 150°C;
TA = 85°C
VIN = 5 V
P_8.1.26
OFF state load current,
Output leakage current
IL(OFF)_85 ––0.6µA
2)
VBAT = 13.5 V;
VIN = 0 V;
TJ ≤85°C
P_8.1.30
OFF state load current,
Output leakage current
IL(OFF)_150 –0,72.5µAVBAT = 18 V;
VIN = 0 V;
TJ= 150°C
P_8.1.34
Reverse body diode forward voltage -VOUT –0.81.1VIL = -IL(NOM);
VIN = 0 V
P_8.1.45
Datasheet 19 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Electrical Characteristics
8.2 Protection
Please see Chapter “Protection Functions” on Page 15 for parameter description and further details.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as “outside” normal operating range.
Protection functions are not designed for continuous repetitive operation
Dynamic characteristics - switching times single pulseVBAT = 13.5 V, RL = 4.7Ω;
for definition details see Figure 10 “Definition of Power Output Timing for Resistive Load” on Page 11
Turn-on time tON 35 75 115 µs 3)
VIN = 0 V to 5 V;
VOUT = 10% VBAT
P_8.1.46
Turn-off time tOFF 70 135 210 µs 4)
VIN = 5 V to 0 V;
VOUT = 90% VBAT
P_8.1.47
Turn-on delay time tDON 51525µsVIN = 0 V to 5 V;
VOUT = 90% VBAT
P_8.1.48
Turn-off delay time tDOFF 40 75 120 µs VIN = 5 V to 0 V;
VOUT = 10% VBAT
P_8.1.49
Fall time, Falling output voltage (turn-
on)
tF30 60 90 µs VIN = 0 V to 5 V;
VOUT = 90% VBAT to
VOUT = 10% VBAT
P_8.1.50
Rise time, Rising output voltage tR30 60 90 µs VIN = 5 V to 0 V;
VOUT = 10% VBAT to
VOUT = 90% VBAT
P_8.1.51
Turn-on Slew rate -(ΔV/Δt)ON 0.22 0.45 0.65 V/µs 5)
VOUT = 90% VBAT to
VOUT = 50% VBAT
P_8.1.52
Turn-off Slew rate (ΔV/Δt)OFF 0.22 0.45 0.65 V/µs 6)
VOUT = 50% VBAT to
VOUT = 90% VBAT
P_8.1.53
1) Not subject to production test, calculated by RthJA (JEDEC 2s2p, PCB) and RDS(ON)
2) Not subject to production test, specified by design;
3) Not subject to production test, calculated with delay time ON and fall time
4) Not subject to production test, calculated with delay time OFF and rise time
5) Not subject to production test, calculated slew rate between 90% and 50% VOUT;
6) Not subject to production test, calculated slew rate between 50% and 90% VOUT;
Table 5 Electrical Characteristics: Power Stage (cont’d)
Tj = -40°C to +150°C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter Symbol Values Unit Note or
Test Condition
Number
Min. Typ. Max.
Datasheet 20 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Electrical Characteristics
Table 6 Electrical Characteristics: Protection
Tj = -40°C to +150°C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter Symbol Values Unit Note or
Test Condition
Number
Min. Typ. Max.
Thermal Protection
Thermal shut down
junction temperature
TJ(SD) 150 175 – °C 1)
3V < VIN < 5.5 V
1) Not subject to production test, specified by design.
P_8.2.1
Thermal hysteresis ΔTJ_HYS –15– K 1) P_8.2.3
Overvoltage Protection
Drain clamp voltage VOUT(CLAMP) 40 45 – V VIN = 0 V;
ID = 10 mA
P_8.2.10
Current limitation (see also Figure 15)
Current limitation IL(LIM) 15 22.5 30 A VIN = 5 V; P_8.2.14
Datasheet 21 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Electrical Characteristics
8.3 Input Stage
Please see Chapter “Input Stage” on Page 17 for description and further details.
Table 7 Electrical Characteristics: Input
Tj = -40°C to +150°C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter Symbol Values Unit Note or
Test Condition
Number
Min. Typ. Max.
Input
Input Current,
normal ON state
IIN(ON) – 82 110 µA VIN = 5.0 V P_8.3.1
Input Current,
protection mode
IIN(PROT) – 184 240 µA VIN = 5.0 V P_8.3.4
Input current, inverse condition on
OUT to GND
IIN(-VOUT) – 15 – mA 1) 2)
VOUT < -0.3 V;
-0.3 V ≤ VIN <5.5 V
1) Not subject to production test, specified by design.
2) Input current must not exceed the maximum ratings in Chapter 4, P_4.1.10
P_8.3.7
Input pull down current IIN-GND 10 – – µA 3)
VIN = VIN(TH)
3) Not subject to production test, specified by design.
P_8.3.8
Input Voltage on-threshold VIN(TH) 0.8 2.3 3 V IL =1.0 mA;
Power DMOS
active
P_8.3.9
Datasheet 22 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
9 Characterization Results
Typical performance characteristics.
9.1 Power Stage
Figure 17 Typical RDS(ON) vs. VIN @ Tj= -40 ... 150°C, IL= IL(NOM)
0
0.02
0.04
0.06
0.08
0.1
0.12
3 3.5 4 4.5 5 5.5
RDS(ON) [Ω]
VIN [V]
150°C
85°C
25°C
-40°C
Datasheet 23 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 18 Typical RDS(ON) vs. TJ @ VIN = 3 ... 5.5 V, IL= IL(NOM)
Figure 19 Typical Reverse Diode |VOUT| vs. TJ @ IL= IL(NOM)
0
0.02
0.04
0.06
0.08
0.1
0.12
-40 25 85 150
R
DS(ON)
[Ω]
T
J
[°C]
3V
3.5V
4V
5V
5.5V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-40 25 85 150
|V
OUT
| [V]
TJ [°C]
Datasheet 24 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 20 Typical IL(OFF) vs. VDS @ TJ= -40 ... 150°C, VIN =0V
Figure 21 Typical IL(OFF) vs. VIN @ TJ= -40 ... 150°C, VBAT = 6 ... 18 V
0.0E+00
5.0E-07
1.0E-06
1.5E-06
2.0E-06
0 5 10 15 20 25 30
I
L(OFF)
[A]
VDS [V]
150
85
25
-40
0.0E+00
1.0E-06
2.0E-06
3.0E-06
4.0E-06
5.0E-06
6.0E-06
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
6V - 150°C
6V - 85°C
6V - 25°C
6V - -40°C
13.5V - 150°C
13.5V - 85°C
13.5V - 25°C
13.5V - -40°C
18V - 150°C
18V - 85°C
18V - 25°C
18V - -40°C
V
IN
[V]
I
L(OFF)
[A]
Datasheet 25 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 22 Typical destruction point. EAS vs. IL @ TJ=25and 150°C, VBAT =13.5V
Figure 23 Typical EAR vs. IL @ TJ=25and105°C, VBAT = 13.5V
0
100
200
300
400
500
600
700
800
900
1248
25
150
I
L
[A]
E
AS
[mJ]
0
10
20
30
40
50
60
70
80
90
100
4 4.5 5 5.5 6 6.5 7 7.5 8
E
AR
[mJ]
I
L
[A]
10k cycles - 25°C
100k cycles - 25°C
10k cycles- 105°C
100k cycles - 105°C
Datasheet 26 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 24 Typical EAR vs. Cycles @ TJ=25and105°C, VBAT =13.5V
Dynamic charactersitics (switching times):
Figure 25 Typical tF, tR vs. VIN @ TJ= -40 ... 150°C
0
20
40
60
80
100
120
1.0E+0 10.0E+0 100.0E+0 1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6
E
AR
[mJ]
Cycles
4A - 25°C
8A - 25°C
4A - 105°C
8A - 105°C
0
50
100
150
200
250
300
3 3.5 4 4.5 5 5.5
t
F
, t
R
[us]
V
IN
[V]
-40°C - Fall time
25°C - Fall time
150°C - Fall time
-40°C -Rise time
25°C - Rise time
150°C - Rise time
Datasheet 27 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 26 Typical tDON, tDOFF vs. VIN @ TJ= -40 ... 150°C
Figure 27 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs. VIN @ TJ= -40 ... 150°C
0
10
20
30
40
50
60
70
80
90
3 3.5 4 4.5 5 5.5
t
DON
, t
DOFF
[us]
V
IN
[V]
-40°C - Delay off time
25°C - Delay off time
150°C - Delay off time
-40°C - Delay on time
25°C - Delay on time
150°C - Delay on time
0
0.1
0.2
0.3
0.4
0.5
0.6
3 3.5 4 4.5 5 5.5
-(ΔV/Δt)
ON
, (ΔV/Δt)
OFF
[V/us]
V
IN
[V]
150°C - Slew rate on
25°C - Slew rate on
-40°C - Slew rate on
-40°C - Slew rate off
25°C - Slew rate off
150°C - Slew rate off
Datasheet 28 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 28 Typical tF, tR vs. VBAT @ VIN =5V; T
J= -40 ... 150°C
Figure 29 Typical tDON, tDOFF vs. VBAT @ VIN =5V; T
J= -40 ... 150°C
0
10
20
30
40
50
60
70
80
90
6 1116212631
t
F
, t
R
[us]
V
BAT
[V]
-40°C - Fall time
25°C - Fall time
150°C - Fall time
150°C - Rise time
25°C - Rise time
-40°C - Rise time
0
20
40
60
80
100
120
61116212631
tDON, tDOFF [us]
VBAT [V]
-40°C - Delay off time
25°C - Delay off time
150°C - Delay off time
-40°C - Delay on time
25°C - Delay on time
150°C - Delay on time
Datasheet 29 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 30 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs. VBAT @ VIN =5V; T
J= -40 ... 150°C
Figure 31 Typical tF, tR vs. IL @ VIN =5V; T
J= -40 ... 150°C
0
0.2
0.4
0.6
0.8
1
1.2
6 1116212631
-(ΔV/Δt)
ON
, (ΔV/Δt)
OFF
[V/us]
V
BAT
[V]
150°C - Slew rate on
25°C - Slew rate on
-40°C - Slew rate on
-40°C - Slew rate off
25°C - Slew rate off
150°C - Slew rate off
0
10
20
30
40
50
60
70
80
01234567
t
F
, t
R
[us]
I
L
[A]
-40°C - Fall time
25°C - Fall time
150°C - Fall time
150°C - Rise time
25°C - Rise time
-40°C - Rise time
Datasheet 30 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 32 Typical tDON, tDOFF vs. IL @ VIN =5V; T
J= -40 ... 150°C
Figure 33 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs. IL @ VIN =5V; T
J= -40 ... 150°C
0
10
20
30
40
50
60
70
80
90
100
01234567
t
DON
, t
DOFF
[us]
IL[A]
-40°C - Delay off time
25°C - Delay off time
150°C - Delay off time
-40°C - Delay on time
25°C - Delay on time
150°C - Delay on time
0
0.1
0.2
0.3
0.4
0.5
0.6
01234567
-(ΔV/Δt)
ON
, (ΔV/Δt)
OFF
[V/us]
I
L
[A]
150°C - Slew rate on
25°C - Slew rate on
-40°C - Slew rate on
-40°C - Slew rate off
25°C - Slew rate off
150°C - Slew rate off
Datasheet 31 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 34 Typical tF, tR vs. TJ @ VIN =5V
Figure 35 Typical tDON, tDOFF vs. TJ @ VIN =5V
0
10
20
30
40
50
60
70
-40 25 85 150
5 - Fall time
5 - Rise time
T
J
[°C]
t
F
,t
R
[us]
0
10
20
30
40
50
60
70
80
90
-40 25 85 150
5 - Delay off time
5 - Delay on time
T
J
[°C]
tDON, tDOFF [us]
Datasheet 32 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 36 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs. TJ @ VIN =5V
0.34
0.36
0.38
0.4
0.42
0.44
0.46
-40 25 85 150
-(ΔV/Δt)ON, (ΔV/Δt)OFF [V/us]
TJ [°C]
Slew rate on
Slew rate off
Datasheet 33 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
9.2 Protection
Figure 37 Typical VOUT(CLAMP) vs. TJ @ IL=10mA
Figure 38 Typical Il(LIM) vs. VBAT @ TJ= -40 ... 150°C, VIN =3 V and 5V
40
41
42
43
44
45
46
47
48
49
50
-40 25 85 150
V
OUT(CLAMP)
[V]
T
J
[°C]
0
5
10
15
20
25
61116212631
IL(LIM) [A]
VBAT [V]
5V - -40°C
5V - 25°C
5V - 85°C
5V - 150°C
3V - -40°C
3V - 25°C
3V - 85°C
3V - 150°C
Datasheet 34 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
9.3 Input Stage
Figure 39 Typical VIN(TH) vs. TJ @ IL=1mA
Figure 40 Typical IIN(ON) vs. VIN @ TJ= -40 ... 150°C, IL=IL(NOM)
0
0.5
1
1.5
2
2.5
3
-40 25 85 150
V
IN(TH)
[V]
T
J
[°C]
Vth_rising
Vth_falling
0.0E+00
2.0E-05
4.0E-05
6.0E-05
8.0E-05
1.0E-04
1.2E-04
1.4E-04
1.6E-04
3 3.5 4 4.5 5 5.5
150
85
25
-40
V
IN
[V]
I
IN(ON)
[A]
Datasheet 35 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Characterization Results
Figure 41 Typical IIN(PROT) vs. VIN @ TJ= -40 ... 150°C, IL=IL(NOM)
0.0E+00
2.0E-05
4.0E-05
6.0E-05
8.0E-05
1.0E-04
1.2E-04
1.4E-04
1.6E-04
1.8E-04
2.0E-04
3 3.5 4 4.5 5 5.5
150°C
85°C
25°C
-40°C
V
IN
[V]
I
IN(PROT)
[A]
Datasheet 36 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Application Information
10 Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
10.1 Application Diagram
An application example with the BTS3050TF is shown below.
Figure 42 Application example circuitry
Recommended values:
RIN =3.3kΩ (VIN =5V)
Note: This is a very simplified example of an application circuit. The function must be verified in the real
application.
V
BAT
application_DPAK3.emf
R
IN
Voltage
Regulator
IN
OUT
Load
I/O
PWM
Micro
controller
GND
VDD
OUT
GND
IN
BTS3xxxTF
Datasheet 37 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Package Outlines
11 Package Outlines
Figure 43 PG-TO252-3-313 (Outline Package)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
-0.05
6.5 +0.15
A
±0.5
9.98
6.22
-0.2
1
±0.1
3.7
±0.15
0.8
0.15 MAX.
±0.1
per side 3 x 0.75
2.28
4.57
+0.08
-0.04
0.5
2.3 -0.10
+0.05
B
1.3
+0.08
-0.04
0.5
0...0.15
B
A0.25 M
0.1
(4.24)
0.4
-0.01
+0.20
0.9
B
PG-TO252-3-313-PO V02
1) +0.2 mm mold flash.
All metal surfaces tin plated, except area of cut.
±0.1
5.4
(5)
0.5
1)
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.Dimensions in mm
Datasheet 38 Rev. 1.0
2016-06-01
HITFET - BTS3050TF
Smart Low-Side Power Switch
Revision History
12 Revision History
Revision Date Changes
Rev. 1.0 2016-06-01 Datasheet released
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™,
DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,
HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™,
OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™,
SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™.
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2016-06-01
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG.
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