HITFET - BTS3050TF Smart Low-Si de Power Switch 1 Overview Basic Features * Single channel device * Very low output leakage current in OFF state * Electrostatic discharge protection (ESD) * Embedded protection functions (see below) * Green Product (RoHS compliant) * AEC Qualified Applications * Suitable for resistive, inductive and capacitive loads * Replaces electromechanical relays, fuses and discrete circuits Description The BTS3050TF is a 50 m single channel Smart Low-Side Power Switch within a PG-TO252-3 package providing embedded protective functions. The power transistor is built by an N-channel vertical power MOSFET. The device is monolithically integrated. The BTS3050TF is automotive qualified and is optimized for 12 V automotive applications. Type Package Marking BTS3050TF PG-TO252-3 S3050TF Table 1 Product Summary Operating voltage range VOUT 0 .. 31 V Maximum load voltage VBAT(LD) 40 V Maximum input voltage VIN 5.5 V Maximum On-State resistance at TJ = 150C, VIN = 5 V RDS(ON) 100 m Nominal load current IL(NOM) 4A Minimum current limitation IL(LIM) 15 A Maximum OFF state load current at TJ 85C IL(OFF)_85 0.6 A Datasheet www.infineon.com/hitfet 1 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Overview Protection Functions * Over temperature shut-down with automatic-restart * Active clamp over voltage protection * Current limitation Detailed Description The device is able to switch all kind of resistive, inductive and capacitive loads, limited by maximum clamping energy and maximum current capabilities. The BTS3050TF offers ESD protection on the IN pin which refers to the Source pin (Ground). The over temperature protection prevents the device from overheating due to overload and/or bad cooling conditions. The temperature information is given by a temperature sensor in the power MOSFET. The BTS3050TF has an auto-restart thermal shut-down function. The device will turn on again, if input is still high, after the measured temperature has dropped below the thermal hysteresis. The over voltage protection can be activated during load dump or inductive turn off conditions. The power MOSFET is limiting the drain-source voltage, if it rises above the VOUT(CLAMP). Datasheet 2 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 3.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignment BTS3050TF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 5 4 4.1 4.2 4.3 4.3.1 4.3.2 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCB set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transient Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 7 8 8 9 5 5.1 5.2 5.3 5.3.1 5.3.1.1 5.4 5.5 5.6 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output On-state Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Resistive Load Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 11 12 12 13 13 14 14 6 6.1 6.2 6.3 6.4 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over Voltage Clamping on OUTput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protection / Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 15 15 15 16 7 7.1 7.2 Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 8.1 8.2 8.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18 19 21 9 9.1 9.2 9.3 Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 22 33 34 10 10.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 11 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Datasheet 3 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Block Diagram 2 Block Diagram OUT IN Gate Driving Unit ESD Protection Over Voltage Protection Overtemperature Protection Short circuit detection / Current Limitation GND BlockDiagram_3pin.emf Figure 1 Datasheet Block Diagram 4 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Pin Configuration 3 Pin Configuration 3.1 Pin Assignment BTS3050TF (top view ) 4 (Tab) 2 Figure 2 3.2 1 Pin Configuration. PG-TO252-3 3 Pin Definitions and Functions Pin Symbol Function 1 IN Input pin 2,4 OUT Drain, Load connection for power DMOS 3 GND Ground, Source of power DMOS 3.3 Voltage and current definition Figure 3 shows all external terms used in this data sheet, with associated convention for positive values. VBAT V BAT ZL I IN I L , ID IN OUT VIN VOUT GND I GND GND Figure 3 Datasheet Naming definition of electrical parameters 5 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 2 Absolute Maximum Ratings 1) Tj = -40C to +150C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. - - 40 V internally clamped P_4.1.1 Battery voltage for short circuit VBAT(SC) protection - - 31 V l = 0 or 5 m RSC = 20 m + RCable RCable = l * 16 m/m LSC = 5 H + LCable LCable = l * 1 H/m VIN = 5 V P_4.1.2 Battery voltage for load dump protection VBAT(LD) - - 40 V 2) P_4.1.4 VIN -0.3 Voltages Output voltage VOUT RI = 2 RL = 4.5 tD = 400 ms suppressed pulse Input Pin Input Voltage Input current in inverse condition on OUT to GND - 5.5 V - P_4.1.7 mA 3) P_4.1.10 IIN - | IL | - - IL(LIM) A - P_4.1.11 EAS - - 64 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 150C P_4.1.14 Unclamped repetitive inductive EAR(10k) energy pulse with 10 k cycles - - 64 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 105C P_4.1.22 Unclamped repetitive inductive EAR(100k) energy pulse with 100 k cycles - - 51 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 105C P_4.1.26 Unclamped repetitive inductive EAR(1M) energy pulse with 1 M cycles - - 40 mJ IL(0) = IL(NOM) VBAT = 13.5 V TJ(0) = 105C P_4.1.30 - 2 VOUT < -0.3 V Power Stage Load current Energies Unclamped single inductive energy single pulse Datasheet 6 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch General Product Characteristics Table 2 Absolute Maximum Ratings 1) (cont'd) Tj = -40C to +150C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Min. Typ. Max. Note or Test Condition Number Temperatures Operating temperature TJ -40 - +150 C - P_4.1.37 Storage temperature TSTG -55 - +150 C - P_4.1.38 VESD -4 - 4 kV HBM4) P_4.1.39 4) P_4.1.40 P_4.1.41 ESD Susceptibility ESD susceptibility (all pins) ESD susceptibility OUT-pin to GND VESD -10 - 10 kV HBM ESD susceptibility VESD -2 - 2 KV CDM5) 1) Not subject to production test, specified by design. 2) VBAT(LD) is setup without the DUT connected to the generator per ISO 7637-1; RI is the internal resistance of the load dump test pulse generator; tD is the pulse duration time for load dump pulse (pulse 5) according ISO 7637-1, -2. 3) Maximum allowed value. Consider also inverse input current in inverse condition P_8.3.7 in Chapter 8 4) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 k, 100 pF) 5) ESD susceptibility, Charged Device Model "CDM" ESDA STM5.3.1 or ANSI/ESD S.5.3.1 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 4.2 Table 3 Functional Range Functional Range 1) Please refer to "Electrical Characteristics" on Page 18 for test conditions Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Battery Voltage Range for Nominal VBAT(NOR) Operation 6.0 - 18.0 V - P_4.2.1 Extended Battery Voltage Range for Operation VBAT(EXT) 0 - 31 V parameter deviations possible P_4.2.2 Input Voltage Range for Nominal Operation VIN(NOR) 3.0 - 5.5 V - P_4.2.3 Junction Temperature TJ -40 - 150 C - P_4.2.5 Datasheet 7 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch General Product Characteristics 1) Not subject to production test, specified by design Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 4 Thermal Resistance PG-TO252-3 Parameter Symbol Junction to Soldering Point RthJSP Values Min. Typ. Max. - 2.5 - Unit Note or Test Condition Number K/W 1) 2) P_4.3.2 P_4.3.6 P_4.3.10 Junction to Ambient (2s2p) RthJA(2s2p) - 26 - K/W 1) 3) Junction to Ambient (1s0p+600 mm2 Cu) RthJA(1s0p) - 40 - K/W 1) 4) 1) Not subject to production test, specified by design 2) Specified RthJSPvalue is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature). TA = 85C. Device is loaded with 1 W power. 3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 m Cu, 2 x 35 m Cu). Where applicable a thermal via array under the ex posed pad contacted the first inner copper layer. TA = 85C, Device is loaded with 1 W power. 4) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board; The product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600 mm2 and 70 m thickness. TA = 85C, Device is loaded with 1 W power. 4.3.1 PCB set up The following PCB set up was implemented to determine the transient thermal impedance1) 1,5 mm 70m modelled (traces) 35m, 100% metalization* 70m, 5% metalization* Figure 4 Cross section JEDEC2s2p 1) (*) means percentual Cu metalization on each layer Datasheet 8 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch General Product Characteristics 1,5 mm 70m modelled (traces, cooling area) 70m; 5% metalization* Figure 5 Cross section JEDEC1s0p JEDEC 1s0p / 600mm Figure 6 4.3.2 Datasheet JEDEC 1s0p / footprint JEDEC 2s2p Detail:Solder Pads Vias PCB layout Transient Thermal Impedance 9 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch General Product Characteristics 30 25 ZthJA [K/W] 20 15 10 5 0 0,000001 0,00001 0,0001 0,001 0,01 0,1 1 10 100 1000 10000 tp. [s] Figure 7 Typical transient thermal impedance ZthJA = f(tp), TA = 85C Value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 m Cu, 2 x 35 m Cu). Device is dissipating 1 W power. 120 JEDEC 1s0p / 600mm 100 JEDEC 1s0p / 300mm JEDEC 1s0p / footprint ZthJA [K/W] 80 60 40 20 0 0,000001 0,00001 0,0001 0,001 0,01 0,1 1 10 100 1000 10000 tp. [s] Figure 8 Datasheet Typical transient thermal impedance ZthJA = f(tp), Ta = 85C Value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board. Device is dissipating 1 W power. 10 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Power Stage 5 Power Stage 5.1 Output On-state Resistance The on-state resistance depends on the junction temperature TJ and on the applied input voltage. Figure 9 show this dependencies in terms of temperature and voltage for the typical on-state resistance RDS(ON). The behavior in reverse polarity is described in"Reverse Current capability" on Page 13 140 120 3V RDS(ON) [m:] 100 5V 80 60 40 20 0 -40 -20 0 20 40 60 80 100 120 140 TJ [C] Figure 9 Typical On-State Resistance, RDS(ON) = f(TJ), VIN = 3 V; VIN = 5 V 5.2 Resistive Load Output Timing Figure 10 shows the typical timing when switching a resistive load. V IN VIN(TH) t VOUT VBAT 90 % -( V/ t)ON (V/t)OFF 50 % 10 % t DON tF tDOFF tON Figure 10 Datasheet tR t OFF t Switching.e Definition of Power Output Timing for Resistive Load 11 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Power Stage 5.3 Inductive Load 5.3.1 Output Clamping When switching off inductive loads with low side switches, the Drain-Source voltage VOUT rises above battery potential, because the inductance intends to continue driving the current. To prevent unwanted high voltages the device has a voltage clamping mechanism to keep the voltage at VOUT(CLAMP). During this clamping operation mode the device heats up as it dissipates the energy from the inductance. Therefore the maximum allowed load inductance is limited. See Figure 11 and Figure 12 for more details. VBAT ZL IL OUT ( DMOS Drain VOUT GND ( DMOS Source) IGND Figure 11 Output Clamp Circuitry V IN t IOUT t V OUT VOUT(CLAMP) VBAT t Figure 12 Datasheet I d Switching an Inductive Load 12 i O Cl f Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Power Stage 5.3.1.1 Maximum Load Inductance While demagnetization of inductive loads, energy has to be dissipated by the BTS3050TF. This energy can be calculated by the following equation: VBAT - VOUT (CLAMP) RL x I L + IL x L x ln 1 - E = VOUT ( CLAMP) x V -V RL RL BAT OUT ( CLAMP ) (5.1) Following equation simplifies under the assumption of RL = 0 E= 1 VBAT 2 LI L x 1 - 2 V V - BAT OUT ( CLAMP) (5.2) For maximum single avalanche energy please also refer to EAS value in "Energies" on Page 6. 1000 L [mH] 100 10 1 1 10 IL [A] Figure 13 Maximum load inductance for single pulse L = f(IL), TJ(0) = TJ, start = 150C, VBAT = 13.5 V 5.4 Reverse Current capability A reverse battery situation means the OUT pin is pulled below GND potentials to -VBAT via the load ZL. In this situation the load is driven by a current through the intrinsic body diode of the BTS3050TF. During Reverse Battery all protection functions like current limitation, over temperature shut down and over voltage clamping are not available. Datasheet 13 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Power Stage The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS reverse body diode "-VOUT". 5.5 Inverse Current capability An inverse current situation means the OUT pin is pulled below GND potential by current flowing from GND to OUT (for example in half-bridge configuration and inductive load using freewheeling via the low side path). In this situation the load is driven by a current through the intrinsic body diode (device off) of the BTS3050TF. During Inverse operation all protection functions like current limitation, over temperature shut-down and over voltage clamping are not available. The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS reverse body diode "-VOUT". Input current behavior during inverse condition on Output Please note that during inverse current on drain an increased input current can flow. To limit this current it is needed to place a resistor (RIN) in line with the input, also to prevent the microcontroller I/O pins from latching up in this case. The value of this resistor is a compromise of input voltage level in normal operation and maximum allowed device input current IIN or I/O current (for example of microcontroller). R IN (min) = VOHuC (max) (5.3) I IN (max) with IIN(max) = 2 mA (see also "Absolute Maximum Ratings" on Page 6) allow for the device; VOHC(max) maximum high level voltage of the control signal (microcontroller I/O) 5.6 Characteristics Please see "Power Stage" on Page 11 for electrical characteristic table. Datasheet 14 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Protection Functions 6 Protection Functions The device provides embedded protection functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the datasheet. Fault conditions are considered as "outside" normal operation. Protection functions are not designed for continuous repetitive operation. 6.1 Over Voltage Clamping on OUTput The BTS3050TF is equipped with a voltage clamp circuitry that keeps the drain-source (OUT to GND) voltage VDS at a certain level VOUT(CLAMP). The over voltage clamping is overruling the other protection functions. Power dissipation has to be limited to not exceed the maximum allowed junction temperature. This function is also used in terms of inductive clamping. Please see also Chapter 5.3.1 for more details. 6.2 Thermal Protection The device is protected against over temperature due to overload and / or bad cooling conditions. To ensure this a temperature sensor is located in the power MOSFET. The BTS3050TF has a thermal protection function with automatic restart. After the device has switched off due to over temperature the device will stay off until the junction temperature has dropped down below the thermal hysteresis "Thermal Protection" on Page 15. Thermal shutdown Thermal restart IN 5V 0V t Tj TJ(SD ) T J(SD)_HYS t VOUT VBAT t Thermal _ fault_ restart.emf Figure 14 6.3 Thermal protective switch OFF scenario with thermal restart Short Circuit Protection / Current limitation The condition short circuit is an overload condition to the device. If the load current reaches the limitation value of IL(LIM) the device limits the current and starts heating up. When the thermal shutdown temperature is reached, the device turns off. The time from the beginning of current limitation until the over temperature switch off depends strongly on the cooling conditions. If input is still high, the device will turn on again after the measured temperature has dropped below the thermal hysteresis. Figure 15 shows this simplified behavior. Datasheet 15 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Protection Functions Occurrence of Over current or high ohmic Short circuit Turn off due to over temperature Restart into short circuit after cooling down Restart into normal load condition IN 5V 0 t ID Vbat /Zsc IL(LIM ) t Tj TJ(SD) TJ_HY S t Short_circuit_restart.emf Figure 15 Short circuit protection via current limitation and over temperature switch off with autorestart 6.4 Characteristics Please see "Protection Functions" on Page 15 for electrical characteristic table. Datasheet 16 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Input Stage 7 Input Stage 7.1 Input Circuit Figure 16 shows the input circuit of the BTS3050TF. In case of open or floating input pin, the device will automatically switch off and remain off. An ESD Zener structure protects the input circuit against ESD pulses. ESD protection circuit IN GND Figure 16 7.2 Input circuit.emf Simplified Input circuitry Characteristics Please see "Input Stage" on Page 21 for electrical characteristic table. Datasheet 17 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Electrical Characteristics 8 Electrical Characteristics 8.1 Power Stage Please see Chapter "Power Stage" on Page 11 for parameter description and further details. Table 5 Electrical Characteristics: Power Stage Tj = -40C to +150C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number On-State resistance at hot temperature (150C) RDS(ON)_150 - 85 100 m TJ = 150C; VIN = 5 V IL = IL(NOM) P_8.1.2 On-State resistance at ambient temperature (25C) RDS(ON)_25 - 44 - m TJ = 25C; VIN = 5 V; IL = IL(NOM) P_8.1.6 Nominal load current IL(NOM) - 4 - A 1) P_8.1.26 OFF state load current, Output leakage current IL(OFF)_85 - OFF state load current, Output leakage current IL(OFF)_150 - 0,7 2.5 A VBAT = 18 V; VIN = 0 V; TJ = 150C P_8.1.34 Reverse body diode forward voltage -VOUT - 0.8 1.1 V IL = -IL(NOM); VIN = 0 V P_8.1.45 Power Stage Datasheet TJ < 150C; TA = 85C VIN = 5 V - 0.6 A 2) P_8.1.30 VBAT = 13.5 V; VIN = 0 V; TJ 85C 18 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Electrical Characteristics Table 5 Electrical Characteristics: Power Stage (cont'd) Tj = -40C to +150C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number Dynamic characteristics - switching times single pulseVBAT = 13.5 V, RL = 4.7; for definition details see Figure 10 "Definition of Power Output Timing for Resistive Load" on Page 11 Turn-on time 3) tON 35 tOFF 70 Turn-on delay time tDON 5 15 25 s VIN = 0 V to 5 V; VOUT = 90% VBAT P_8.1.48 Turn-off delay time tDOFF 40 75 120 s VIN = 5 V to 0 V; VOUT = 10% VBAT P_8.1.49 Fall time, Falling output voltage (turn- tF on) 30 60 90 s VIN = 0 V to 5 V; VOUT = 90% VBAT to VOUT = 10% VBAT P_8.1.50 Rise time, Rising output voltage tR 30 60 90 s VIN = 5 V to 0 V; VOUT = 10% VBAT to VOUT = 90% VBAT P_8.1.51 Turn-on Slew rate -(V/t)ON 0.22 0.45 0.65 V/s 5) P_8.1.52 0.22 0.45 0.65 V/s 6) Turn-off time Turn-off Slew rate 1) 2) 3) 4) 5) 6) (V/t)OFF 75 115 s P_8.1.46 VIN = 0 V to 5 V; VOUT = 10% VBAT 135 210 s 4) P_8.1.47 VIN = 5 V to 0 V; VOUT = 90% VBAT VOUT = 90% VBAT to VOUT = 50% VBAT P_8.1.53 VOUT = 50% VBAT to VOUT = 90% VBAT Not subject to production test, calculated by RthJA (JEDEC 2s2p, PCB) and RDS(ON) Not subject to production test, specified by design; Not subject to production test, calculated with delay time ON and fall time Not subject to production test, calculated with delay time OFF and rise time Not subject to production test, calculated slew rate between 90% and 50% VOUT; Not subject to production test, calculated slew rate between 50% and 90% VOUT; 8.2 Protection Please see Chapter "Protection Functions" on Page 15 for parameter description and further details. Note: Datasheet Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation 19 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Electrical Characteristics Table 6 Electrical Characteristics: Protection Tj = -40C to +150C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max. Number Thermal shut down junction temperature TJ(SD) 150 Thermal hysteresis TJ_HYS - 15 - K 1) P_8.2.3 VOUT(CLAMP) 40 45 - V VIN = 0 V; ID = 10 mA P_8.2.10 15 22.5 30 A VIN = 5 V; P_8.2.14 Thermal Protection 175 - C 1) P_8.2.1 3 V < VIN < 5.5 V Overvoltage Protection Drain clamp voltage Current limitation (see also Figure 15) Current limitation IL(LIM) 1) Not subject to production test, specified by design. Datasheet 20 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Electrical Characteristics 8.3 Input Stage Please see Chapter "Input Stage" on Page 17 for description and further details. Table 7 Electrical Characteristics: Input Tj = -40C to +150C, VBAT = 6 V to 18 V, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Input Input Current, normal ON state IIN(ON) - 82 110 A VIN = 5.0 V P_8.3.1 Input Current, protection mode IIN(PROT) - 184 240 A VIN = 5.0 V P_8.3.4 Input current, inverse condition on IIN(-VOUT) OUT to GND - 15 - mA 1) 2) P_8.3.7 Input pull down current IIN-GND 10 VIN(TH) 0.8 Input Voltage on-threshold VOUT < -0.3 V; -0.3 V VIN <5.5 V - - A 3) P_8.3.8 VIN = VIN(TH) 2.3 3 V IL =1.0 mA; Power DMOS active P_8.3.9 1) Not subject to production test, specified by design. 2) Input current must not exceed the maximum ratings in Chapter 4, P_4.1.10 3) Not subject to production test, specified by design. Datasheet 21 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 9 Characterization Results Typical performance characteristics. 9.1 Power Stage 0.12 0.1 RDS(ON) [] 0.08 150C 0.06 85C 25C -40C 0.04 0.02 0 3 3.5 4 4.5 5 5.5 VIN [V] Figure 17 Datasheet Typical RDS(ON) vs. VIN @ Tj = -40 ... 150C, IL = IL(NOM) 22 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 0.12 0.1 RDS(ON) [] 0.08 3V 0.06 3.5V 4V 5V 0.04 5.5V 0.02 0 -40 25 85 150 TJ [C] Figure 18 Typical RDS(ON) vs. TJ @ VIN = 3 ... 5.5 V, IL = IL(NOM) 1 0.9 0.8 0.7 |VOUT| [V] 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 25 85 150 TJ [C] Figure 19 Datasheet Typical Reverse Diode |VOUT| vs. TJ @ IL = IL(NOM) 23 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 2.0E-06 IL(OFF) [A] 1.5E-06 150 1.0E-06 85 25 -40 5.0E-07 0.0E+00 0 5 10 15 20 25 30 VDS [V] Figure 20 Typical IL(OFF) vs. VDS @ TJ = -40 ... 150C, VIN = 0 V 6.0E-06 6V - 150C 5.0E-06 6V - 85C 6V - 25C IL(OFF) [A] 4.0E-06 6V - -40C 13.5V - 150C 13.5V - 85C 3.0E-06 13.5V - 25C 13.5V - -40C 2.0E-06 18V - 150C 18V - 85C 1.0E-06 18V - 25C 18V - -40C 0.0E+00 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 VIN[V] Figure 21 Datasheet Typical IL(OFF) vs. VIN @ TJ = -40 ... 150C, VBAT = 6 ... 18 V 24 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 900 800 700 600 EAS [mJ] 500 25 400 150 300 200 100 0 1 2 4 8 IL [A] Figure 22 Typical destruction point. EAS vs. IL @ TJ = 25 and 150C, VBAT = 13.5V 100 90 80 70 EAR [mJ] 60 10k cycles - 25C 50 100k cycles - 25C 10k cycles- 105C 40 100k cycles - 105C 30 20 10 0 4 4.5 5 5.5 6 6.5 7 7.5 8 IL[A] Figure 23 Datasheet Typical EAR vs. IL @ TJ = 25 and 105C, VBAT = 13.5V 25 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 120 100 EAR [mJ] 80 4A - 25C 60 8A - 25C 4A - 105C 8A - 105C 40 20 0 1.0E+0 10.0E+0 100.0E+0 1.0E+3 10.0E+3 100.0E+3 1.0E+6 10.0E+6 Cycles Figure 24 Typical EAR vs. Cycles @ TJ = 25 and 105C, VBAT = 13.5V Dynamic charactersitics (switching times): 300 250 200 tF, tR [us] -40C - Fall time 25C - Fall time 150 150C - Fall time -40C -Rise time 25C - Rise time 100 150C - Rise time 50 0 3 3.5 4 4.5 5 5.5 VIN [V] Figure 25 Datasheet Typical tF, tR vs. VIN @ TJ = -40 ... 150C 26 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 90 80 70 tDON, tDOFF [us] 60 -40C - Delay off time 50 25C - Delay off time 150C - Delay off time 40 -40C - Delay on time 25C - Delay on time 30 150C - Delay on time 20 10 0 3 3.5 4 4.5 5 5.5 VIN [V] Figure 26 Typical tDON, tDOFF vs. VIN @ TJ = -40 ... 150C 0.6 -(V/t)ON, (V/t)OFF [V/us] 0.5 0.4 150C - Slew rate on 25C - Slew rate on 0.3 -40C - Slew rate on -40C - Slew rate off 25C - Slew rate off 0.2 150C - Slew rate off 0.1 0 3 3.5 4 4.5 5 5.5 VIN [V] Figure 27 Datasheet Typical -(V/t)ON, (V/t)OFF vs. VIN @ TJ = -40 ... 150C 27 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 90 80 70 60 tF, tR [us] -40C - Fall time 50 25C - Fall time 150C - Fall time 40 150C - Rise time 25C - Rise time 30 -40C - Rise time 20 10 0 6 11 16 21 26 31 VBAT [V] Figure 28 Typical tF, tR vs. VBAT @ VIN = 5V; TJ = -40 ... 150C 120 100 tDON, tDOFF [us] 80 -40C - Delay off time 25C - Delay off time 60 150C - Delay off time -40C - Delay on time 25C - Delay on time 40 150C - Delay on time 20 0 6 11 16 21 26 31 VBAT [V] Figure 29 Datasheet Typical tDON, tDOFF vs. VBAT @ VIN = 5V; TJ = -40 ... 150C 28 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 1.2 -(V/t)ON, (V/t)OFF [V/us] 1 0.8 150C - Slew rate on 25C - Slew rate on 0.6 -40C - Slew rate on -40C - Slew rate off 25C - Slew rate off 0.4 150C - Slew rate off 0.2 0 6 11 16 21 26 31 VBAT [V] Figure 30 Typical -(V/t)ON, (V/t)OFF vs. VBAT @ VIN = 5V; TJ = -40 ... 150C 80 70 60 tF, tR [us] 50 -40C - Fall time 25C - Fall time 40 150C - Fall time 150C - Rise time 30 25C - Rise time -40C - Rise time 20 10 0 0 1 2 3 4 5 6 7 IL[A] Figure 31 Datasheet Typical tF, tR vs. IL @ VIN = 5V; TJ = -40 ... 150C 29 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 100 90 80 tDON , tDOFF [us] 70 60 -40C - Delay off time 25C - Delay off time 50 150C - Delay off time -40C - Delay on time 40 25C - Delay on time 30 150C - Delay on time 20 10 0 0 1 2 3 4 5 6 7 IL[A] Figure 32 Typical tDON, tDOFF vs. IL @ VIN = 5V; TJ = -40 ... 150C 0.6 -(V/t)ON, (V/t)OFF [V/us] 0.5 0.4 150C - Slew rate on 25C - Slew rate on -40C - Slew rate on 0.3 -40C - Slew rate off 25C - Slew rate off 0.2 150C - Slew rate off 0.1 0 0 1 2 3 4 5 6 7 IL[A] Figure 33 Datasheet Typical -(V/t)ON, (V/t)OFF vs. IL @ VIN = 5V; TJ = -40 ... 150C 30 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 70 60 50 tF, tR [us] 40 5 - Fall time 30 5 - Rise time 20 10 0 -40 Figure 34 25 85 TJ [C] 150 Typical tF, tR vs. TJ @ VIN = 5 V 90 80 70 tDON, tDOFF [us] 60 50 5 - Delay off time 40 5 - Delay on time 30 20 10 0 -40 Figure 35 Datasheet 25 85 TJ [C] 150 Typical tDON, tDOFF vs. TJ @ VIN = 5 V 31 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 0.46 -(V/t)ON, (V/t)OFF [V/us] 0.44 0.42 0.4 Slew rate on Slew rate off 0.38 0.36 0.34 -40 25 85 150 TJ [C] Figure 36 Datasheet Typical -(V/t)ON, (V/t)OFF vs. TJ @ VIN = 5 V 32 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 9.2 Protection 50 49 48 VOUT(CLAMP) [V] 47 46 45 44 43 42 41 40 -40 25 85 150 TJ [C] Figure 37 Typical VOUT(CLAMP) vs. TJ @ IL = 10 mA 25 20 5V - -40C 15 IL(LIM) [A] 5V - 25C 5V - 85C 5V - 150C 3V - -40C 10 3V - 25C 3V - 85C 3V - 150C 5 0 6 11 16 21 26 31 VBAT [V] Figure 38 Datasheet Typical Il(LIM) vs. VBAT @ TJ = -40 ... 150C, VIN = 3 V and 5 V 33 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 9.3 Input Stage 3 2.5 VIN(TH) [V] 2 1.5 Vth_rising Vth_falling 1 0.5 0 -40 25 85 150 TJ [C] Figure 39 Typical VIN(TH) vs. TJ @ IL = 1 mA 1.6E-04 1.4E-04 1.2E-04 IIN(ON) [A] 1.0E-04 150 8.0E-05 85 25 6.0E-05 -40 4.0E-05 2.0E-05 0.0E+00 3 3.5 4 4.5 5 5.5 VIN [V] Figure 40 Datasheet Typical IIN(ON) vs. VIN @ TJ = -40 ... 150C, IL = IL(NOM) 34 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Characterization Results 2.0E-04 1.8E-04 1.6E-04 1.4E-04 IIN(PROT) [A] 1.2E-04 150C 1.0E-04 85C 25C 8.0E-05 -40C 6.0E-05 4.0E-05 2.0E-05 0.0E+00 3 3.5 4 4.5 5 5.5 VIN [V] Figure 41 Datasheet Typical IIN(PROT) vs. VIN @ TJ = -40 ... 150C, IL = IL(NOM) 35 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Application Information 10 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 10.1 Application Diagram An application example with the BTS3050TF is shown below. V BAT Voltage Regulator IN Load OUT Micro controller BTS3 xxxTF VDD OUT R IN IN I/O PWM GND GND application_DPAK3.emf Figure 42 Application example circuitry Recommended values: RIN = 3.3 k (VIN = 5 V) Note: Datasheet This is a very simplified example of an application circuit. The function must be verified in the real application. 36 Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Package Outlines 11 Package Outlines 6.5 +0.15 -0.05 A 5.4 0.11) 2.3 +0.05 -0.10 0.4 0.9 +0.20 -0.01 0...0.15 0.8 0.15 3.7 0.5 +0.08 -0.04 B 1.3 (4.24) 9.98 0.5 6.22 -0.2 1 0.1 (5) 0.5 0.15 MAX. per side 0.5 +0.08 -0.04 3 x 0.75 0.1 2.28 4.57 0.1 B 0.25 M A B 1) +0.2 mm mold flash. All metal surfaces tin plated, except area of cut. PG-TO252-3-313-PO V02 Figure 43 PG-TO252-3-313 (Outline Package) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Datasheet 37 Dimensions in mm Rev. 1.0 2016-06-01 HITFET - BTS3050TF Smart Low-Side Power Switch Revision History 12 Revision History Revision Date Changes Rev. 1.0 Datasheet released Datasheet 2016-06-01 38 Rev. 1.0 2016-06-01 Please read the Important Notice and Warnings at the end of this document Trademarks of Infineon Technologies AG HVICTM, IPMTM, PFCTM, AU-ConvertIRTM, AURIXTM, C166TM, CanPAKTM, CIPOSTM, CIPURSETM, CoolDPTM, CoolGaNTM, COOLiRTM, CoolMOSTM, CoolSETTM, CoolSiCTM, DAVETM, DI-POLTM, DirectFETTM, DrBladeTM, EasyPIMTM, EconoBRIDGETM, EconoDUALTM, EconoPACKTM, EconoPIMTM, EiceDRIVERTM, eupecTM, FCOSTM, GaNpowIRTM, HEXFETTM, HITFETTM, HybridPACKTM, iMOTIONTM, IRAMTM, ISOFACETM, IsoPACKTM, LEDrivIRTM, LITIXTM, MIPAQTM, ModSTACKTM, my-dTM, NovalithICTM, OPTIGATM, OptiMOSTM, ORIGATM, PowIRaudioTM, PowIRStageTM, PrimePACKTM, PrimeSTACKTM, PROFETTM, PRO-SILTM, RASICTM, REAL3TM, SmartLEWISTM, SOLID FLASHTM, SPOCTM, StrongIRFETTM, SupIRBuckTM, TEMPFETTM, TRENCHSTOPTM, TriCoreTM, UHVICTM, XHPTM, XMCTM. Trademarks updated November 2015 Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2016-06-01 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2016 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 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