Rev.4.5_00
2-WIRE CMOS SERIAL E2PROM S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 1
The S-24CS01A/02A/04A/08A is a 2-wired, low
power and wide range operation 1-Kbit, 2-Kbit, 4-Kbit
and 8-Kbit E2PROM organized as 128 words × 8 bits,
256 words × 8 bits, 512 words × 8 bits and 1024
words × 8 bits in each.
Page write and sequential read are available.
Features
• Low power consumption Standby : 2.0 µA Max. (VCC=5.5 V)
Read : 0.8 mA Max. (VCC=5.5 V)
• Operating voltage range Read : 1.8 to 5.5 V (at −40 to +85°C)
Write : 2.55 to 5.5 V (at −40 to +85°C)
• Page write : 8 bytes / page (S-24CS01A/02A)
16 bytes / page (S-24CS04A/08A)
• Sequential read
• Operating Frequency : 400 kHz (VCC = 2.55 to 5.5 V, at −40 to +85°C)
• Write disable function when power supply voltage is low
• Endurance: 107 cycles/word*1 (at +25°C) write capable,
106 cycles/word*1 (at +85°C)
3 × 105 cycles/word*1 (at +105°C)
*1. For each address (Word: 8 bits)
• Data retention: 10 years (after rewriting 106 cycles/word at +85°C)
• S-24CS01A : 1 Kbit
• S-24CS02A : 2 Kbit
• S-24CS04A : 4 Kbit
• S-24CS08A : 8 Kbit
• High-temperature operation : +105°C Max. supported
(Only S-24CS0xAFJ-TBH-G, S-24CS0xAFT-TBH-G)
• Write protection : 100%
• Lead-free product
Packages
Drawing code
Package name Package Tape Reel Land
8-Pin DIP DP008-F
8-Pin SOP(JEDEC) FJ008-A FJ008-D FJ008-D
8-Pin TSSOP FT008-A FT008-E FT008-E
SNT-8A PH008-A PH008-A PH008-A PH008-A
Caution This product is intended to use in general electronic devices such as consumer electronics,
office equipment, and communications devices. Before using the product in medical
equipment or automobile equipment including car audio, keyless entry and engine control
unit, contact to SII is indispensable.
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
2
Pin Configurations
8-Pin DIP
Top view
Table 1
Pin No.
Symbol
Description
1 A0
Address input (No connection in S-24CS04A/08A
*1
)
2 A1
Address input (No connection in S-24CS08A
*1
)
3 A2 Address input
4 GND Ground
5 SDA Serial data input / output
6 SCL Serial clock input
7 WP
Write protection input
Connected to VCC: Protection valid
Connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
GND
A2
Figure 1
S-24CS01ADP-G
S-24CS02ADP-G
S-24CS04ADP-G
S-24CS08ADP-1G
Remark See Dimensions for details of the package drawings.
8-Pin SOP(JEDEC)
Top view
Table 2
Pin No.
Symbol
Description
1 A0
Address input (No connection in S-24CS04A/08A
*1
)
2 A1
Address input (No connection in S-24CS08A
*1
)
3 A2 Address input
4 GND Ground
5 SDA Serial data input / output
6 SCL Serial clock input
7 WP
Write protection input
Connected to VCC: Protection valid
Connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
Remark See Dimensions for details of the package drawings.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
GND
A2
Figure 2
S-24CS01AFJ-TB-G
S-24CS01AFJ-TBH-G
S-24CS02AFJ-TB-G
S-24CS02AFJ-TBH-G
S-24CS04AFJ-TB-G
S-24CS04AFJ-TBH-G
S-24CS08AFJ-TB-1G
S-24CS08AFJ-TBH-1G
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 3
8-Pin TSSOP
Top view
Table 3
Pin No.
Symbol
Description
1 A0
Address input (No connection in S-24CS04A/08A
*1
)
2 A1
Address input (No connection in S-24CS08A
*1
)
3 A2 Address input
4 GND Ground
5 SDA Serial data input / output
6 SCL Serial clock input
7 WP
Write protection input
Connected to VCC: Protection valid
Connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SD
A
A0
A1
GND
A2
Figure 3
S-24CS01AFT-TB-G
S-24CS01AFT-TBH-G
S-24CS02AFT-TB-G
S-24CS02AFT-TBH-G
S-24CS04AFT-TB-G
S-24CS04AFT-TBH-G
S-24CS08AFT-TB-1G
S-24CS08AFT-TBH-1G
Remark See Dimensions for details of the package drawings.
SNT-8A
Top view
Table 4
Pin No.
Symbol
Description
1 A0
Address input (No connection in S-24CS04A
*1
)
2 A1 Address input
3 A2 Address input
4 GND Ground
5 SDA Serial data input / output
6 SCL Serial clock input
7 WP
Write protection input
Connected to VCC: Protection valid
Connected to GND: Protection invalid
8 VCC Power supply
*1. Connect to GND or VCC.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
GND
Figure 4
S-24CS01APH-TF-G
S-24CS02APH-TF-G
S-24CS04APH-TF-G
Remark See Dimensions for details of the package drawings.
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
4
Block diagram
VCC
GND
Serial Clock
Controller
Device Address
Comparator
Address
Counter
Y Decoder
Data Output
ACK Output
Controller
Start / Stop
Detector
Data Register
E
2
PROM
X Decoder
Selector
High-Voltage Generator
SCL
SDA
A
2
DIN
DOUT
R / W
LOAD INC
COMP
LOAD
WP
A
1
*1
A
0
*2
Voltage Detector
*1. This pin is not available for S-24CS08A.
*2. This pin is not available for S-24CS04A/08A.
Figure 5
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 5
Absolute Maximum Ratings
Table 5
Item Symbol Ratings Unit
Power supply voltage VCC −0.3 to +7.0 V
Input voltage VIN −0.3 to VCC+0.3 V
Output voltage VOUT −0.3 to VCC V
Operating ambient temperature Topr −40 to +105 °C
Storage temperature Tstg −65 to +150 °C
Caution The absolute maximum ratings are rated values exceeding which the
product could suffer physical damage. These values must therefore not
be exceeded under any conditions.
Recommended Operating Conditions
Table 6
−
40 to
+
85
°
C
+
85 to
+
105
°
C
Item Symbol Conditions
Min. Typ. Max. Min. Typ. Max.
Unit
Read Operation 1.8
5.5 4.5
5.5
V
Power supply voltage
V
CC
Write Operation
2.55
5.5
4.5
5.5
V
V
CC
=4.5 to 5.5 V 0.7
×
V
CC
V
CC
0.7
×
V
CC
V
CC
V
V
CC
=2.55 to 4.5 V 0.7
×
V
CC
V
CC
V
High level input voltage
V
IH
V
CC
=1.8 to 2.55 V 0.8
×
V
CC
V
CC
V
V
CC
=4.5 to 5.5 V 0.0
0.3
×
V
CC
0.0
0.3
×
V
CC
V
V
CC
=2.55 to 4.5 V 0.0
0.3
×
V
CC
V
Low level input voltage
V
IL
V
CC
=1.8 to 2.55 V 0.0
0.2
×
V
CC
V
Pin Capacitance
Table 7
(Ta=25°C, f=1.0 MHz, VCC=5 V)
Item Symbol
Conditions
Min. Typ. Max. Unit
V
IN
=0 V (S-24CS01A/02A: SCL, A0, A1, A2, WP) — — 10 pF
V
IN
=0 V (S-24CS04A: SCL, A1, A2, WP) — — 10 pF
Input capacitance C
IN
V
IN
=0 V (S-24CS08A: SCL, A2, WP) — — 10 pF
Input/output capacitance C
I / O
V
I / O
=0 V (SDA) — — 10 pF
Endurance
Table 8
Item Symbol Operation temperature Min. Typ. Max. Unit
−40 to +85°C 106 — — cycles / word*1
Endurance NW +85 to +105°C 3×105 — — cycles / word*1
*1. For each address (Word: 8 bits)
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
6
DC Electrical Characteristics
Table 9
−
40 to
+
85
°
C
+
85 to
+
105
°
C
V
CC
=4.5 to 5.5 V
f = 400 kHz
V
CC
=2.7 to 4.5 V
*1
f = 100 kHz
V
CC
=1.8 to 2.7 V
f = 100 kHz
V
CC
=4.5 to 5.5 V
f = 350 kHz
Item Symbol Conditions
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Unit
Current
consumption
(READ)
I
CC1
0.8 0.3 0.2 0.8
mA
Current
consumption
(WRITE)
I
CC2
4.0 1.5 4.0
mA
*1. VCC=2.55 to 4.5 V in Write
Table 10
−
40 to
+
85
°
C
+
85 to
+
105
°
C
V
CC
=4.5 to 5.5 V V
CC
=2.55 to 4.5 V V
CC
=1.8 to 2.55 V V
CC
=4.5 to 5.5 V
Item
Symbol
Conditions
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Unit
Standby current
consumption
I
SB
V
IN
=V
CC
or GND
2.0
2.0
2.0
2.0
µ
A
Input leakage current
I
LI
V
IN
=GND to V
CC
0.1 1.0
0.1 1.0
0.1 1.0
0.1 1.0
µ
A
Output leakage current
I
LO
V
OUT
=GND to V
CC
0.1 1.0
0.1 1.0
0.1 1.0
0.1 1.0
µ
A
I
OL
=3.2 mA
0.4
0.4
0.4
V
Low level output voltage
V
OL
I
OL
=1.5 mA
0.3
0.3
0.5
0.3
V
Current address hold
voltage
V
AH
1.5
5.5 1.5
4.5 1.5
2.55 1.5
5.5
V
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 7
AC Electrical Characteristics
Table 11 Measurement Conditions
Input pulse voltage 0.1
×
V
CC
to 0.9
×
V
CC
Input pulse rising / falling time 20 ns
Output judgment voltage 0.5
×
V
CC
Output load 100 pF
+
Pull-up resistor 1.0 k
Ω
VCC
R=1.0 kΩ
SDA
C=100 pF
Figure 6 Output Load Circuit
Table 12
−40 to +85°C
+85 to +105°C
Symbol
VCC=4.5 to 5.5 V
VCC=2.55 to 4.5 V VCC=1.8 to 2.55 V
VCC=4.5 to 5.5 V
Item
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Unit
SCL clock frequency
fSCL
0
400 0
400 0
100 0
350 kHz
SCL clock time
“
L
”
tLOW
1.0
1.0
4.7
1.1
µ
s
SCL clock time
“
H
”
tHIGH
0.9
0.9
4.0
1.0
µ
s
SDA output delay time
tAA
0.1
0.9 0.1
0.9 0.1
3.5 0.1
1.0
µ
s
SDA output hold time
tDH
50
50
100
50
ns
Start condition setup time
tSU.STA
0.6
0.6
4.7
0.6
µ
s
Start condition hold time
tHD.STA
0.6
0.6
4.0
0.6
µ
s
Data input setup time
tSU.DAT
100
100
200
100
ns
Data input hold time
tHD.DAT
0
0
0
0
ns
Stop condition setup time
tSU.STO
0.6
0.6
4.0
0.6
µ
s
SCL, SDA rising time
tR
0.3
0.3
1.0
0.3
µ
s
SCL, SDA falling time
tF
0.3
0.3
0.3
0.3
µ
s
Bus release time
tBUF
1.3
1.3
4.7
1.3
µ
s
Noise suppression time
tI
50
100
100
50 ns
SCL
SDA IN
SDA OUT
tBUF
tR
tSU.STO
tSU.DAT
tHD.DAT
tDH tAA
tHIGH tLOW
tHD.STA tSU.STA
tF
Figure 7 Bus Timing
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
8
Table 13
−40 to +85°C +85 to +105°C
VCC=2.55 to 5.5 V VCC=4.5 to 5.5 V
Item Symbol
Min. Typ. Max. Min. Typ. Max.
Unit
Write time tWR — 4.0 10.0 — 4.0 10.0 ms
SCL
SDA D0
Write data
A
cknowledge
Stop Condition Start Condition
t
WR
Figure 8 Write Cycle Timing
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 9
Pin Functions
1. Address Input Pins (A0, A1 and A2)
The slave address is assigned by connecting pins A0, A1 and A2 to the GND or to the VCC respectively.
One of the eight different slave address can be assigned to the S-24CS01A/02A by the combination of
pins A0, A1 and A2.
The slave address is assigned by connecting pins A1 and A2 to the GND or to the VCC respectively. One of
the four different slave address can be assigned to the S-24CS04A by the combination of pins A1 and A2.
The slave address is assigned by connecting the A2 pin to the GND or to the VCC respectively. The two
different slave address can be assigned to the S-24CS08A by A2 pin.
The given slave address, which is compared with the slave address transmitted from the master device, is
used to select the one among the multiple devices connected to the bus. The address input pin should be
connected to the GND or to the VCC.
2. SDA (Serial Data Input / Output) Pin
The SDA pin is used for bi-directional transmission of serial data. It consists of a signal input pin and an
Nch open-drain output pin.
The SDA line is usually pulled up to the VCC, and OR-wired with other open-drain or open-collector output
devices.
3. SCL (Serial Clock Input) Pin
The SCL pin is used for serial clock input. Since signals are processed at the rising or falling edge of the
SCL clock input signal, attention should be paid to the rising time and falling time to conform to the
specifications.
4. WP Pin
The write protection is enabled by connecting the WP pin to the VCC. When there is no need for write
protection, connect the pin to the GND.
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
10
Operation
1. Start Condition
Start is identified by a high to low transition of the SDA line while the SCL line is stable at high.
Every operation begins from a start condition.
2. Stop Condition
Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high.
When a device receives a stop condition during a read sequence, the read operation is interrupted, and
the device enters standby mode.
When a device receives a stop condition during a write sequence, the reception of the write data is halted,
and the E2PROM initiates a write cycle.
tSU.STA tHD.STA tSU.STO
Start Condition Stop Condition
SCL
SDA
Figure 9 Start / Stop Conditions
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 11
3. Data Transmission
Changing the SDA line while the SCL line is low, data is transmitted.
Changing the SDA line while the SCL line is high, a start or stop condition is recognized.
tSU.DAT t
HD.DAT
SCL
SDA
Figure 10 Data Transmission Timing
4. Acknowledge
The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down
the SDA line to acknowledge the receipt of the 8-bit data.
When an internal write cycle is in progress, the device does not generate an acknowledge.
1 8 9
Acknowledge
Output
tAA tDH
Start Condition
SCL
(E2PROM Input)
SDA
(Master Output)
SDA
(E2PROM Output)
Figure 11 Acknowledge Output Timing
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
12
5. Device Addressing
To start communication, the master device on the system generates a start condition to the bus line. Next,
the master device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus.
The 4 most significant bits of the device address are called the "Device Code", and are fixed to "1010".
In S-24CS01A/02A, successive 3 bits are called the “Slave Address”. These 3 bits are used to identify a
device on the system bus and are compared with the predetermined value which is defined by the address
input pins (A0, A1 and A2). When the comparison result matches, the slave device responds with an
acknowledge during the 9th clock cycle.
In S-24CS04A, successive 2 bits are called the "Slave Address". These 2 bits are used to identify a device
on the system bus and are compared with the predetermined value which is defined by the address input
pins (A1 and A2). When the comparison result matches, the slave device responds with an acknowledge
during the 9th clock cycle.
The successive 1 bit (P0) is used to define a page address and choose the two 256-byte memory blocks
(Address 000h to 0FFh and 100h to 1FFh).
In S-24CS08A, successive 1 bit is called the “Slave Addrdess”. This 1 bit is used to identify a device on the
system bus and is compared with the predetermined value which is defined by the address input pin (A2).
When the comparison result matches, the slave device responds with an acknowledge during the 9th
clocks cycle.
The successive 2 bits (P1 and P0) are used to define a page address and choose the four 256-byte
memory blocks (Address 000h to 0FFh, 100h to 1FFh, 200h to 2FFh and 300h to 3FFh).
Slave Address
1 0 1 0
A
2
A
1
A
0 R/W
Device Code
LSB
MSB
S-24CS01A/02A
Slave / Page
Address
Device Code
S-24CS04A 1 0 1 0
A
2
A
1 P0 R/W
1 0 1 0
A
2 P1 P0 R/W
LSB
MSB
S-24CS08A
Figure 12 Device Address
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 13
6. Write
6. 1 Byte Write
When the master sends a 7-bit device address and a 1-bit read / write instruction code set to "0",
following a start condition, the E2PROM acknowledges it. The E2PROM then receives an 8-bit word
address and responds with an acknowledge. After the E2PROM receives 8-bit write data and responds
with an acknowledge, it receives a stop condition and that initiates the write cycle at the addressed
memory.
During the write cycle all operations are forbidden and no acknowledge is generated.
A2 A1 A0
S
T
A
R
T
1 0 1 0
W
R
I
T
E
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE
ADR INC
(
ADDRESS INCREMENT
)
A
C
K
L
S
B
0
WORD ADDRESS
S
T
O
P
DATA
W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
A
C
K
Remark1. A1 is P1 in the S-24CS08A.
2. A0 is P0 in the S-24CS04A/08A.
3. W7 is optional in the S-24CS01A.
Figure 13 Byte Write
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
14
6. 2 Page Write
The page write mode allows up to 8 bytes to be written in a single write operation in the S-24CS01A/02A
and 16 bytes to be written in a single write operation in the S-24CS04A/08A.
Basic data transmission procedure is the same as that in the "Byte Write". But instead of generating a
stop condition, the master transmits 8-bit write data up to 8 bytes before the page write.
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to "0",
following a start condition, it generates an acknowledge. Then the E2PROM receives an 8-bit word
address, and responds with an acknowledge. After the E2PROM receives 8-bit write data and responds
with an acknowledge, it receives 8-bit write data corresponding to the next word address, and generates
an acknowledge. The E2PROM repeats reception of 8-bit write data and generation of acknowledge in
succession. The E2PROM can receive as many write data as the maximum page size.
Receiving a stop condition initiates a write cycle of the area starting from the designated memory address
and having the page size equal to the received write data.
S
T
A
R
T
1 0 1 0
W
R
I
T
E
S
T
O
P
DEVICE
ADDRESS WORD ADDRESS (n)
R
/
W
M
S
B
SDA
LINE
2
1
0
A
C
K
L
S
B
A
C
K
A
C
K
0D7 D6 D5 D4 D3 D2 D1 D0 D7 D0 D7 D0
A
C
K
ADR INC ADR INC
A
C
K
DATA (n) DATA (n+1) DATA (n+x)
W7 W6 W5 W4 W3 W2 W1 W0
ADR INC
Remark1. A1 is P1 in the S-24CS08A.
2. A0 is P0 in the S-24CS04A/08A.
3. W7 is optional in the S-24CS01A.
Figure 14 Page Write
In S-24CS01A/02A, the lower 3 bits of the word address are automatically incremented every time when
the E2PROM receives 8-bit write data. If the size of the write data exceeds 8 bytes, the upper 5 bits of the
word address remain unchanged, and the lower 3 bits are rolled over and previously received data will be
overwritten.
In S-24CS04A, the lower 4 bits of the word address are automatically incremented every time when the
E2PROM receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits of the
word address and page address (P0) remain unchanged, and the lower 4 bits are rolled over and
previously received data will be overwritten.
In S-24CS08A, the lower 4 bits of the word address are automatically incremented every time when the
E2PROM receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits of the
word address and page address (P1 and P0) remain unchanged, and the lower 4 bits are rolled over and
previously received data will be overwritten.
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 15
6. 3 Write Protection
Write protection is available in the S-24CS01A/02A/04A/08A. When the WP pin is connected to the VCC,
write operation to memory area is forbidden at all.
When the WP pin is connected to the GND, the write protection is invalid, and write operation in all
memory area is available.
Fix the level of the WP pin from the rising edge of SCL for loading the last write data (D0) until the end of
the write time (10 ms max.). If the WP pin changes during this time, the address data being written at this
time is not guaranteed.
There is no need for using write protection, the WP pin should be connected to the GND. The write
protection is valid in the operating voltage range.
SDA
WP
SCL
Acknowledge
WP Pin Fixed Period
Stop
Condition
Start
Condition
Write Data
t
WR
D0
Figure 15 WP Pin Fixed Period
6. 4 Acknowledge Polling
Acknowledge polling is used to know the completion of the write cycle in the E2PROM.
After the E2PROM receives a stop condition and once starts the write cycle, all operations are forbidden
and no response is made to the signal transmitted by the master device.
Accordingly the master device can recognize the completion of the write cycle in the E2PROM by
detecting a response from the slave device after transmitting the start condition, the device address and
the read/write instruction code to the E2PROM, namely to the slave devices.
That is, if the E2PROM does not generate an acknowledge, the write cycle is in progress and if the
E2PROM generates an acknowledge, the write cycle has been completed.
Keep the level of the WP pin fixed until acknowledge is confirmed.
It is recommended to use the read instruction "1" as the read/write instruction code transmitted by the
master device.
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
16
7. Read
7. 1 Current Address Read
Either in writing or in reading the E2PROM holds the last accessed memory address, internally
incremented by one. The memory address is maintained as long as the power voltage is higher than the
current address hold voltage VAH.
The master device can read the data at the memory address of the current address pointer without
assigning the word address as a result, when it recognizes the position of the address pointer in the
E2PROM. This is called "Current Address Read".
In the following the address counter in the E2PROM is assumed to be “n”.
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “1”
following a start condition, it responds with an acknowledge. However, the page address (P0) in S-
24CS04A and the page address (P1 and P0) in S-24CS08A become invalid and the memory address of
the current address pointer becomes valid.
Next an 8-bit data at the address "n" is sent from the E2PROM synchronous to the SCL clock. The
address counter is incremented at the falling edge of the SCL clock for the 8th bit data, and the content of
the address counter becomes n+1.
The master device outputs stop condition not an acknowledge ,the reading of E2PROM is ended.
S
T
A
R
T
1 0 1 0
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE
A
2
A
1
A
0 D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
L
S
B
A
DR INC
1
DATA
NO ACK from
Master Device
Remark1. A1 is P1 in S-24CS08A.
2. A0 is P0 in S-24CS04A/08A.
Figure 16 Current Address Read
Attention should be paid to the following point on the recognition of the address pointer in the E2PROM.
In the read operation the memory address counter in the E2PROM is automatically incremented at every
falling edge of the SCL clock for the 8th bit of the output data. In the write operation, on the other hand,
the upper bits of the memory address (the upper bits of the word address and page address)*1 are left
unchanged and are not incremented at the falling edge of the SCL clock for the 8th bit of the received
data.
*1. S-24CS01A/02A is the upper 5 bits of the word address.
S-24CS04A is the upper 4 bits of the word address and the page address P0.
S-24CS08A is the upper 4 bits of the word address and the page address P1 and P0.
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 17
7. 2 Random Read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to "0"
following a start condition, it responds with an acknowledge. The E2PROM then receives an 8-bit word
address and responds with an acknowledge. The memory address is loaded to the address counter in the
E2PROM by these operations. Reception of write data does not follow in a dummy write whereas reception
of write data follows in a byte write and in a page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device
can read the data starting from the arbitrary memory address by transmitting a new start condition and
performing the same operation in the current address read.
That is, when the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to
"1", following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from
the E2PROM in synchronous to the SCL clock. The master device outputs stop condition not an
acknowledge , the reading of E2PROM is ended.
SDA
LINE
S
T
A
R
T
W
R
I
T
E
DEVICE
ADDRESS
WORD
ADDRESS (n)
M
S
B
DUMMY WRITE
S
T
A
R
T
R
E
A
D
DEVICE
ADDRESS
M
S
B
A
C
K
L
S
B
NO ACK from
Master Device
S
T
O
P
A
DR INC
DATA
A
C
K
A
C
K
L
S
B
R
/
W
R
/
W
Remark1. A1 is P1 in the S-24CS08A.
2. A0 is P0 in the S-24CS04A/08A.
3. W7 is o
p
tional in the S-24CS01A.
1 0 1 0 A2
A1
A0
0 W7 W6W5W4W3W2W1W0 1 0 1 0 A2 A1 A0 1 D7 D6 D5 D4 D3 D2 D1 D0
Figure 17 Random Read
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
18
7. 3 Sequential Read
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to "1"
following a start condition both in current and random read operations, it responds with an acknowledge.
An 8-bit data is then sent from the E2PROM synchronous to the SCL clock and the address counter is
automatically incremented at the falling edge of the SCL clock for the 8th bit data.
When the master device responds with an acknowledge, the data at the next memory address is
transmitted. Response with an acknowledge by the master device has the memory address counter in the
E2PROM incremented and makes it possible to read data in succession. This is called "Sequential Read".
The master device outputs stop condition not an acknowledge , the reading of E2PROM is ended.
Data can be read in succession in the sequential read mode. When the memory address counter reaches
the last word address, it rolls over to the first memory address.
R
E
A
D
S
T
O
P
DEVICE
A
DDRESS
R
/
W
A
DR INC
A
C
K
A
C
K
A
C
K
1
A
DR INC
A
C
K
A
DR INC
SDA
LINE
DATA(n)
D7 D0 D7 D0D7 D0 D7 D0
DATA (n+1) DATA (n+2) DATA (n+x)
NO ACK from
Master Device
A
DR INC
Figure 18 Sequential Read
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 19
8. Address Increment Timing
The timing for the automatic address increment is the falling edge of the SCL clock for the 8th bit of the
read data in read operation and the falling edge of the SCL clock for the 8th bit of the received data in write
operation.
SCL
SDA R / W=1
A
ddress Increment
891 89
D7 Output D0 Output
A
CK Output
Figure 19 Address Increment Timing in Reading
SCL
SDA R / W=0
891 89
D7 Input D0 Input
A
CK Output
A
CK Output
A
ddress Increment
Figure 20 Address Increment Timing in Writing
Write Inhibition Function at Low Power Voltage
The S-24CS01A/02A/04A/08A have a detection circuit for low power voltage. The detection circuit cancels
a write instruction when the power voltage is low or the power switch is on. The detection voltage is 1.75 V
typically and the release voltage is 2.05 V typically, the hysteresis of approximate 0.3 V thus exists. (See
Figure 21.)
When a low power voltage is detected, a write instruction is canceled at the reception of a stop condition.
When the power voltage lowers during a data transmission or a write operation, the data at the address of
the operation is not assured.
Power supply voltage
Write Instruction
cancel
Release voltage (+VDET)
2.05 V typ.
Detection voltage (-VDET)
1.75 V typ.
Hysteresis width
0.3 V approximately
Figure 21 Operation at low power voltage
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
20
Using S-24CS01A/02A/04A/08A
1. Adding a pull-up resistor to SDA I/O pin and SCL input pin
Add a 1 to 5 kΩ pull-up resistor to the SCL input pin*1 and the SDA I/O pin in order to enable the functions
of the I2C-bus protocol. Normal communication cannot be provided without a pull-up resistor.
*1. When the SCL input pin of the E2PROM is connected to a tri-state output pin of the microprocessor,
connect the same pull-up resistor to prevent a high impedance status from being input to the SCL
input pin.
This protects the E2PROM from malfunction due to an undefined output (high impedance) from the tri-
state pin when the microprocessor is reset when the voltage drops.
2. I/O pin equivalent circuit
The I/O pins of this IC do not include pull-up and pull-down resistors. The SDA pin is an open-drain output.
The following shows the equivalent circuits.
SCL
Figure 22 SCL Pin
SDA
Figure 23 SDA Pin
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 21
WP
Figure 24 WP Pin
A0, A1, A2
Figure 25 A0, A1, A2 Pin
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
22
3. Matching phases while E2PROM is accessed
The S-24CS01A/02A/04A/08A does not have a pin for resetting (the internal circuit), therefore, the
E2PROM cannot be forcibly reset externally. If a communication interruption occurs in the E2PROM, it
must be reset by software.
For example, even if a reset signal is input to the microprocessor, the internal circuit of the E2PROM is not
reset as long as the stop condition is not input to the E2PROM. In other words, the E2PROM retains the
same status and cannot shift to the next operation. This symptom applies to the case when only the
microprocessor is reset when the power supply voltage drops. With this status, if the power supply voltage
is restored, reset the E2PROM (after matching the phase with the microprocessor) and input an instruction.
The following shows this reset method.
[How to reset E2PROM]
The E2PROM can be reset by the start and stop instructions. When the E2PROM is reading data “0” or
is outputting the acknowledge signal, 0 is output to the SDA line. In this status, the microprocessor
cannot output an instruction to the SDA line. In this case, terminate the acknowledge output operation
or read operation, and then input a start instruction. Figure 26 shows this procedure.
First, input the start condition. Then transmit 9 clocks (dummy clocks) of SCL. During this time, the
microprocessor sets the SDA line to high level. By this operation, the E2PROM interrupts the
acknowledge output operation or data output, so input the start condition*1. When a start condition is
input, the E2PROM is reset. To make doubly sure, input the stop condition to the E2PROM. Normal
operation is then possible.
1 2 8 9
SCL
SDA
Start
condition
Stop
condition
Start
condition
Dummy clock
Figure 26 Resetting E2PROM
*1. After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition
being input, a write operation may be started upon receipt of a stop condition. To prevent this, input
a start condition after 9 clocks (dummy clocks).
Remark It is recommended to perform the above reset using dummy clocks when the system is
initialized after the power supply voltage has been raised.
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 23
4. Acknowledge check
The I2C-bus protocol includes an acknowledge check function as a handshake function to prevent a
communication error. This function allows detection of a communication failure during data communication
between the microprocessor and E2PROM. This function is effective to prevent malfunction, so it is
recommended to perform an acknowledge check on the microprocessor side.
5. Built-in power-on-clear circuit
E2PROMs have a built-in power-on-clear circuit that initializes the E2PROM. Unsuccessful initialization
may cause a malfunction. For the power-on-clear circuit to operate normally, the following conditions must
be satisfied for raising the power supply voltage.
5. 1 Raising power supply voltage
Raise the power supply voltage, starting at 0.2 V maximum, so that the voltage reaches the power supply
voltage to be used within the time defined by tRISE as shown in Figure 27.
For example, when the power supply voltage to be used is 5.0 V, tRISE is 200 ms as shown in Figure 28.
The power supply voltage must be raised within 200 ms.
0.2 V V
INIT
(Max.)
t
INIT
*2
(Max.)
t
RISE
(Max.)
Power supply voltage (V
CC
)
0 V
*1
*1. 0 V means there is no difference in potential between the V
CC
pin and the
GND pin of the E
2
PROM.
*2. t
INIT
is the time required to initialize the E
2
PROM. No instructions are
accepted during this time.
Figure 27 Raising Power Supply Voltage
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
24
Rise time (tRISE) Max.
[ms]
Power supply voltage
(VCC)
[V]
50
5.0
4.0
3.0
2.0
100 150 200
For example:
If your E2PROM supply voltage = 5.0 V, raise the power supply
voltage to 5.0 V within 200 ms.
Figure 28 Raising Time of Power Supply Voltage
When initialization is successfully completed via the power-on-clear circuit, the E2PROM enters the standby
status.
If the power-on-clear circuit does not operate, the following are the possible causes.
(1) Because the E2PROM has not been initialized, an instruction formerly input is valid or an instruction
may be inappropriately recognized. In this case, writing may be performed.
(2) The voltage may have dropped due to power off while the E2PROM is being accessed. Even if the
microprocessor is reset due to the low power voltage, the E2PROM may malfunction unless the power-
on-clear operation conditions of E2PROM are satisfied. For the power-on-clear operation conditions of
E2PROM, refer to 5. 1 Raising power supply voltage.
If the power-on-clear circuit does not operate, match the phase (reset) so that the internal E2PROM circuit is
normally reset. The statuses of the E2PROM immediately after the power-on-clear circuit operates and
when phase is matched (reset) are the same.
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 25
5. 2 Wait for the initialization sequence to end
The E2PROM executes initialization during the time that the supply voltage is increasing to its normal
value. All instructions must wait until after initialization. The relationship between the initialization time
(tINIT) and rise time (tRISE) is shown in Figure 29.
Rise time (tRISE)
[s]
E2PROM initialization
time (tINIT) Max.
[s]
100 m
10 m
1.0 m
100 µ
10 µ
1.0 µ
1.0
µ
10
µ
100
µ
1.0 m 10 m 100 m
Figure 29 Initialization Time of E2PROM
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
26
6. Data hold time (tHD.DAT = 0 ns)
If SCL and SDA of the E2PROM are changed at the same time, it is necessary to prevent the start/stop
condition from being mistakenly recognized due to the effect of noise. If a start/stop condition is mistakenly
recognized during communication, the E2PROM enters the standby status.
It is recommended that SDA is delayed from the falling edge of SCL by 0.3 µs minimum in the S-
24CS01A/02A/04A/08A. This is to prevent time lag caused by the load of the bus line from generating the
stop (or start) condition.
SCL
SDA
t
HD.DAT
= 0.3 µs Min.
Figure 30 E2PROM Data Hold Time
7. SDA pin and SCL pin noise suppression time
The S-24CS01A/02A/04A/08A includes a built-in low-pass filter to suppress noise at the SDA and SCL
pins. This means that if the power supply voltage is 5.0 V, noise with a pulse width of 160 ns or less can
be suppressed.
The guaranteed for details, refer to noise suppression time (tI) in Table 12.
Noise suppression time (tI) Max.
[ns]
200
100
300
2 3 4 5
Power supply voltage (VCC)
[V]
Figure 31 Noise Suppression Time for SDA and SCL Pins
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 27
8. Trap: E2PROM operation in case that the stop condition is received during write operation before
receiving the defined data value (less than 8-bit) to SCL pin
When the E2PROM receives the stop condition signal compulsorily, during receiving 1 byte of write data,
“write” operation is aborted.
When the E2PROM receives the stop condition signal after receiving 1 byte or more of data for “page
write”, 8-bit of data received normally before receiving the stop condition signal can be written.
9. Trap: E2PROM operation and write data in case that write data is input more than defined page size at
“page write”
When write data is input more than defined page size at page write operation, for example, S-24CS04A
(which can be executed 16-byte page write) is received data more than 17 byte, 8-bit data of the 17th byte
is over written to the first byte in the same page. Data over the capacity of page address cannot be written.
10. Trap: Severe environments
Absolute maximum ratings: Do not operate these ICs in excess of the absolute maximum ratings (as listed
on the data sheet). Exceeding the supply voltage rating can cause latch-up.
Operations with moisture on the E2PROM pins may occur malfunction by short-circuit between pins.
Especially, in occasions like picking the E2PROM up from low temperature tank during the evaluation. Be
sure that not remain frost on E2PROM pin to prevent malfunction by short-circuit.
Also attention should be paid in using on environment, which is easy to dew for the same reason.
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
28
Precautions
● Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
● SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of
the products including this IC upon patents owned by a third party.
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 29
Characteristics (Typical Data)
1. DC Characteristics
1. 1 Current consumption (READ) ICC1 1. 2 Current consumption (READ) ICC1
Ambient temperature (Ta) Ambient temperature (Ta)
VCC=5.5 V
fSCL=100 kHz
DATA=0101
-40 0 85
300
100
200
0
ICC1
(µA)
Ta (°C)
Ta (°C)
VCC=3.3 V
fSCL=100 kHz
DATA=0101
-40 0 85
300
100
200
0
ICC1
(µA)
1. 3 Current consumption (READ) ICC1 1. 4 Current consumption (READ) ICC1
Ambient temperature (Ta) Power supply voltage VCC
VCC= 1.8 V
fSCL=100 kHz
DATA=0101
300
100
200
0
ICC1
(µA)
Ta
(
°C
)
-40 0 85
Ta=25°C
2 3 4 5 6 7
VCC (V)
300
100
200
0
ICC1
(µA)
fCSL=100 kHz
DATA=0101
1. 5 Current consumption (READ) ICC1 1. 6 Current consumption (READ) ICC1
Power supply voltage VCC Clock frequency fSCL
Ta=25°C
2 3 4 5 6 7
VCC (V)
300
100
200
0
ICC1
(µA)
fSCL=400 kHz
DATA=0101
VCC=5.0 V
Ta=25 °C
100 k
fSCL (Hz)
400 k 1 M
300
200
100
ICC1
(µA)
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
30
1. 7 Current consumption (PROGRAM) ICC2 1. 8 Current consumption (PROGRAM) ICC2
Ambient temperature (Ta) Ambient temperature (Ta)
VCC=5.5 V
Ta (°C)
-40 0 85
1.0
0.5
0
ICC2
(mA)
VCC=3.3 V
Ta (°C)
-40 0 85
1.0
0.5
0
ICC2
(mA)
1. 9 Current consumption (PROGRAM) ICC2 1. 10 Current consumption (PROGRAM) ICC2
Ambient temperature (Ta) Power supply voltage VCC
VCC=2.5 V
1.0
0.5
0
ICC2
(mA)
Ta (°C)
-40 0 85
Ta=25°C
VCC (V)
1.0
0.5
0
ICC2
(mA)
2
1 3 4 5 6
1. 11 Standby current consumption ISB 1. 12 Input leakage current ILI
Ambient temperature (Ta) Ambient temperature (Ta)
2.0
1.0
VCC=5.5 V
0
ISB
(µA)
Ta
(
°C
)
-40 0 85
1.0
0.5
VCC=5.5 V
A0, A1, A2
0
ILI
(µA)
Ta (°C)
-40 0 85
SDA, SCL, WP=0 V
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 31
1. 13 Input leakage current ILI 1. 14 Output leakage current ILO
Ambient temperature (Ta) Ambient temperature (Ta)
1.0
0.5
VCC=5.5 V
0
ILI
(µA)
Ta
(
°C
)
-40 0 85
A0, A1, A2
SDA, SCL, P=5.5 V
1.0
0.5
VCC=5.5 V
SDA=0 V
0
ILO
(µA)
Ta (°C)
-40 085
1. 15 Output leakage current ILO 1. 16 Low level output voltage VOL
Ambient temperature (Ta) Low level output current IOL
1.0
0.5
VCC=5.5 V
SDA=5.5 V
0
ILO
(µA)
Ta (°C)
-40 0 85
0.6
0.4
VOL
(V)
0.2
0 2 1 3 4 5 6
Ta=-40°C
IOL (mA)
VCC=1.8 V
VCC=5.0 V
1. 17 Low level output voltage VOL 1. 18 Low level output voltage VOL
Low level output current IOL Low level output current IOL
0.6
0.4
VOL
(V)
0.2
0 2 1 3 4 5 6
Ta=25°C
IOL (mA)
VCC=1.8 V
VCC=5.0 V
0.6
0.4
VOL
(V)
0.2
0 2 1 3 4 5 6
Ta=85°C
IOL (mA)
VCC=1.8 V
VCC=5.0 V
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
32
1. 19 High input inversion voltage VIH 1. 20 High input inversion voltage VIH
Power supply voltage VCC Ambient temperature (Ta)
Ta=25°C
A
0, A1, A2,
1.0
0
2.0
3.0
VIH
(V)
VCC (V)
7 6 2 3 4 5 1
SDA, SCL, WP
VCC=5.0 V
A0, A1, A2
1.0
0
2.0
3.0
VIH
(V)
Ta (°C)
-40 0 85
SDA, SCL, WP
1. 21 Low input inversion voltage VIL 1. 22 Low input inversion voltage VIL
Power supply voltage VCC Ambient temperature (Ta)
Ta=25°C
A0, A1, A2,
1.0
0
2.0
3.0
VIL
(V)
VCC (V)
7 6 2 3 4 5 1
SDA, SCL, WP
VCC=5.0 V
A0, A1, A2,
1.0
0
2.0
3.0
VIL
(V)
Ta (°C)
-40 0 85
SDA, SCL, WP
1. 23 Low power supply detection voltage
−
V
DET
1. 24 Low power supply release voltage
+
V
DET
Ambient temperature (Ta)
Ambient temperature (Ta)
1.0
0
2.0
-VDET
(V)
Ta (°C)
-40 0 85
1.0
0
2.0
+VDET
(V)
Ta (°C)
-40 0 85
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 33
2. AC Characteristics
2. 1 Maximum operating frequency fMAX. 2. 2 Write time tWR Power supply voltage VCC
Power supply voltage VCC
10 k
2 3 4 5
Ta=25°C
VCC (V)
fMAX.
(Hz)
1
100 k
1 M
VCC (V)
8
4
Ta=25°C
tWR
(ms)
2
6
0 6 2 3 4 5 1
2. 3 Write time tWR Ambient temperature (Ta) 2. 4 Write time tWR Ambient temperature (Ta)
VCC=4.5 V
tWR
(ms)
9
6
3
0
Ta (°C)
-40 0 85
VCC=2.7 V
tWR
(ms)
9
6
3
0
Ta (°C)
-40 0 85
2. 5 SDA output delay time tAA 2. 6 SDA output delay time tAA
Ambient temperature (Ta) Ambient temperature (Ta)
Ta (°C)
-40 0 85
VCC=4.5 V
1.0
0.5
tAA
(µs)
0
Ta (°C)
-40 0 85
VCC=2.7 V
1.0
0.5
tAA
(µs)
0
2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A Rev.4.5_00
Seiko Instruments Inc.
34
2. 7 SDA output delay time tAA
Ambient temperature (Ta)
Ta
(
°C
)
-40 0 85
VCC=1.8 V
1.0
0.5
tAA
(µs)
0
2-WIRE CMOS SERIAL E2PROM
Rev.4.5_00 S-24CS01A/02A/04A/08A
Seiko Instruments Inc. 35
Product Name Structure
1. S-24CS01A/02A/04A
Operation temperature
none : −40 to +85°C
H : −40 to +105°C (Only 8-Pin SOP(JEDEC), 8-Pin TSSOP)
IC direction in tape specification (Except 8-Pin DIP)
TB : 8-Pin SOP(JEDEC), 8-Pin TSSOP
TF : SNT-8A
Package code (abbreviation)
DP : 8-Pin DIP
FJ : 8-Pin SOP(JEDEC)
FT : 8-Pin TSSOP
PH : SNT-8A
Product name
S-24CS01A : 1 Kbit
S-24CS02A : 2 Kbit
S-24CS04A : 4 Kbit
S-24CS0xA xx - xx x - G
2. S-24CS08A
Fixed
Operation temperature
none : −40 to +85°C
H : −40 to +105°C (Only 8-Pin SOP(JEDEC), 8-Pin TSSOP)
IC direction in tape specification (Except 8-Pin DIP)
Package code (abbreviation)
DP : 8-Pin DIP
FJ : 8-Pin SOP(JEDEC)
FT : 8-Pin TSSOP
Product name
S-24CS08A : 8 Kbit
S-24CS08A xx - TB x - 1 G
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
DIP8-F-PKG Dimensions
No. DP008-F-P-SD-3.0
DP008-F-P-SD-3.0
0.48±0.1
2.54
0.89 1.3
0° to 15°
0.25+0.11
-0.05
7.62
9.6(10.6max.)
14
5
8
No. FJ008-A-P-SD-2.1
No.
TITLE
SCALE
UNIT mm
SOP8J-D-PKG Dimensions
Seiko Instruments Inc.
FJ008-A-P-SD-2.1
0.4±0.05
1.27
0.20±0.05
5.02±0.2
14
85
No.
TITLE
SCALE
UNIT mm
5
8
1
4
ø2.0±0.05
ø1.55±0.05 0.3±0.05
2.1±0.1
8.0±0.1
5°max.
6.7±0.1
2.0±0.05
Seiko Instruments Inc.
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
SOP8J-D-Carrier Tape
No. FJ008-D-C-SD-1.1
FJ008-D-C-SD-1.1
No.
TITLE
SCALE
UNIT mm
QTY. 2,000
2±0.5
13.5±0.5
60°
2±0.5
ø13±0.2
ø21±0.8
Seiko Instruments Inc.
Enlarged drawing in the central part
SOP8J-D-Reel
No. FJ008-D-R-SD-1.1
FJ008-D-R-SD-1.1
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
TSSOP8-E-PKG Dimensions
No. FT008-A-P-SD-1.1
FT008-A-P-SD-1.1
0.17±0.05
3.00 +0.3
-0.2
0.65
0.2±0.1
14
5
8
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
ø1.55±0.05
2.0±0.05
8.0±0.1 ø1.55 +0.1
-0.05
(4.4)
0.3±0.05
1
45
8
4.0±0.1
Feed direction
TSSOP8-E-Carrier Tape
No. FT008-E-C-SD-1.0
FT008-E-C-SD-1.0
+0.4
-0.2
6.6
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
Enlarged drawing in the central part
No. FT008-E-R-SD-1.0
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
3,000
QTY.
TSSOP8-E-Reel
FT008-E-R-SD-1.0
1.97±0.03
0.2±0.05
0.48±0.02
0.08
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No. PH008-A-P-SD-2.0
0.5
+0.05
-0.02
123 4
56
78
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
PH008-A-C-SD-1.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-1.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
5°
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
No.
TITLE
SCALE
UNIT mm
SNT-8A-A-Land Recommendation
Seiko Instruments Inc.
PH008-A-L-SD-3.0
0.3
0.20.3
0.20.3
0.52
2.01
0.52
No. PH008-A-L-SD-3.0
0.3 0.2
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
•
The information described herein is subject to change without notice.
• Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
• When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
• Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
• The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
• Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.