TECHNICAL DATA
264
Quad D Flip-Flop with
Common Clock and Reset
High-Speed Silicon-Gate CMOS
The IN74AC175 is identical in pinout to the LS/ALS175,
HC/HCT175. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS
outputs.
This device consists of four D flip-flops with common Reset and
Clock inputs, and separate D inputs. Reset (active-low) is
asynchronous and occurs when a low level is applied to the Reset
input. Information at a D input is transferred to the corresponding Q
output on the next positive-going edge of the Clock input.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 2 5°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/ Si nk 24 mA
IN74AC175
ORDERING INFORMATION
IN74AC175N Plastic
IN74AC175D SOIC
TA = -40° to 85° C for al l
packages
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Outputs
Reset Clock D Q Q
LXXLH
HHHL
HLLH
H L X no change
X = Don’t care
LOGIC DIAGRAM
PIN 16=VCC
PIN 8 = GND
IN74AC175
265
MAXIMUM RATINGS*
Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IIN DC Input Current, per Pin ±20 mA
IOUT DC Outp ut Si nk/Sourc e Curre nt , per Pin ±50 mA
ICC DC Supply Current, VCC and GND Pins ±50 mA
PDPower Dissipation in Still Air, Plastic DIP+
SOIC Package+ 750
500 mW
Tstg Storage Temperature -65 to +150 °C
TLLead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package) 260 °C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V
VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V
TJJunct ion Temperature (PDIP) 140 °C
TAOperating Temperature, All Package Types -40 +85 °C
IOH Outp ut Current - High -24 mA
IOL Outp ut Current - Low 24 mA
tr, tfInput Rise and Fall Time *
(except Schmitt Inputs) VCC =3.0 V
VCC =4.5 V
VCC =5.5 V
0
0
0
150
40
25
ns/V
* VIN from 30% to 70% VCC
Thi s device contains p rote ction c ircuitr y to guard a gainst damage due to hi gh static voltage s or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
IN74AC175
266
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
VCC Guaranteed Limits
Symbol Parameter Test Conditions V 25 °C-40
°C to
85°CUnit
VIH Minimum High-Level
Input Voltage VOUT=0.1 V or VCC-0.1 V 3.0
4.5
5.5
2.1
3.15
3.85
2.1
3.15
3.85
V
VIL Maximum Low -
Level Input Voltage VOUT=0.1 V or VCC-0.1 V 3.0
4.5
5.5
0.9
1.35
1.65
0.9
1.35
1.65
V
VOH Minimum High-Level
Output Voltage IOUT ≤ -50 µA3.0
4.5
5.5
2.9
4.4
5.4
2.9
4.4
5.4
V
*VIN=VIH or VIL
IOH=-12 mA
IOH=-24 mA
IOH=-24 mA
3.0
4.5
5.5
2.56
3.86
4.86
2.46
3.76
4.76
VOL Maximum Low- Level
Output Voltage IOUT ≤ 50 µA3.0
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
V
*VIN=VIH or VIL
IOL=12 mA
IOL=24 mA
IOL=24 mA
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
IIN Max imum Inp ut
Leakage Current VIN=VCC or GND 5.5 ±0.1 ±1.0 µA
IOLD +Minimum Dynamic
Output Current VOLD=1.65 V Max 5.5 75 mA
IOHD +Minimum Dynamic
Output Current VOHD=3.85 V Min 5.5 -75 mA
ICC Max imum Qu iescent
Supply Current
(per Package)
VIN=VCC or GND 5.5 8.0 80 µA
* All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or eq ual to the respective limit @ 5.5 V VCC
IN74AC175
267
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=3.0 ns)
VCC*Guaranteed Limits
Symbol Parameter V 25 °C-40
°C to
85°CUnit
Min Max Min Max
fmax Maximum Clock Frequency (Figure 1) 3.3
5.0 149
187 139
187 MHz
tPLH Propagation Delay, Clock to Q or Q
(Figure 1) 3.3
5.0 2.0
1.5 12.0
9.0 2.0
1.0 13.5
9.5 ns
tPHL Propa gation Delay, Clock to Q or Q
(Figure 1) 3.3
5.0 2.5
1.5 13.0
9.5 2.0
1.5 14.5
10.5 ns
tPLH Propagation Delay, Reset to Q (Figure 2) 3.3
5.0 3.0
2.0 12.5
9.0 2.5
1.5 13.5
10.0 ns
tPHL Propa gation Delay, Reset to Q (Figure 2) 3.3
5.0 3.0
2.0 11.0
8.5 2.5
1.5 12.5
9.0 ns
CIN Maximum Input Capacitance 5.0 4.5 4.5 pF
Typical @25°C,VCC=5.0 V
CPD Power Dissipation Capacitance 45 pF
*Voltage Range 3.3 V is 3.3 V ±0.3 V
Voltage Range 5.0 V is 5.0 V ±0.5 V
TIMING REQUIREMENTS(CL=50pF,Input tr=tf=3.0 ns)
VCC*Guaranteed Limits
Symbol Parameter V 25 °C-40
°C to
85°CUnit
tsu Minimum Setup Time, Data to Clock
(Figure 3) 3.3
5.0 4.5
3.0 4.5
3.0 ns
thMinimum Hold Time, Clock to Data
(Figure 3) 3.3
5.0 1.0
1.0 1.0
1.0 ns
twMinimum Pulse Width, Reset (Figure 2) 3.3
5.0 4.5
3.5 4.5
3.5 ns
twMinimum Pulse Widt h, Clock (Figur e 1) 3.3
5.0 4.5
3.5 5.0
3.5 ns
trec Minimum Recovery Time, Reset to Cloc k
(Figure 2) 3.3
5.0 0
00
0ns
*Voltage Range 3.3 V is 3.3 V ±0.3 V
Voltage Range 5.0 V is 5.0 V ±0.5 V
IN74AC175
268
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
EXPANDED LOGIC DIAGRAM
