Advance Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. M02061 3.3 or 5 Volt Laser Driver IC for Applications to 3.3 Gbps The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF module with data rates up to 3.3 Gbps. Using differential PECL data and clock inputs, the M02061 supplies the bias and modulation current required to drive an edge-emitting laser. The modulation output can be DC-coupled to the laser diode. The M02061 includes automatic power control to maintain a constant average laser output power over temperature and life. In addition, the modulation current can be temperature compensated to minimize variation in extinction ratio over temperature. Features * * * * * * * High speed operation; suitable for SFP/SFF applications from 155Mbps to 3.3 Gbps. Typical rise/fall times of 50 ps. * Programmable temperature compensation. Modulation output and bias output can be controlled using the programmable module controller M02080 or a few discrete resistors. * Supports DDMI (SFF-8472) diagnostics. * DC or AC coupled modulation drive. Up to 100mA modulation current available when AC coupled. * Low overshoot allows high extinction ratio with low jitter. * Automatic Laser Power Control, with "Slow-Start". * Differential data and clock inputs to minimize pattern dependent jitter, PECL and CML compatible. * Packaged in a QFN24 or QFN32 * 3.3V or 5V operation * Pulsewidth adjustment EPON FTTH modules Gigabit Ethernet modules 1G/2G Fibre Channel modules Short reach SONET/SDH Metro SONET/SDH Digital video cable driver Internal 3.3V reg. V CC SHDWN PWA CEN V V CC CC3 OUT Functional Block Diagram Internal Power Bus SVCC OUT- DIN+ Input Buffer Output Buffer D - FF Laser Driver OUT+ D IN- GND0 VCC3 -1.3V IBIASOUT VTT CLK+ IPIN Input Buffer CLK- Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential APC C DISDLY MON TxPwr BIASMON SET APC MON MOD SET SLOPE Automatic Power Control (laser bias current) MOD START TC TC SEL Modulation Control VCC3 SCB FAIL DIS ENA 02061-DSH-001-A RESET Safety Circuitry with Latched Fault TX Disable October 2003 Advance Information Applications M02061 Data Sheet Ordering Information Example Part Number Package Operating Temperature M02061-11 QFN24 -40 C to 85 C M02061-31 QFN321 -40 C to 85 C M02061-EVM Combination Optical and Electrical Evaluation board -40 C to 85 C 1. Contact your Mindspeed sales representative regarding availability of the QFN32 version. Revision History Advance Information ii Revision Level Date ASIC Revision A Advance October 2003 x Description Advance Information Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Table of Contents Ordering Information Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii 1.0 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 1.5 1.6 1.7 2.0 Product Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.1 2.2 2.3 2.4 2.5 2.6 2.7 3.0 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.3.1 Internal Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.3.2 Bias Current Generator and Automatic Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.3.3 Data and Clock Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.3.4 Pulse Width Adjust. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.3.5 Modulation Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.3.6 Modulator Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 1.3.7 Fail Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 1.3.8 TX Disable and Disable Delay Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 1.3.9 Current Monitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Laser Eye Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 1.4.1 Safety Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Fault Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 AC Characteristics - Logic Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Safety Logic Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Package Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Pinout Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Appendices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.1 Glossary of Terms/Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 02061-DSH-001-A Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential iii Advance Information 1.1 1.2 1.3 M02061 Data Sheet Advance Information iv Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A List of Figures 02061-DSH-001-A M02061 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Modulator Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 DIS and DISDLY Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Safety Circuit Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Application Diagram, VCC = 3.3V Laser AC Coupled Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Application Diagram, VCC = 5V Laser DC Coupled Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Relationship between Data and Clock Inputs and Modulation Outputs . . . . . . . . . . . . . . . . . . . . . . . . .31 Safety Logic Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 QFN24 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 QFN32 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 QFN 24 Pinout Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 QFN32 Pinout Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential v Advance Information Figure 1-1. Figure 1-4. Figure 1-5. Figure 1-6. Figure 1-8. Figure 1-9. Figure 2-6. Figure 2-7. Figure 2-8. Figure 2-9. Figure 2-10. Figure 2-11. M02061 Data Sheet Advance Information vi Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A List of Tables 02061-DSH-001-A Pin Connection for 3.3V and 5V VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Modulation Current Maximums . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Circuit Response to Single-point Fault Conditions 1 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 M02061 Pin Definitions and Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Safety Logic Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Glossary and Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential vii Advance Information Table 1-2. Table 1-3. Table 1-7. Table 1-10. Table 2-1. Table 2-2. Table 2-3. Table 2-4. Table 2-5. Table 3-1. M02061 Data Sheet Advance Information viii Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A 1.0 Functional Description 1.1 Overview The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF module with data rates up to 3.3 Gbps. Using differential PECL data and clock inputs, the M02061 supplies the bias and modulation current required to drive an edge-emitting laser. Monitor outputs and internal safety logic in the M02061 will support designs requiring DDMI compliance. Many features are user-adjustable, including the APC (automatic power control) loop bias control (via a monitor photodiode), modulation current, temperature compensation control of modulation current, and pulse-width adjustment. The part may be operated from a 3.3V or 5V supply. The driver modulation output can be AC, DC, or Differentially coupled to the laser. For E-PON and other burst-mode applications, the part supports fast and accurate turn-on and turn-off of the laser bias and modulation currents. Safety circuitry is also included to provide a latched shut-down of laser bias and modulation current if a fault condition occurs. An internal VCC switch provides redundant shutdown when operating the device from a 3.3V supply. Control is provided to allow for a redundant external switch when operating with a 5V supply, if desired. To minimize pattern-dependent jitter of the input signal, the device accepts an input clock signal for data retiming. Figure 1-1 details the functional blocks and pin signals for the M02061 device. 02061-DSH-001-A Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 1 Advance Information The M02061 includes automatic power control to maintain a constant average laser output power over temperature and life. In addition, the modulation current can be temperature compensated to minimize variation in extinction ratio over temperature. M02061 Data Sheet M02061 Block Diagram Internal 3.3V reg. V CC SHDWN PWA CEN V V CC CC3 OUT Figure 1-1. Internal Power Bus SVCC OUT- DIN+ Input Buffer Output Buffer D - FF Laser Driver OUT+ D IN- GND0 VCC3 -1.3V IBIASOUT Advance Information VTT CLK+ IPIN Input Buffer CLK- APC C DISDLY MON TxPwr BIASMON SET APC MON MOD SET Automatic Power Control (laser bias current) MOD SLOPE TC START TC SEL Modulation Control VCC3 SCB FAIL DIS ENA 1.2 RESET Safety Circuitry with Latched Fault TX Disable Features * High speed operation; suitable for SFP/SFF applications from 155Mbps to 3.3 Gbps. Typical rise/fall times of 50 ps. * Programmable temperature compensation. Modulation output and bias output can be controlled using the programmable module controller M02080 or a few discrete resistors. * Supports DDMI (SFF-8472) diagnostics. * DC or AC coupled modulation drive. Up to 100mA modulation current available when AC coupled. * Low overshoot allows high extinction ratio with low jitter. * Automatic Laser Power Control, with "Slow-Start". * Differential data and clock inputs to minimize pattern dependent jitter, PECL and CML compatible. * Packaged in a QFN24 or QFN32 * 3.3V or 5V operation 2 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description 1.3 General Description The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF module with data rates up to 3.3 Gbps. Using differential PECL data and clock inputs, the M02061 supplies the bias and modulation current required to drive an edge-emitting laser. Monitor outputs and internal safety logic support the DDMI requirements. The M02061 laser driver consists of the following circuitry: an internal regulator, bias current generator and automatic power control, data and clock inputs, buffer with pulse width adjust, modulation current control, modulator output, laser fail indication, disable control, and monitor outputs for the bias current, modulation current, and transmitted power. 1.3.1 Internal Regulator The M02061 contains an internal 3.3V regulator so high bit rate performance can be achieved with 5V or 3.3V power supply. For 3.3V applications, SVCC is sourced from VCC3 through a switch (leave SVCC open for 5V applications). SVCC is to be used to power the anode of the laser diode, the cathode of the photodiode, and any resistive or ferrite pullups on the OUT+ and OUT- outputs. When a fault condition is present, FAIL will assert and the switch sourcing SVCC will open so no current can pass through the laser. SVCC does not need any external capacitance, if capacitance to ground is added at SVCC it should be <100pF. VCC and VCC3 status are internally monitored by the M02061 during power-up and normal operation. During power-up the "slow-start" circuitry requires that VCC and VCC3 each reach an acceptable level before enabling bias or modulation current. Table 1-2. Pin Connection for 3.3V and 5V VCC Pin Connection For: Pins Dependent on VCC Voltage VCC = 3.3V 02061-DSH-001-A VCC = 5V VCC3 Connect to VCC Reference for CAPC and PWA SVCC Laser Anode OPEN OPEN External safety control switch SHDWNOUT CAPC Capacitor between CAPC and VCC3 or VCC Capacitor between CAPC and VCC3 (not VCC) PWA Connect to VCC3 or VCC to disable Connect to VCC3 to disable (not VCC) Connect to VCC3 or VCC Connect to GND VCC3SEL Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 3 Advance Information When operating from a 5V supply (VCC is connected to +5V), an internal regulator provides a voltage of approximately 3.3V to the majority of the on-chip circuitry. The on-chip regulator is internally compensated, requiring no external components. When a 3.3V supply is used (VCC and VCC3 connected to 3.3V) the regulator is switched off and the internal circuitry is powered directly through the VCC3 supply pin. The decision as to whether or not the internal regulator is required is made via the VCC3SEL pin, which also determines whether the safety circuitry needs to monitor for proper +5V supply voltage. M02061 Data Sheet 1.3.2 Bias Current Generator and Automatic Power Control To maintain constant average optical power, the M02061 incorporates a control loop to compensate for the changes in laser threshold current over temperature and lifetime. The bias current will be determined by the value of the external resistor RAPCSET and the transfer efficiency between the laser and monitor photodiode. The photo current from the monitor photodiode mounted in the laser package is sunk at IPIN. This photo current is mirrored and an equivalent current is sourced from pins TxPwrMON and APCSET. The APC loop adjusts the laser bias current (hence the monitor diode photo current) to maintain a voltage at APCSET of 1 bandgap voltage or ~1.3V. RAPCSET * IPIN = 1.3 V The APC loop has a time constant determined by CAPC, RAPCSET and the transfer efficiency between the laser and monitor photodiode. The larger the CAPC capacitor the lower the bandwidth of the loop and the larger RAPCSET the lower the loop BW. Advance Information In general, it is recommended that at least 2.2 nF of external capacitance be added externally between CAPC and VCC3. With use of a 2.2 nF capacitor, the bias current can reach 90% of its final value within 1ms, i.e., bias current risetime is less than 1ms and the APC loop bandwidth is less than 30 kHz, which should be adequate for bit rates of 155Mbps. (and all higher bit rates). The bias generator also includes a bias current monitor mirror (BIASMON), whose output current is typically 1/100th of the bias current. This pin can be connected directly to an M02080 module controller or through a resistor to ground. If this function is not needed this pin can be left open. 1.3.3 Data and Clock Inputs The inputs to the clock and data buffers are self-biased through 4 k resistors to VTT. Both CML and PECL inputs signals can be AC coupled to the M02061 by allowing VTT to float, which sets the common mode input voltage to roughly VCC3 - 1.3V. In most applications the data and clock inputs are AC coupled with controlled impedance pcb traces which will need to be terminated externally with a 100 or 150 resistor between the + and inputs. Retiming of the signal is only available on the 32 pin package. If retiming is not selected (CEN low), the clock buffer is powered down, resulting in further reduction of power dissipation. The clock inputs should be left disconnected in this case. An input buffer with a D flip-flop allows the clock signal to re-time the data when the CEN input is tied high (VCC). Data is re-timed on the rising edge of the clock signal. The relationship between CLK, DIN and VOUT pins is shown in Figure 2. 1.3.4 Pulse Width Adjust After the data passes through the re-clocking D flip-flops, it enters the output buffer. The output buffer incorporates pulse-width adjustment control to compensate for laser pulse width distortion. A potentiometer can be connected between the PWA input and GND for adjustment (programming resistance should be between 1k and 20k). By adjusting the potentiometer, the pulse-width can be adjusted over a range of approximately 40 ps. Pulse width control can be disabled by connecting PWA to VCC3, resulting in roughly a 50% crossing point at the output and reducing supply current by approximately 1.5mA. 4 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description 1.3.5 Modulation Control There are 3 programmable control lines for controlling the modulation current and its temperature compensation. These inputs can be programmed simply with a resistor to ground or they can be digitally controlled by the Mindspeed module controller M02080. The modulation current amplitude is controlled by the MODSET input pin. The modulation current is temperature compensated by the TCSTART and TCSLOPE inputs. The temperature compensation coefficients of TCSTART and TCSLOPE are independent of the setting at MODSET. The following information assumes that the 24 pin package is being used. In the 24 pin package, the TCSTART pin is not available and temperature compensation will only be active at case temperatures above 10C. If the temperature compensation at TCSLOPE is disabled, the modulation output current is simply: IOUT = 100 x (1.3V / RMODSET) Advance Information Where RMODSET is the resistance from pin MODSET to ground. To temperature compensate the modulation current, choose RTCSLOPE to meet the following relationship: RTCSLOPE = 19.5*(TC)-1.5, where TC is the desired slope of the modulation current from 25C to 85C in%/C and RTCSLOPE is in k. If no temperature compensation is desired, leave RTCSLOPE open. In any case, RTCSLOPE will have negligible effect at M02069 case temperatures below 10C. For example: Given a laser with a desired modulation current at low temperatures of 30mA and a temperature coefficient of 0.5%/C at high temperatures (which will require a laser driver temperature coefficient of +0.5%). Choose RMODSET = 100 x (1.3V / 30mA) = 4.3k Choose RTCSLOPE =19.5*(0.5)-1.5 k = 56k. 02061-DSH-001-A Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 5 M02061 Data Sheet 1.3.6 Modulator Output The output stage is designed to drive a 25 output load over a wide range of currents and circuit architectures. The laser may be AC, DC, or Differentially coupled depending on the supply voltage. Table 1-3. Modulation Current Maximums Max Modulation Current Max Bias Current VCC=5V, Laser DC coupled 75 60 VCC=5V, Laser AC coupled 75(1) 60 VCC=3.3V, Laser DC coupled 100(2) 100 VCC=3.3V, Laser AC coupled 100 100 When differentially coupling, the maximum modulation and bias current is determined by either the AC or DC coupling of the OUT+ or OUT- output, whichever has the minimum rating. Advance Information 1. When AC coupling the output should never be allowed to swing above the absolute voltage rating of the part, which is 6V. 2. When VCC=3.3V, the OUT+ and OUT- should not be driven below 1.6V. In most 3.3V applications, this will make DC coupling impractical. When DC coupled, OUT+ should be connected through a series resistor to the laser such that the total impedance seen at the output is 25 ohms. This will result in the optimum pulse response while allowing the maximum modulation current. The output can also be AC coupled to the laser. This is the required operating mode when using a 3.3V supply (unless the laser has a small forward voltage and OUT+ will not go below 1.6V). When AC coupled the dynamic resistance seen by OUT+ should still be 25 ohms. In addition to a resistor in series with the laser, a capacitor is added in series and a ferrite is used to pull up the collector at OUT+ to SVCC. When the laser is AC coupled, the OUT- pin is usually tied to SVCC through a series resistor which matches the impedance seen by the OUT+ pad. The output stage also has a separate current path to GND labelled GND0. This isolates the output switching currents from the rest of the system. At higher data rates (above 2Gb/s) GND0 may be connected to ground through a minimum of 2 nH of inductance to further improve isolation. A ferrite can also provide the extra isolation (Murata BLM18HG471SN1 or equivalent recommended). 6 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description Figure 1-4. Modulator Output 0.4pF 0.75 nH * 0.75 nH * OUT- OUT+ For VCC =5V, OUT+ and OUTshould not be driven below 1.15V GND A (optional external inductance) 1.3.7 * Denotes bond wire internal to MLF package Fail Output The M02061 has a FAIL alarm output which is compatible with the TX_FAULT signalling requirements of common pluggable module standards. The ESD protection on this pin provides a true open collector output that can withstand significant variation in VCC when signalling between circuit boards. Also, if the M02061 loses power the pull-up will signal a fail condition. In a simple static protection scheme used by other ICs the protection diodes would clamp the FAIL signal to ground when the chip loses power. 1.3.8 TX Disable and Disable Delay Control The DIS pin is used to disable the transmit signal (both the modulation and bias current are disabled when DIS = high). The DIS input is compatible with TTL levels regardless of whether VCC = 5V or VCC = 3.3V. The external 4.7k and 10k pull-up resistor required by most interface standards is not needed because this pin has an internal 7k resistor to VCC. 02061-DSH-001-A Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 7 Advance Information For VCC = 3.3V, OUT+ and OUTshould not be driven below 1.6V. M02061 Data Sheet The DISDLY pin is used in conjunction with the DIS pin to control bias current enable time. In normal operation the DISDLY pin should be connected to ground. In this case, each time DIS transitions from high to low the bias current will be enabled by the "slow-start" circuitry (enable time of less than 1 ms with a CAPC = 2.2nF). For burst mode operation a capacitor C is added to the DISDLY pin, the slow-start circuitry is disabled for approximately T = 3 * 106 (sec/F) * C (F) following the DIS high transition (see figure 8). If the part is enabled (DIS transitions low) during this time the bias and modulation current will quickly return to within 90% of their final value (in less than 500ns). If DIS transitions low after the DISDLY time the slow-start circuitry will engage and the bias current will not return to its final value for approximately 1ms (depending on the CAPC capacitor value). Figure 1-5. DIS and DISDLY Timing EPON Burst Mode Operation DIS Advance Information DISDLY IBIASOUT OUT+ t_off BM < 500ns t_on BM < 500ns for IMOD > 10mA Normal Operation, (slow-start whenever part enabled) DIS DISDLY t_on< 1ms, depending on CAPC IBIASOUT OUT+ t_off< 10s 8 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description 1.3.9 Current Monitors To facilitate complying with laser safety and DDMI1 requirements, output monitors are provided for transmit power (TxPwrMON) bias (BIASMON) and modulation current (MODMON). These outputs will source current proportional to the emitted optical power (TxPwrMON) the bias current (BIASMON) and modulation current (MODMON). These outputs may be connected directly to the corresponding pins on the M02080 module controller. If an M02080 is not used these pins should be terminated with a resistor to ground that sets the desired full-scale voltage (not to exceed VCC3-1V). Using a monitor polarity selection (MONPOL) these monitors can be set to sink current instead of source current. They will then need to be terminated with a resistor to VCC3 and the induced voltage should not exceed 2.5V. If the outputs of these monitors are not needed, MONPOL, TxPwrMON, BIASMON, and MODMON can all be left floating and the chip current consumption will be reduced by the value of the monitor currents. Laser Eye Safety Using this laser driver in the manner described herein does not ensure that the resulting laser transmitter complies with established standards such as IEC 825. Users must take the necessary precautions to ensure that eye safety and other applicable standards are met. Note that determining and implementing the level of fault tolerance required by the applications that this part is going into is the responsibility of the transmitter designer and manufacturer since the application of this device cannot be controlled by Mindspeed. 1.4.1 Safety Circuitry Safety Circuitry in the M02061 will disable the modulation and bias current and assert the FAIL output immediately upon detecting a fault condition. In addition, the supply voltage that sources the laser (SVCC or an external switch controlled by SHDWNOUT) will immediately go open circuit and prevent any current from passing through the laser. Fault conditions checked by the M02061 include shorts to ground or VCC of all pins which can increase the laser modulation or bias current. For an initialization sequence to be successful, all the fault detection monitors must signal that the chip is "healthy". When DIS goes low, pins are checked for shorts to ground or VCC and a FAIL condition is latched if there is a fault. If the state of the pins is OK, a one-shot at the reset pin begins a countdown which will latch a FAIL condition if the bias current has not stabilized to an acceptable level during the one-shot time. The one-shot can be extended with an external capacitor connected from the RESET pin to ground. The one-shot1 width is approximately: TONE-SHOT = 3 ms + (0.3 ms/pF)x(external capacitance). 1.The one-shot is actually comprised of an oscillator and 10-bit counter. 02061-DSH-001-A Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 9 Advance Information 1.4 M02061 Data Sheet Figure 1-6. Safety Circuit Block Diagram CAPC MODSET OUT+ SET IBIASOUT SR LATCH _ RST Q DIS Q FAIL VCC3_OK BIAS_OK SET START Advance Information VCC5_OK ONE-SHOT RESET VCC3SEL RESET OPTIONAL EXTERNAL CAPACITOR TO EXTEND INITIALIZATION PERIOD 10 PULSE Q SR LATCH _ RST Q 3 ms + T opt_cap Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential DISABLE: MODULATION CURRENT BIAS CURRENT SVCC 02061-DSH-001-A Functional Description 1.5 Fault Conditions This section describes the M02061 operating modes during fault conditions. Over voltage, under voltage, pins shorted to VCC and pins shorted to ground are included in the fault table. Table 1-7. Pin Name Circuit Response to Single-point Fault Conditions 1 2 Circuit Response to Over-voltage Condition or Short to VCC Circuit Response to Under-Voltage Condition or Short to Ground Bias and modulation outputs are disabled once VCC rises above the supply detection (high voltage) threshold Bias and modulation outputs are disabled once VCC drops below the supply detection (low voltage) threshold DIN+, DIN- The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs.(1,2) The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state occurs.(1,2) VCC3SEL Does not affect laser power. Does not affect laser power. DIS Bias and modulation outputs are disabled. 3.3V operation - SVCC is opened. 5V operation - SHDWNOUT goes high. Does not affect laser power (normal condition for circuit operation). FAIL Does not affect laser power. Does not affect laser power. RESET Does not affect laser power. Does not affect laser power. MODMON Does not affect laser power. Does not affect laser power. BIASMON Does not affect laser power. Does not affect laser power. TxPWRMON Does not affect laser power. Does not affect laser power. APCSET A fault state occurs.(1) A fault state occurs.(1) IPIN A fault state occurs.(1) A fault state occurs.(1) IBIASOUT The laser will be turned off, then a fault state occurs.(1) A fault state occurs.(1) OUTP Laser modulation is prevented; the APC loop will increase the A fault state occurs.(1) bias current to compensate for the drop in laser power if it is DC coupled. If the set output power can not be obtained, a fault state occurs.(1,2) OUTN Does not affect laser power. Does not affect laser power. SVCC Does not affect laser power. Laser bias current will be shut off and a fault state occurs.(1) CAPC Laser bias current will be shut off, then a fault state occurs.(1) A fault state occurs.(1) VCC3 Bias and modulation outputs are disabled once VCC3 rises above the supply detection (high voltage) threshold Bias and modulation outputs are disabled once VCC3 drops below the supply detection (low voltage) threshold PWA Does not affect laser power. Does not affect laser power SHDWNOUT Does not affect laser power. if this pin is used to control an external switch, laser current is disabled and fault state MODSET The APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set 02061-DSH-001-A Advance Information VCC Does not affect laser power. occurs.(1) A fault state occurs.(1) average power, a fault state occurs.(1,2) Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 11 M02061 Data Sheet Table 1-7. Pin Name Circuit Response to Single-point Fault Conditions 1 2 Circuit Response to Over-voltage Condition or Short to VCC Circuit Response to Under-Voltage Condition or Short to Ground Does not affect laser power. May affect laser power. If this is the case, the APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault state TCSLOPE occurs.(1,2) TCSTART May affect laser power. If this is the case, the APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault Does not affect laser power. state occurs.(1,2) Advance Information DISDLY Does not affect laser power. Does not affect laser power. VTT Does not affect laser power. Does not affect laser power. The output will be held in a high or low state and the APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average The output will be held in a high or low state and the APC loop will attempt to compensate for the change in output power. If the APC loop can not maintain the set average power, a fault power, a fault state occurs.(1,2,3) state occurs.(1,2,3) SCB Does not affect laser power. Does not affect laser power. CEN Does not affect laser power. Does not affect laser power. CLK+, CLK- Notes: 1. A fault state will assert the FAIL output, disable bias and modulation outputs and will either open the switch at SVCC (3.3V operation) or SHDWNOUT will go high (5V operation). 2. Does not affect laser power when the output is AC coupled to the laser. 3. Does not affect laser power when CEN is low or floating. 12 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description 1.6 Applications Figure 1-8 and Figure 1-9 illustrate typical applications for 3.3/AC coupled and 5V/DC coupled laser. Internal 3.3V reg. CEN VCC VCC VCC PWA V CC VCC VCC SHDWN OUT Application Diagram, VCC = 3.3V Laser AC Coupled Example VCC3 Figure 1-8. SVCC Internal Power Bus OUTInput Buffer DIN+ Output Buffer D - FF OUT+ Laser Driver GND0 D INVCC3 -1.3V IBIASOUT Advance Information VTT IPIN Input Buffer CLK+ CLK- C APC DISDLY BIASMON APC SET MOD MON MOD SET TC START Automatic Power Control (laser bias current) TxPwrMON VCC TCSLOPE Modulation Control VCC3SEL SCB FAIL DIS ENA RESET Safety Circuitry with Latched Fault TX Disable For VCC=5V, connect VCC3SEL to GND. VCC3 02061-DSH-001-A Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 13 M02061 Data Sheet Figure 1-9. Application Diagram, VCC = 5V Laser DC Coupled Example Internal 3.3V reg. V CC CEN P WA VCC3 V CC3 V CC VCC3 S HDWN OUT V CC VCC =5V SVCC Internal Power Bus OUTInput Buffer DIN+ Output Buffer D - FF OUT+ Laser Driver GND0 D INVCC3 -1.3V IBIASOUT VTT IPIN Input Buffer CLK+ Advance Information CLK- C APC DISDLY BIASMON TxPwrMON APC SET MOD MON Automatic Power Control (laser bias current) MOD SET TC START TCSLOPE Modulation Control VCC3SEL SCB FAIL DIS ENA RESET Safety Circuitry with Latched Fault TX Disable Add a capacitor at DISDLY for E-PON and other burst mode applications. VCC3 14 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description 1.7 Pin Definitions Table 1-10 lists pin type definitions and descriptions for the M02061 device. Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number 1 1 Pin Name Pin equivalent load Function VCC Power supply V CC3 V CC V TT 2 2 DIN+ 3 3 DIN- Positive data input. Self biased. Compatible with AC coupled PECL, AC coupled CML, and DC-coupled PECL (VCC = 3.3V). When DIN+ is high, OUT+ sinks current. CLK+, CLK- CC CC3 VCC5_ OR 4 4 VCC3SEL 190 72 k 02061-DSH-001-A Negative data input. Self biased Compatible with AC coupled PECL, AC coupled CML, and DC-coupled PECL (VCC = 3.3V). See DIN+ drawing 3.3V VCC Select. Connect to VCC3 for VCC = 3.3V operation. Connect to GND for VCC = 5V operation. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 15 Advance Information 4 k D +, D -, IN IN or M02061 Data Sheet Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number Pin Name Pin equivalent load Function VCC3 VCC 3.2 k VTT 5 - VTT 4 k DIN+ 4 k DIN- 4 k CLK+ 4 k CLK- Self bias voltage for data and clock inputs. Approximately 2V, (VCC3 -1.3V). Advance Information 6 - CLK+ See DIN+ drawing Positive clock input. Self biased. Can be disconnected if not used. Compatible with AC coupled PECL or CML. Data is retimed on the rising edge of CLK+. 7 - CLK- See DIN+ drawing Negative clock input. Self biased. Can be disconnected if not used. Compatible with AC coupled PECL or CML. V CC V CC3 7 k 8 5 DIS DIS Bias and modulation output disable (TTL/CMOS). 80 k 16 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number Pin Name Pin equivalent load Function VCC Safety circuit control failure output (TTL/CMOS). Goes high when a safety logic fault is detected. This output will be high when DIS is high. FAIL 9 6 FAIL CC 10 7 RESET Advance Information VCC3 V RESET 190 Safety circuit reset. Leave open for normal operation or add a capacitor to ground to extend the reset time. Connect to GND to disable window comparators at APCSET VCC 11 8 DISDLY DISDLY 190 02061-DSH-001-A Disable delay control. Connect to ground for normal operation. In burst mode operation add a capacitor from this pin to ground to set the maximum disable time. Disable times greater than this maximum will engage the "slow-start" circuitry. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 17 M02061 Data Sheet Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number Pin Name Pin equivalent load VCC 12 - V CC3 Safety circuit bypass. Connect to GND or leave open for normal operation. Connect to VCC to allow the bias and modulation outputs to operate even if the safety circuitry indicates a fault. SCB SCB Function 24 k 48 k Advance Information VCC3 VCC Polarity control for the Monitor outputs. Connect to VCC or leave floating for normal operation (TxPwrMON, BIASMON, and MODMON source current to GND). Connect to GND to reverse the monitor reference. (TxPwrMON, BIASMON, and MODMON sink current from VCC3). 72 k 13 - MONPOL MON POL 190 V CC VCC3 MOD MON 14 9 MODMON 190 18 Modulation Current Monitor. Connect directly to the corresponding pin on the M02080 or through a resistor to GND (MONPOL high) or to VCC3 (MONPOL low). The current through this pin is approximately 1/100th of the MODULATION current to the laser This pin may be left open if the feature is not needed and the M02061 current consumption will be reduced by 0.5mA typically. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number 15 10 Pin Name BIASMON Pin equivalent load Function See MODMON drawing Bias Current Monitor. Connect directly to the corresponding pin on the M02080 or through a resistor to GND (MONPOL high) or to VCC3 (MONPOL low). The current through this pin is approximately 1/100th of the BIAS current to the laser. This pin may be left open if the feature is not needed and the M02061 current consumption will be reduced by 0.5mA typically. V CC 11 TxPwrMON TxPwr MON 33 V CC 17 02061-DSH-001-A 12 APCSET APCSET Transmit Power Monitor. Connect directly to the corresponding pin on the M02080 or through a resistor to GND (MONPOL high) or to VCC3 (MONPOL low). The current through this pin is approximately the same as the photodiode current into IPIN. This pin may be left open if the feature is not needed and the M02061 current consumption will be reduced by the IPIN current. VCC3 Average Power Control, laser bias current adjustment. Connect a resistor between this pin and ground to set the bias current to the laser. The APC loop will control the laser bias current to maintain a voltage of approximately 1.3V at this pin. The current through this pin is approximately the same as the current into IPIN. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 19 Advance Information 16 VCC3 M02061 Data Sheet Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number Pin Name Pin equivalent load Function VCC IPIN 18 13 IPIN 30 Current input from monitor photodiode anode. The APC loop will adjust the laser bias current to maintain a voltage at APCSET of approximately 1.3V and at this pin of approximately one VGS. The voltage at this pin will not exceed 1.6V in normal operation Advance Information VCC 19 14 IBIASOUT IBIASOUT V 20 20 15 GNDO GND0 Laser bias current output. Connect directly to laser cathode or at higher bit rates through a ferrite or a resistor to isolate the capacitance of this pin from the modulation drive, (~2pF). Maintain a voltage > 0.7V at this pin. CC Ground for output stage. May be connected directly to ground. At high bit rates (>2Gb/s) an optional inductor or ferrite may be added to reduce switching transients. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number Pin Name Pin equivalent load Function VCC 21 17 OUT+ Positive modulation current output. Sinks current when DIN+ is HIGH. Maintain a voltage > 1.6V at this pin when VCC3SEL is high. Maintain a voltage > 1.15V at this pin when VCC3SEL is low. OUT+ GND 0 17 OUT- See OUT+ drawing VCC 23 18 SVCC V CC3 SV CC Switched VCC. 3.3V applications - Connect to laser anode. Safety circuitry will open the switch when a fault is detected and no current will flow through the laser. No capacitance is needed on this node. If capacitance to ground is added, do not exceed 100pF. 5V applications - Disabled, leave open. V CC 24 02061-DSH-001-A 19 SHDWNOUT SHDWNOUT 12 k External switched VCC control signal. Use in 5V applications to create an external SVCC. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 21 Advance Information 22 Negative modulation current output. Sinks current when DIN- is HIGH Maintain a voltage > 1.6V at this pin when VCC3SEL is high. Maintain a voltage > 1.15V at this pin when VCC3SEL is low. M02061 Data Sheet Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number Pin Name Pin equivalent load Function VCC 25 20 CAPC C APC 100 Advance Information V CC 26 21 VCC3 22 V CC 3.3V applications - Power supply input. Connect to VCC. 5V applications - Internally generated 3.3V. Power supply output. Do not attach to non-M02061 circuitry. V CC3 VCC 27 Automatic power control loop dominant pole capacitor. (Connect a capacitor between this pin and VCC3.) A 2.2nF capacitor will give less than 1ms enable time and a loop bandwidth < 30kHz VCC3 + - PWA PWA 190 28 22 23 MODSET See PWA drawing 1.28V Pulse Width Adjust. Connect a resistor to GND to enable, (between 1k and 20k). Connect to VCC3 to disable. Modulation current control. Connect a resistor to ground to set the modulation current. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Functional Description Table 1-10. M02061 Pin Definitions and Descriptions 5x5 mm 4x4 mm QFN32 Pin QFN24 Pin Number Number 29 24 Pin Name TCSLOPE Pin equivalent load Function See PWA drawing Modulation current temperature compensation coefficient adjustment. Connect a resistor to ground to set the temperature compensation coefficient. Leave open to minimize the temperature compensation coefficient. A 51k resistor will result in a temperature compensation slope of approximately 0.5%/C VCC - TCSTART 4.2 k 33 k 31 - SB See SCB drawing This function is not yet available. 32 - CEN See SCB drawing Clock enable input (TTL/CMOS). Set HIGH to use CLK inputs, LOW or not connected when not using CLK inputs CENTER PAD CENTER PAD GND 02061-DSH-001-A Connect to GND. Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 23 Advance Information 30 Modulation current temperature compensation start point adjustment. Connect a resistor to ground to set the start temperature at which temperature compensation is activated. Connect to GND to disable temperature compensation of the modulation current. TCSTART M02061 Data Sheet Advance Information 24 Mindspeed TechnologiesTM Advance Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A 2.0 Product Specification 2.1 Absolute Maximum Ratings Table 2-1. Absolute Maximum Ratings Symbol Parameter Rating Units Power supply voltage -0.4 to +6.0 V VCC3 3.3V power supply voltage -0.4 to +4.0 V TA Operating ambient temperature -40 to +85 C TSTG Storage temperature -65 to +150 C IBIASOUT (MAX) Maximum bias output current 150 mA IMOD (MAX) Maximum modulation current 140 mA DIN+/-, CLK+/- Data and clock inputs 0 to VCC3 + 0.4 V CEN, DIS, VCC3SEL Mode control inputs -0.4 to VCC + 0.4 V BIASMON, MODMON Bias and modulation output current mirror compliance voltage -0.4 to VCC3 + 0.4 V IPIN Photodiode anode voltage -0.4 to VCC3 + 0.4 V FAIL Status flags -0.4 to VCC + 0.4 V PWA, APCSET, MODSET Set inputs -0.4 to VCC3 + 0.4 V TCSTART Temperature compensation start temperature -0.4 to 1.0 V TCSLOPE Temperature compensation slope -0.4 to VCC3 + 0.4 V OUT+, OUT- Output -0.4 to VCC3 + 0.4 V Preliminary Draft VCC These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged. Reliable operation at these extremes for any length of time is not implied. 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 25 M02061 Data Sheet 2.2 Table 2-2. Recommended Operating Conditions Recommended Operating Conditions Parameter Rating Units Power supply (VCC-GND) 3.3 7.5% or 5.0 + 10%,-5% V Junction temperature (die) -40 to + 120 C Operating ambient -40 to + 85 C 2.3 DC Characteristics (VCC = +3.05V to +3.55V or 4.75V to 5.5V, TA = -40 C to +85 C, unless otherwise noted) Preliminary Draft Typical values are at VCC = 3.3 V, IBIASOUT = 30 mA, IMOD = 30 mA, TA = 25 C, unless otherwise noted. Table 2-3. Symbol DC Characteristics Parameter Conditions CEN low (no retiming), PWA high (no pulsewidth adjust) ICC Supply current excluding IMOD and IBIAS IBIAS Bias current adjust range IBIAS(OFF) Bias current with optical output disabled additional current when retiming is used additional current when PWA used additional current when operating from a 5V supply V(IBIASOUT) > 0.7V For 3.3V operation with an AC coupled laser For 5.0V operation with a DC coupled laser. DIS = high V(IBIASOUT) > VCC - 1V Ratio of IBIAS current to BIASMON current Min. Typ. Max. - 35 61 - 3 4 - 1.5 2 - 1.5 2 mA 1 100 1 60 mA - - 300 A - 100 - A/A VMD Monitor diode reverse bias VCC =3.3V voltage 1.7 - - V IMD Monitor diode current adjustment range 10 - 1500 A Adjusted with RAPCSET Ratio of TxPwrMON current to monitor photodiode current 26 Units 1 Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential A/A 02061-DSH-001-A Product Specification Table 2-3. DC Characteristics Symbol Parameter Conditions Min. Typ. Maximum monitor photodiode capacitance CMD_MAX for APC loop stability. Includes all associated parasitic capacitances. Max. Units 100 pF TTL/CMOS input high voltage (DIS) 2.0 - 5.5 V TTL/CMOS input low voltage (DIS) - - 0.8 V CMOS input high voltage (SCB, CEN, SB, VCC3SEL, MONPOL) 2.4 V Logic output high voltage (FAIL) With external 10k pull-up to VCC. Logic output low voltage (FAIL) 1.2 V VCC - 0.6 - - V sink current = 1.5mA - - 0.4 V Differential input impedance Data and clock inputs -- 8000 - Common-mode input compliance voltage Data and clock inputs VCC3-1.0 V VIN(DIFF) Differential input voltage = 2 x (DIN+HIGH - DIN+LOW) (clock inputs follow same relationship) VCC3THL(1) RIN VINCM VCC3 - 1.6 VCC3 - 1.3 Preliminary Draft CMOS input low voltage (SCB, CEN, SB, VCC3SEL, MONPOL) 200 - 2400 mVpp 3.3V supply detection, lower threshold 2.6 2.8 2.9 V VCC3THH(1) 3.3V supply detection, upper threshold 3.65 3.8 4.0 V VCC5THL 5V supply detection, lower threshold 4.3 4.5 4.65 V VCC5THH 5V supply detection, upper threshold 5.6 5.8 6.0 V VREF1 Reference voltage for MODSET 1.2 1.3 1.4 V VAPCSET Reference voltage for APCSET 1.3 V VBL Bias_OK lower voltage threshold 1.0 V 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 27 M02061 Data Sheet Table 2-3. Symbol DC Characteristics Parameter Conditions Preliminary Draft VBH Bias_OK upper voltage threshold VFAULTL Lower voltage threshold for fault inputs IBIASOUT, OUT+, CAPC, AND MODSET FAIL asserts if any of these signals fall below this value. VOUT_DIS Self bias voltage for IBIASOUT and OUT+ DIS = high VSHDWNL SHDWNOUT output low voltage DIS = low, ISHDWNOUT 5mA VSHDWNH SHDWNOUT output high voltage DIS = low, ISHDWNOUT 10uA Min. Typ. Max. 1.6 0.5 VCC 0.3V Units V 300 375 mV 1.6 1.8 V VCC - 4 V V Notes: 1. When VCC = 5V, VCC3 "supply OK" circuitry monitors the internally regulated 3.3V supply. When VCC = 3.3V, VCC3 "supply OK" circuitry monitors VCC. 28 Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Product Specification 2.4 AC Characteristics - Logic Timing (VCC = 3.05 V to 3.55V or 4.75V to 5.5V, TA = -40 C to +85 C, unless otherwise noted) Typical values are at VCC = 3.3 V, IBIASOUT = 30 mA, IMOD =40 mA, 25 ohm load and TA = 25 C, unless otherwise noted. Table 2-4. Symbol AC Characteristics Parameter Conditions 3.3V operation, AC coupled, OUT+ and OUT- >1.6V IMOD IMOD(OFF) Modulation current range Modulation current with output disabled Min. Typ. 10 Max. Units. 100 - mA 5V operation, DC coupled(1) into a 25 load to VCC - 1.2V. OUT+ and OUT>1.15V 10 DIS = high - - 300 A - 100 - A/A IMOD-TC Programmable range for modulation current temperature coefficient Adjustable using TCSLOPE (2) 0 - 104 ppm/C TTCSTART Programmable temperature at which modulation current TC compensation enables Dependent upon value selected for RTCSTART (2) 20 - 60 C tr Modulation output rise time - 50 75 ps tf Modulation output fall time 20% to 80% into 25 . (IMOD = 28 mA). Measured using 11110000 pattern at 2.5Gbps - 50 75 ps OS Overshoot of modulation output currentin off direction. into 25 load -- 1 2 % TSU Minimum Setup time Referenced to 50% transition point of noninverting clock input going high (CLK+) - 35 - ps TH Minimum Hold time Referenced to 50% transition point of noninverting clock input going high (CLK+) - 35 - ps RJ Random jitter - 0.8 - psrms 10 25 10 30 Measured into 25 load, 231 - 1 PRBS at 2.7 Gbps; using clock inputs DJ Deterministic jitter K28.5 pattern at 3.3 Gbps (no re-timing) pspp (includes pulse width distortion3) Notes: 1. DC coupled operation at 3.3V is not supported. AC coupled operation at 5V is possible provided the outputs never exceed 6V. 2. Guaranteed by design and characterization. 3. Pulse width distortion is measured single-ended. 4. All die are tested and guaranteed at 25 C 5 C. Die are characterized and designed to operate from -40 to +85C. 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 29 Preliminary Draft Ratio of modulation current to MODMON current 75 M02061 Data Sheet 2.5 Safety Logic Timing (VCC = 3.05 V to 3.55V or 4.7V to 5.5V, TA = -40 C to +85 C, unless otherwise noted) Typical values for common anode are at VCC = 3.3 V, IBOUTCA = 20 mA, IMOD = 20 mA, TA = 25 C, unless otherwise noted. Typical values for common cathode are at VCC = 3.3 V, IBOUTCC = 5 mA, IMOD = 5 mA, TA = 25 C, unless otherwise noted. Table 2-5. Symbol Safety Logic Timing Parameter Conditions Min. Typ. Max. Units. Preliminary Draft t_off DIS assert time Rising edge of DIS to fall of output signal below 10% of nominal(1) 10 s t_on DIS negate time Falling edge of DIS to rise of output signal above 90% of nominal(1) 1 ms t_init Time to initialize(2) Includes reset of FAIL; from power on after Supply_OK or from negation of DIS during reset of FAIL condition 5 ms t_fault Laser fault time - from fault condition to assertion of FAIL From occurrence of fault condition or when Supply_OK is beyond specified range 100 s t_reset DIS time to start reset DIS pulse width required to initialize safety circuitry or reset a latched fault 10(3) s tVCC_OK Supply_OK delay time Delay between Supply_OK condition and when outputs are enabled t_onBM DIS negate (turn-on) time during burst-mode operation operation)(4) t_offBM DIS assert (turn-off) time during burst-mode operation IMOD > 20mA; outputs DC coupled (5V operation) IMOD > 20mA; outputs DC coupled (5V 2 10 3 s 20 300 500 ns 200 500 ns Notes: 1. With CAPC < 2.2nF 2. User-adjustable. Specifications reflect timing with no external RESET capacitor. 3. With < 1nF capacitor from RESET pin to ground. 4. Imod >12mA 30 Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Product Specification Figure 2-6. Relationship between Data and Clock Inputs and Modulation Outputs DIN+ 100 mV 1200 mV D IN- V IN(DIFF) TSU TH 200 mV 2400 mV Preliminary Draft CLK+ 100 mV 1200 mV CLK- V OUT- V OUT+ > 1.60V when VCC5_OR high > 1.15V when VCC5_OR low GND TSU = 35psec minimum, (data set-up time) TH = 35psec minimum, (data hold time) 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 31 M02061 Data Sheet Figure 2-7. Safety Logic Timing Characteristics Slow Rise on Vcc = 5V at Power-up (DIS Low) Hot Plug (DIS Low) 5V VCC3 and VCC5 status FAIL Preliminary Draft DIS VCC3 and VCC5 "OK" VCC 3.3V VCC3 (low) FAIL (low) DIS (low) (low) t_on < 1ms, (300 s typ.) LASER OUTPUT t_on < 1ms, (300 s typ.) LASER OUTPUT Slow Rise on Vcc=3.3V at Power-up (DIS Low) Transmitter Enable (DIS transition Low) 3.3V VCC 3.3V VCC3 and VCC5 status (high) FAIL (low) DIS (low) VCC3 and VCC5 "OK" VCC3 FAIL state at power-up will depend on pull-up voltage FAIL DIS (low) (low) t_on < 1ms, (300 s typ.) LASER OUTPUT 32 t_on < 1ms, (300 s typ.) LASER OUTPUT Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Product Specification Transmitter Disable (DIS transition high) (high) VCC3 and VCC5 status VCC3 and VCC5 "OK" Fault recovery at: MODSET. CAPC, OUT+, or IBout DIS DIS LASER OUTPUT Response to Fault FAIL DIS LASER OUTPUT 02061-DSH-001-A FAIL remains high until reset by DIS going high t_reset, 10 s, min. Preliminary Draft t_off < 10 s, (1 s typ.) Fault at: MODSET. CAPC, OUTP, or IBout Fault Removed FAIL (low) FAIL Fault Recovery Behaviour t_on < 1ms LASER OUTPUT Unsuccessful Fault Reset Attempt Fault Occurs Fault Remains Fault at: APCSET t_fault < 100 s, (4 s typ.) t_init < 5ms, (3ms typ.) FAIL DIS t_reset, 10 s, min. LASER OUTPUT Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 33 M02061 Data Sheet 2.6 Figure 2-8. Package Specification QFN24 Package Information Preliminary Draft Note: View is for a 20 pin package. All dimensions in the tables apply for the 24 pin package 34 Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Product Specification Figure 2-9. QFN32 Package Information Preliminary Draft 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 35 M02061 Data Sheet 2.7 Pinout Information SHDWNOUT CAPC VCC3 PWA MODSET TCSLOPE Figure 2-10. QFN 24 Pinout Information 19 24 VCC 1 18 SVCC DIN+ OUT- DIN- OUT+ VCC3 SEL GND0 GND, connect to PCB ground DIS IBIAS OUT IPIN 13 APCSET TXPWRMON BIASMON MODMON DISDLY 12 RESET 7 4mm x 4mm 32 VCC C APC VCC3 PWA SET MOD TCSLOPE TC START SB CEN Figure 2-11. QFN32 Pinout Information 25 1 24 SVCC DIN- OUT- VCC SEL OUT+ VTT GND0 GND, connect to PCB ground CLK+ IBIASOUT IPIN CLK8 17 APC SET BIASMON MODMON MONPOL SCB DISDLY 16 RESET 9 TXPWR MON DIS 36 SHDWNOUT DIN+ FAIL Preliminary Draft 6 FAIL Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 5mm x 5mm 02061-DSH-001-A 3.0 Appendices 3.1 Table 3-1. Glossary of Terms/Acronyms Glossary and Acronyms Advanced Encryption Standard a-Law/u-Law A-law and u-law are companding schemes used in telephone network to get more dynamics to the 8 bit samples that is available with linear coding. Typically 12..14 bit samples (linear scale) sampled at 8 kHz sample are companded to 8 bit (logarithmic scale) for transmission over 64 kbit/s data channel. In the receiving end the data is then converter back to linear scale (12..14 bit) and played back. converted back AMBA Advanced Microprocessor Bus Architecture (AMBA) is an open standard, on-chip bus specification that details a strategy for the interconnection and management of functional blocks that makes up a System-on-chip See http:// www.arm.com/armtech.nsf/html/AMBA?OpenDocument&style=AMBA API Application Programming Interface ARM920T The ARM920T is a high-performance 32-bit RISC integer processor macro cell combining an ARM9TDMITM processor core with: * 16KB instruction and 16KB data caches * instruction and data Memory Management Units (MMUs) * write buffer * an AMBATM (Advanced Microprocessor Bus Architecture) bus interface * an Embedded Trace Macro cell (ETM) interface. See http://www.atmel.com/atmel/acrobat/arm920t.pdf ARP Address Resolution Protocol ASIC Application Specific Integrated Circuit AXF ARM Executable Format a not pure binary image output file produced by the ARM Linker - see ARM920T BGA Ball Grid Array BIU A bus interface unit is the part of the ASIC that interfaces with the rest of the internal logic blocks. Its name comes from the fact that it deals with moving information over the inter-block data busses, the primary conduit for the transfer of information to and from the ARM. The bus interface unit is responsible for responding to all signals that go to the microprocessor, and generating all signals that go from the microprocessor to other parts of the chip. BSP Board Support Package CLASS Custom Local Area Signaling Services CNG Comfort Noise Generation DES Data Encryption Standard DPLL Digital Phased Locked Loop DSO Digital Service level 0 is a single 8-bit timeslot on a Time Division Multiplex Carrier (e.g. a Telco T1 Line). For example, there are 24 DS0's in a DS1, and there are 672 DS0's in a DS3. 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential Advance Information AES 37 M02061 Data Sheet Table 3-1. Glossary and Acronyms Advance Information DSP Digital Signal Processor DTMF Digital Tone Multi-frequency - i.e., Touchtone EEPROM Electronically Erasable Programmable Read Only Memory EMAC Ethernet Media Access Controller EMI Electro Magnetic Interference FPBGA Fine Pitch Ball Grid Array FTP File Transfer Protocol GPIO General Purpose Input Output ICE In Circuit Emulator ICMP Inter-Computer Messaging Protocol IP Internet Protocol iPBX Internet PBX LAN Local Area Network Linux Popular UNIX like operating system LIU Line Interface Unit M825xx MindSpeed Family of PBX on a chip ASIC's that include the M82505, M82510, M82520, and M82530 MAC Media Access Controller MCU Access to the ARM embedded in-circuit emulator MMU Memory Management Unit MTU Multi-Tenet Unit OS Operating System Packet Processor The Packet Processor functions as an asynchronous transfer mode adaptation layer 2 processor offering designers of voice and data gateways breakthrough performance in AAL-2-based voice processing. PBX Private Branch Exchange PCI Peripheral Component Interconnect - 32-bit local buss for a PC or Macintosh computer PHY Pertaining to the Physical Layer of the OSI Model POTS Plain Old Telephone Service PSTN Public Switched Telephone Network RC2 A variable key-size block cipher designed for data security. It is faster than DES and is designed as a "drop-in" replacement for DES It can be made more secure or less secure than DES against exhaustive key search by using appropriate key sizes. RMII Reduced Media Independent Interface, RMII Consortium ROM Read Only Memory RS232 EIA Standard defining mechanical, electrical, and functional specifications for serial communications between computers, terminals, and modems. RTCP Real-time Conferencing Protocol for large groups on the internet RTOS Real Time Operating System RTP Real-time Transport Protocol for streaming real-time multimedia over IP in packets SDRAM Synchronized Dynamic Random Access Memory 38 Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Appendices Table 3-1. Glossary and Acronyms A signaling controller provides signaling connectivity to the network and provides all the functions for signaling and network management. SIP Session Initiated Protocol. Session Initiated Protocol (SIP) is an application-layer control (signaling) protocol creating, modifying, and termination sessions with one or more participants. SiPBX MindSpeed's registered Trade Mark for theM825xx family of PBX in a chip ASIC devices SLAC A codec/filter device that integrates a wide range of derived voice features that are essential for VoIP applications. Capabilities typically include caller ID tone generation, dual-tone multiple-frequency (DTMF) modem tone detection, programmable impedance and hybrid functions, adaptive balance, loop supervision, and metering generation. SLIC Subscriber Line Interface Circuit SPI The SPI interface provides an alternative method to connect 'slow' peripherals to a DSP system. The SPI interface is based on a 8 bit shift register. The shift clock (SCK) is provided by the master device. SCK is a gated clock and is only generated during shifting. SCK stays idle between transfers. Transmitting and receiving occurs simultaneously: While the master shifts out it's transmit data, data from the slave is shifted in. As a result, the master must always send data in order to generate clocks, even if only data reception is required. The following diagram shows a basic interface and a sample data transfer: Data on SDO is shifted out with the falling SCK edge, data on SDI is sampled on the rising SCK edge. The SCK idle polarity is 'High'. SPU Signal Processing Unit comprised of multiple DSP cores. Access to the DSP JTAG embedded debugger. SRAM Static Random Access Memory T1/E1 Digital transmission link with capacity of 1,544 Mbps (E1 is for European service) TDM Time Division Multiplex Telnet A private, commercially available network providing packet and circuit switched service TSI Time Slot Interchanger TTL Transistor-Transistor Logic UART Universal Asynchronous Receiver/Transmitter UDP User Datagram Protocol VAD Generic Voice Activity Detection vLIW Very-long-instruction-word (VLIW) architecture in a digital signal processor VoIP Voice over IP VxWorks A popular real time operating system from Wind River 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential Advance Information SIGNALING CONTROLLER 39 M02061 Data Sheet Advance Information 40 Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 02061-DSH-001-A Information in this document is provided in connection with Mindspeed TechnologiesTM ("MindspeedTM") products. These materials are provided by Mindspeed as a service to its customers and may be used for informational purposes only. Except as provided in Mindspeed's Terms and Conditions of Sale for such products or in any separate agreement related to this document, Mindspeed assumes no liability whatsoever. Mindspeed assumes no responsibility for errors or omissions in these materials. Mindspeed may make changes to specifications and product descriptions at any time, without notice. Mindspeed makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF MINDSPEED PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. MINDSPEED FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. MINDSPEED SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. Mindspeed customers using or selling Mindspeed products for use in such applications do so at their own risk and agree to fully indemnify Mindspeed for any damages resulting from such improper use or sale. 02061-DSH-001-A Mindspeed TechnologiesTM Preliminary Information/Mindspeed Proprietary and Confidential 41 Advance Information (c) 2003, Mindspeed TechnologiesTM, Inc. All rights reserved. M02061 Data Sheet www.mindspeed.com General Information: U.S. and Canada: (800) 854-8099 International: (949) 483-6996 Headquarters - Newport Beach 4000 MacArthur Blvd., East Tower Newport Beach, CA. 92660 Advance Information