LTC4063
10
4063fc
operaTion
protects the LTC4063 from excessive temperature and
allows the user to push the limits of the power handling
capability of a given circuit board without risk of damaging
the LTC4063. The charge current can be set according to
typical (not worst-case) ambient temperatures with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors the
input voltage and keeps the charger in shutdown mode
until VCC rises above the undervoltage lockout threshold
(3.8V). The UVLO circuit has a built-in hysteresis of
200mV. Furthermore, to protect against reverse current in
the power MOSFET, the UVLO circuit keeps the charger in
shutdown mode if VCC falls to less than 45mV above the
battery voltage. Hysteresis of 135mV prevents the charger
from cycling in and out of shutdown.
Manual Shutdown
At any point in the charge cycle, the charger can be put
into shutdown mode by pulling the CHGEN pin high. This
reduces the supply current to less than 65µA and the
battery drain current of the charger to less than 2µA. A
new charge cycle can be initiated by pulling the CHGEN
pin low.
Pulling the LDOEN pin high puts the LDO into shutdown
mode reducing the battery drain current of the LDO to less
than 5µA. When both the CHGEN and LDOEN pins are pulled
high, the total battery drain current from the LTC4063 is
less than 2µA. If shutdown is not required, leaving these
pins disconnected continuously enables the circuit.
T
rickle Charge and Defective Battery Detection
When the BAT pin voltage is below the 2.9V trickle charge
threshold (VTRIKL), the charger reduces the charge current
to 10% of the programmed value. If the battery remains in
trickle charge for more than 25% of the total programmed
charge time, the charger stops charging and enters a FAULT
state, indicating that the battery is defective.1 The LTC4063
indicates the FAULT state by driving the CHRG open-drain
output with a square wave. The duty cycle of this oscillation
is 50% and the frequency is set by CTIMER:
fµF
CHz
CHRG TIMER
=0 1 3 1
.• .
An LED driven by the CHRG output exhibits a blinking
pattern, indicating to the user that the battery needs
replacing. To exit the FAULT state, the charger must be
restarted either by toggling the CHGEN input or removing
and reapplying power to VCC.
Charge Status Output (CHRG)
The charge status indicator pin has two states: pull-down
and high impedance. In the pull-down state, an NMOS
transistor pulls down on the CHRG pin and can sink up
to 10mA. A pull-down state indicates that the LTC4063 is
charging a battery and the charge current is greater than
IDETECT (which is set by the external resistor RDET). A high
impedance state indicates that the charge current has
dropped below IDETECT. In the case where the IDET pin is
left open (RDET = ∞, IDETECT = 0), a high impedance state
on CHRG indicates that the LTC4063 is not charging.
Low Dropout Linear Regulator (LDO)
The OUT pin provides a stable, regulated output voltage
powered from the battery. This output can power devices
such as memory or USB controllers from the battery when
there is no power applied to VCC.
The LDO can deliver 100mA of current with a nominal
dropout voltage of 150mV. It is designed to be stable
with a low ESR capacitor greater than 2µF on the OUT
pin. Furthermore, the LDO is capable of operating from
a Li-Ion battery voltage as low as 2.65V with less than
300mV of dropout over the specified operating conditions.
An undervoltage lockout circuit automatically disables the
LDO when the battery voltage drops below 2.55V, reducing
the battery drain current to less than 5µA. The LDO can
be disabled by pulling the LDOEN pin high, reducing the
battery quiescent current to less than 5µA.
1 The defective battery detection feature is only available when time termination is being used.