ISL6118LIB-T - Intersil Corporation

File Number 9008.1

CAUTI ON: Thes e devi c es a r e se ns i tive to electrostatic di sc har ge ; foll ow pr oper IC Handlin g Proced u re s.

ISL6118

Dual Power Supply Controller

The ISL61 18 is a dual channel , fu lly i ndependent ove rcurrent

(OC) fault protection IC for the +2.5V to +5.5V environment.

This device features inter nal current monitoring, accurate

current limiting, integrated power switches and current

lim ited delay to latch-off for system protection.

The ISL6118 current sense and limiting circuitry sets the

current limit to a nominal 0.6A, which is well suited for the

3.3VAUX ACPI application. The ISL6118 is the ideal

companion chip to the HIP1011D and HIP1011E dual PCI

hot plug controllers. Together these and the ISL6118 fully

contr ol the f our legacy PCI v oltages (+/-12 V, +3.3V, +5V) and

the 3.3 V A U X, respe ctiv ely f or po wer cont rol of tw o PCI slots

com pli ant to PCI Bus P ower Man agement Interface Spec

Rev 1.1. Designed to be co-located with the HIP1011D on

the motherboard, the ISL6118 provides OC fault notification,

accur ate current limiting and a consistent time d latch-off thus

isol ati ng and pr otecting th e vol tage b us in the p res ence of an

OC event or shor t circuit during all PCI Bus Power States as

defined by the PCI specification. The 12ms time to latch-off

is independent of the adjoining sw itch’s e lectrical or thermal

condition and the OC response time is inversely related to

the OC magnitude.

Each ISL6118 incorporat es in a single 8-lead SOIC

package two 80mΩ N-channel MOSFET power s witches for

power control. Ea ch switch is dr iven by a constant current

source giv ing a controlle d ramp up of the output voltage.

This prov ides a soft star t turn-on eliminating b us voltage

drooping caused by inrush cur rent whi le char gi ng heavy

load capa citances. Independent enabling inputs and fault

reporting outputs for each channel are compatible with 3V

and 5V logic to allow external control and monitoring.

The ISL6118 undervoltage (UV) feature pre vents turn-on of

the outputs unless the correct ENABLE state and VIN >

2.5V are present. During initial turn-on the ISL6118

prevents fault repor t ing by blanking the fault signal. Ri sin g

and falling outputs are current-limited voltage r amps so that

both the inr ush current and voltage slew rate are lim ited,

indepen dent of load. This reduces supply dr oop due to

surge and eliminates the need for ext erna l EMI f ilt ers.

Durin g operation, once an OC conditio n is detected the

appropriate output is c urrent limited for 12ms to all ow

transient conditions to pass. If still in current li mi t aft er the

current limit period has elapse d, the outpu t is latched off

and the fault is reported by pulling the corresponding

FAULT low. The FAULT signal is latched low until reset by

the ENABLE signal being de-asserted at which time the

FAULT signal will clear.

Features

•80mΩ Integrated Power N-Channel M OSFET Switches

• Ac curat e Cu rrent Sen sing and Limiti n g

• 12ms Fault Delay to Latch-Off, No Thermal Dependency

• 2.5V to 5.5V Operating Range

• Disabled Output Internally Pulled Low

• Undervoltage Lockout

• Controlled Turn-On Ramp Time

• Channel Independent Fault Output Signal s

• C ompat ible with 3.3V and 5V Logic Famili es

• Channel Independent Lo gic Level Enable High Inputs

(ISL6118H) or Enable Low Input s (I SL6118L)

Applications

• ACPI 3.3V AUX Control

• Electronic Circuit Limiting and Breaker

Pinout

I SL611 8 (S OI C)

TOP VIEW

Ordering Information

PART NUMBER TEMP. RANGE

(oC) PACKAGE PKG. NO.

IS L611 8LIB -4 0 to 85 8 Ld SO IC M8. 1 5

ISL6118LIB-T -40 to 85 8 Ld SOIC Tape and Reel

IS L611 8H IB -4 0 to 85 8 Ld SO IC M8. 1 5

ISL6118HIB-T -40 to 85 8 Ld SOIC Tape and Reel

IS L611 8EVAL1 ISL 6118 Eva lu at i on Pl atform

IS L16AHP EVAL 1 ACPI (HIP1 0 11D and ISL6118 H) Eva luati on

Platform

GND

VIN

ENABLE_1

ENABLE_2

FAULT_1

OUT_1

OUT_2

FAULT_2

Data S heet May 200 1

Sim plified Bloc k Diag ra m

GND

VIN

EN_1

EN_2 FAULT_2

OUT_2

OUT_1

FAULT_1

Q-PUMP

CURRENT AND TEMP.

POR

CHANNEL 1 LIKE CHANNEL 2

MONITORING, GATE AND

OUTPUT CONTROL

LOGIC

Pin D escr ipt ion s

PIN NO. DESIGNATOR FUNCTION DESCRIPTION

1 GND IC Reference

2 VIN Chip Bias, Controlled

Supp ly Input,

Undervoltage Lock-Out

VI N pr ov id es chip bias volt age. At VIN < 2.5V c hi p fun ct i on al ity i s d i sab led, FAU LT_X l atc h

is cleared and floating and OUT is held low.

3, 4 ENABLE_1, 2 /

ENABLE_1,2 Channel Enable /

Enable not Inputs Enables/Disables switch.

5, 8 FAU LT OUT_2, 1 Channel 2, 1 Over

Current Fault not

Indicator

Channel overcurrent fault-not indicator. FAULT floats and is disabled until VIN >2.5V. This

output is pulled low after the OC timeout period has expired and stays latched until ENABLE

is deasserted.

6, 7 OUT_ 2, 1 Channel 2,1 Controlled

Supply Output Channel voltage output, connect to load to protect. Upon an OC condition OUT is current

limited to 0.6A. Current limit response time is within 200uS. This output will remain in current

limit for a d eterm ined ti m e before bein g l at ched off.

ISL6118

Absolute Maximum Ratings Thermal Infor mat ion

Supply Voltage (VIN to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . 6.0V

EN, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to 6V

OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND-0.3V to VIN +0.3V

Output Current . . . . . . . . . . . . . . . . . . . . . . .Short Circuit Protected

ESD Rating

Hu man Bod y M odel (Per MI L -S T D - 88 3 Me t h od 3015.7) . . . . 3KV

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . 2.7V to 5.5V

Th erm al Resi stan ce (Typi c al, No te 1) θJA (oC/W)

8 Lead SOIC Package . . . . . . . . . . . . . . . . . . . . . . . 116

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC

Max im um St or ag e Te mp er a ture Rang e. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

CAUT ION: St resses above those listed in “Absol ute Maximum Ratings ” may cause per manent damage to the device. This is a str ess onl y rati ng and operation of t he

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

2. All voltages are relative to GND, unless otherwise specified.

Electrical Speci fications Su pply Voltag es = 3.3V, TA = TJ = -40 to 85oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

POWER SWITCH

ISL6118 On Resistance at 2.7V rDS(ON)_27 VIN = 2.7V, IOUT = 0.4A, TA = TJ = 25oC - 90 105 mΩ

TA = TJ = 85oC-115130mΩ

ISL6118 On Resistance at 3.3V rDS(ON)_33 VIN = 3.3V, IOUT = 0.4A, TA = TJ = 25oC - 80 100 mΩ

TA = TJ = 85oC-115130mΩ

ISL6118 On Resistance at 5.0V rDS(ON)_50 VIN = 5V, IOUT = 0.4A, TA = TJ = 25oC-8095mΩ

TA = TJ = 85oC-115130mΩ

Di sabl ed Outpu t V ol t ag e VOUT_DIS VIN = 5V, Swi tch Disabled, 50µA Load - 300 450 mV

OUT Rising Rate t_vout _rt RL = 10Ω, CL = 0.1µF , 10 %-90 % - 8 - V/ ms

Slow VOUT Turn-off Rate t_svout_offt RL = 10Ω, CL = 0.1µF, 90 % - 10 % - 8 - V/ ms

Fa st VOUT Turn-off Rate t_fvout_offt RL = 1Ω, CL = 0.1µF, 90%-10% - 4 - V/µS

CURRENT CONTROL

Current Limit, VIN = 3.3V - 5V Ilim VOUT = 0.8V 0.45 0.6 0.75 A

OC Regulation Settling Time tsettIlim RL= 3Ω, CL= 0.1µF to within 10% of CR - 2 - ms

Severe OC Regulation Settling Time tsettIlim_sev RL< 1Ω, CL= 0.1µF to within 10% of CR - 100 - µs

Over Current Latch-off Time tOC_loff ISL6118X, TJ = 25oC-12-ms

I/O PARAMETERS

Fault Output Voltage VFAULT Fault Output Current = 10mA - - 0.4 V

ENABLE High Threshold Ven_vih VIN = 5.5V 2.0 - - V

ENABLE Low T hre s hold at 2.7V Ve n_ vi l V IN = 2 .7 V - - 0.6 V

ENABLE Low T hre s hold at 5.5V Ve n_ vi l V IN = 5 .5 V - - 0.8 V

ENABLE Input Current Ien_i ENABLE = 0V to 5V, VIN = 5V, TJ >25oC-0.500.5µA

BIAS PARAMETERS

Enabled VIN Current IVDD Switches Closed, OUTPUT= OPEN, TJ >0oC-120200µA

Di sabl ed VIN C urrent I VDD Switches Open, OUTPUT= OPEN - 1 5 µA

Under voltage Lockout Threshold VUVLH VIN Rising, Switch Enabled 1.7 2.25 2.5 V

UV Hys teresis UVHYS 50 100 - mV

Over Temperature Disable Temp_dis - 150 - oC

ISL6118

Introduction

The ISL6118 is a fully independent dual channel overcurrent

(OC) fault protection IC for the +2.5V to +5.5V environment.

Each ISL6 118 in corp orate s in a single 8-l ead SOI C pac kage

two 80mW N-channel MOSFET power switches for power

control. See Figure 2 for integrated FET on resistance

curves. Independent enabling inputs and fault reporting

outputs compatible wit h 3V and 5 V logic allow for extern al

control and monitoring. This device features internal current

monitoring, accurate current limit ing, integrated power

switches and current limited timed delay to latch-off for

system protection.

Key Feature Description and Operation

UV Lockout

The ISL6118 undervoltage (UVLO) lockout prevents

functional ity of the device unless the corre ct EN ABLE state

and VIN > 2.5V are present.

Soft Start

A const ant 500 nA curr ent source ra mps up the s witc h’ s gate

causing a voltage follower effect on the out put voltage. This

provides a soft star t tu rn-on and eliminates bus voltage

drooping caused by inrush current charging heavy load

capacitances. Rising an d falling outputs are current limited

voltage ramps so that both the inrush current and voltage

slew rate are limited, independent of load. This reduces

supply droop due to surge and also eliminates the need for

exter nal EMI filters necessary on other IC products. See

Figure 3 fo r soft start wavefor ms.

Fault Blanking on Start-Up

During initial turn-on the ISL6118 prevents nuisance faults

from being reported to the system controller by blanking the

fault signa l for 12ms. This blanking e liminates the need for

external RC filters necessary for other vendors’ products.

Current Regulation

The ISL6118 has integrated current sensing on the power

MOSFETs that allows for rap id control of OC events. Once

an OC c onditi on is detec ted th e ISL611 8 goe s in to i ts c urrent

regul atio n (CR) control mode . The I SL6118 CR le v el is set to

a no minal 0.6A and is regu lated to within +/-25% over full

temperature, bias vol tage range and OC magnitude. The

speed of this control is proportional to the level o f OC. Thus

a hard OC is more quickly controlled than a marginal

condition. See Figures 4 through 7 for current regulation

performance curves and waveforms.

Latc h- Off Time Delay

The primary function of any OC protection device is to

quickly isolate the voltage bus from a faulty load. Unlike

other manufactur ers’ IC produc ts that sense the IC thermal

condition to isolate a faulty load, the ISL6118 uses an

inter nal 12ms timer that start s upon OC detection. Once an

OC condition is detected, the appropriate ou tput is current

lim ited for 12ms to allow transient conditions to pa ss befo re

latch-off. The time to latch-off is independent of the device’s

thermal or adjacent swit ch’s electrical condition. See Figure

10 for waveforms illustrating independent latch-off.

If, after the ISL6118 has latched off, a nd the fau lt has

asserted and the enable i s not deasserted but the OC

condition st ill exists, the ISL6118 unlike other IC devices

does not send to the contr oller a cont i nuous string of fau lt

pulses. The ISL6118’s single fault signal is sent at the time

of latch off.

Slow and Fast Shutdown

The ISL6118 has two shutdown modes. When disabled

with a load current less than the curren t regulation (CR)

level the ISL6118 shuts down in a controlled manner using

a 500nA constant current sourc e controlled ra mp. When

disabled dur i ng CR or i f th e tim er has expired the I SL6118

quickly pulls down the output thereby qu ickly r emoving the

fa ulte d loa d from the voltage bus. See Figu res 8 and 9 for

illustrative waveforms of each shutdown mode.

Over Temperature Shutd own

Although the ISL6118 has a thermal shutdown feature,

becau se of the 12ms ti med shutdown this will only be

invoked in extremely high ambien t temperatures.

Acti ve Output P ulld ow n

Another uni que ISL6118 f eat ure i s the acti ve pull down on the

outputs to 300mV above GND when the de vice is disabled.

Figure 1 illustrates the ISL6118 operational wa veform s ,

showing the rel atio nshi ps between the various I/ O signals

duri ng typical and faulted conditions. It also graphically

highlight s many of the te rms and modes of operation

referred to in this data sheet.

Usin g the ISL 6118 EVA L1 Pl atf o rm

General and Biasing Information

The IS L6118EVAL1 platform, Figur e 1 4, all ows e v aluat ion o f

the ISL6118 dual power supply control IC and comparison

against a suitably sized PPTC component.

The evaluation platform is biased and monitored through

numerous test points (TP#). See Table 1 for test point

assignments and descriptions.

TABLE 1. ISL6118EV AL1 TEST POINT ASSIGNMENTS

TP # DESCRIPTION

TP1 Eval Board a n d IC GND

TP 2 Ev al Bo ard + 3.3 V Bia s

TP3 Enable Switch 1

TP4 Enable Switch 2

TP5 Swit ch 2 Fault

TP6 Switch Out 2

TP7 Switch Out 1

TP8 Swit ch 1 Fault

TP9 IC VIN Pin

TP10 PPTC Load Side

TP11 Invoke Over Current

ISL6118

Typical Performance Curves

FIGURE 1. OPERATIONAL WAVEFORMS

FIGURE 2. SWITCH ON RESISTANCE AT 0.4A FIG URE 3. VOUT SOFT START vs CL and PROP DELAY, Rl = 8Ω

FIGURE 4. CURRENT REGULATION vs V OUT (VIN = 3.3V) FIGURE 5. CURRENT REGULATION vs VOUT (VIN = 5V)

IOUT

12ms CURRENT REGULATIO N PERIOD

RESET BY

CURRENT REGULATIO N

SETTLING TIME (1.4ms)

ENABLE

0.6A CURRENT

LIMIT

OVERCURRENT

VOUT

OFF

ENABLE

FAULT LATCH-OFF SET

-40-30-20-100 102030405060708090

TEMPERATURE (oC)

100

110

120

100

VIN = 3.3V

VIN = 5V

VIN = 2.7V

SWITCH ON RESISTANCE (mΩ

ΩΩ

Ω)

TIME (400µs /DIV.)VOUT VOLTAGE (0.5V/DIV.)

tPD

CL = 100µF

CL = 10µF

560µs

VOUT

ENABLE

CL=0.1µF

1.25 1.5 1.75 2.0 2.25 2.5 2.75 3.0

VOUT (V)

3.1

IOUT (mA)

500

550

600

650

700

85oC

25oC

-40oC

1.3 1.5 2.0 2.5 3.0 3.5 4.0 4.5

VOUT (V) 4.8

500

550

600

650

700

85oC

-40oC

25oC

IOUT (mA)

ISL6118

FIGURE 6. OC TO CR SETTLING TIME WAV EFORMS FIGURE 7. CR SETTLING TIME vs FAULT CURRENT

FIGURE 8. SLOW TURN-OFF vs CL,Rl=8ΩFIGURE 9. FAST TURN-OFF vs CLOADS

FIGURE 10. SWITCH FA ULT INDEPENDENCE

Typical Performance Curves (Continued)

TIME (200µs/DIV.)

OUTPUT CURRENT (1A/DIV.)

NOMINAL

CURRENT 0.4A

CURRENT REGULATED

LEVEL 0.6A

1 23456789101112

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

FAULT CURRENT (A)

TIME T O CURRENT REGULATION (ms)

VOUT VOLTAGE (0.5V/DIV.) TIME (400µs/DIV.)

CL= 10µF

CL= 100 µF

VOUT

CL= 0.1µF

ENABLE

VOUT VOLTAGE (0.5V/DIV.) TIME (400µs/DIV.)

CL= 10µF

CL= 100µF

VOUT

CL= 0.1µF

V OLTAGE (0.5V/ DIV.) TIME (4m s/DIV.)

VIN

ISL6118 OUT 1

ISL6118 OUT 2

ISL6118

Usin g the ISL 611 8EVAL1 Pl atfor m

Up on prop er b i a s th e P P T C, F1 , ha s a no minal 400 m A load

current passing through it which is the hold current rating for

that particular device. Removal of the PPTC is necessary to

isolate the ISL6118 as the PPTC load current is common to

the ISL6118EVAL1 bias connections.

By enabling either or both of the ISL6118H switches by

signaling TP3 and/or TP4 high (> 2.4V) these switches are

also loaded with a nominal 400mA current.

Provided test points enable the evaluation of voltage loss

across the PPTC (TP9 - TP10) and likewise across the

ISL6118 enabled swi tches (TP9 - TP6 and TP7). Expect to

see 10 0% - 3 00% g reater volt age los s ac ross t he PPTC th an

the ISL6118. See Figure 11 for ISL6118 vs PPTC voltage

loss comparison.

An overcurrent (OC) condition can be invoked on both the

ISL6118 and the PPTC by driVINg TP11 to +6V, causing

SW1 to close and a nominal 0.94mA load is imposed. This

represents a current overload to the ISL6118 and is thus

quickly current regulated to the 600mA limit. If the OC

duration extends beyond the nominal 12ms of the internal

ISL6118 tim er then the output is latched off and the fault

output is asserted by being pulled low turning on the

appropriate FAULT LED. (Please note: the labeling for the

FAULT-1 and FAULT-2 is reversed) The eval board is

designed to only invoke an OC condition on channel 2 (TP4)

so that a channel to channel isolation evaluation in the

pre sence of a n O C condit ion can be evaluated.

The primar y function of any OC protection device is to

quickly isolate the voltage bus from a faulty load. Unlike the

PPTC and other vendor available IC p ro ducts, the ISL6 1 1 8

internal timer that starts upon OC det ection provides

consistent protection that is i ndependent of temperature.

Figures 11 through 13 illustrate the comparative efficiency

and effectiveness of the ISL6118 vs the PPTC in protecting

and isolating a faulty load capable from drooping the system

bus in that system.

FIGURE 11. ISL6118 vs PPTC INTO 8.2Ω LOAD FIGURE 12. ISL6118 vs PPTC INTO 3.5Ω LOAD

FIGURE 13. ISL6118 vs PPTC WITH EXTENDED 3.5Ω LOAD

Typical Performance Curves (Continued)

VO LTAGE (0.5V/DIV.)

VVIN

3.32V

ISL6118

VOUT

3.29 V (0.075Ω)

0.4A HOLD

CURRENT PPTC

2.93V (1.1Ω)

GND

VOLTAGE (0.5V/DI V.) TIME (4 ms/DIV.)

VIN

ISL6118 CR

12ms PERIOD

0.4A HOLD CURRENT PPTC OUT

ISL 6118 OUT

VOLTAG E (0. 5V/ DI V. ) TIME (4s/DI V.)

ISL6118 OUT

0 .4 A HO LD CURRENT PPTC OU T

VIN

2.3V AT 10s

1.5V AT 30s

ISL6118

FIGURE 14. ISL6118EVAL1 SCHEMATIC AND PHOTOGRAPH

EN2 FAULT_OUT2

VIN OUT1

OUT2

EN1ISL6118

(VIN)

ISL6118EVAL1

FAULT_OUT1

D2 D3

R10

SW1

TP2

D4 R9

TP3

TP4

TP9 TP10

TP6

TP7

TABLE 2. ISL6118EVAL1 BOARD COMPONENT LISTI NG

COMPONENT

DESIGNATOR COMPONENT FUNCTION COMPONENT DESCRI P TION

DUT1 ISL6118 Intersil, ISL6118HIB 3.3V Aux Hot Plug Controller

R1 - R3 410mA Nominal Load Resistors YAGEO, 8Ω, 5%, 2W, 8W-2-ND

R4 - R5 97 0mA Current Over Load Resistors YAGE O, 6Ω, 5%, 2W, 6W-2-ND

R6 - R10 LED Current Limiting Resistor 470Ω, 08 05

C1 Decoupling Capacitor 0.1µF, 0805

C2 - C4 Load Capacitor 100µF, 16 V E le ctroly ti c, Ra dial le ad

D1 - D5 Indicating LEDs 0805, SMD LEDs Red

F1 PPTC (Polymer Positive Temperature Coefficient) Raychem, Poly Switch, RXE040 or Equivalent

SW1(Q1) Current Over Load Invoking Switch Access TP11 Fairchild, ITF86110DK8T, 7.5A, 30V, 0.025 Ω, Dual N-channel,

Logic Level Power MOSFET

ISL6118

Implementing Autoreset on the ISL6118H

Hot Swap Controllers.

Abstract

In applic ations where the cos t, complexit y or requirem ent f or

a system controller is avoided and an autonomous power

control function is desired, a device that ca n monitor and

protect against excessive current failures is needed. This

shows how to implement such an autonomous controller

using the ISL6118HIB. This application works only with the

‘H’ version of these devices. The ‘H’ version refers to the

enable function being asserted upon a high input.

Introduction

The ISL 6118, ISL6119 and ISL6121 are all 2.5V t o 5V power

supply controllers, each having a different level of current

regulation (CR). The ISL6118 and ISL6119 have 2

independent controllers with CR levels of 0.6A and 1.0A

respectively whereas the ISL6121 is a single supply

contr oll er with a 2A CR le v e l. Each of these d evi ces f eat ures

integrated power swit ch(es) for power cont rol . E ach switch

is dri ven by a constant curr ent sour ce g iv ing a c ontr olled

ramp up of the ou tput voltage. This provides a soft start

tur n-on eliminating bus voltage drooping caused by in-rush

current whil e char gi ng heavy load cap acitances. The

independent enabling inputs and fault reporting outputs for

each channel ar e ava ilable a nd necessary for the

autonomous autoreset applicati on.

The undervoltage (UV) feature prevents turn-on of the

outputs unless the ENABLE pin and VIN are > 2.5V . During

initial turn-on the ISL6118 pr events fault reporting by

blanking the fault signal. Rising and falling outputs are

current-lim ited voltage ramps so that both the inrush

current and voltage slew rate are limited, independent of

load. This reduces supply droop due to surge and

eliminates the need for external EMI f ilters. During

operation, o nce a n OC co ndition is detected the

appropriate output is current limited to the appropriate l evel

for 10ms to allow transient conditions to pass. If still in

current lim it after the current li mit per iod has ela psed, the

output i s l atched off and t he fault is reported by p ulling the

correspon di ng FAU LT low. The FAULT signal is latched low

until reset by the ENABLE signal being de-as ser ted a t

which ti me the FAULT signal will clear.

It is this described sequence of events that allows for the

autoreset function to be implemented in a cost efficient

ma nne r requi r i ng the addit ion o f only an RC network per

channel to the typical application.

Figure 15 illustrates the RC network needed with suggested

component values and the configuration of the relevant pins

for each autoreset channel.

Description of Operation

Initially as volt age is applied to VIN, the pull up resistor (Rpu)

provides for pull up to VIN on both the ENABLE pin asserting

the output once VIN > 2.5V and on t h e F L T n pi n . O n c e tu rned

on and an ov e r c urre nt (O C ) cond i t ion occur s the IC provides

CR protection f or 10ms and then the FLTn pin pulls low through

Rpu and also pu lling the ENABLE l ow thus resetting th e device

fault condition. At this time the Rpu charges the cap and the

vol tage o n the ENABLE / FLTn node rises until the ENABLE >

2.0 and th e output is asserted on once again. This aut omatic

reset cycl e will continue un til the OC fa u lt no longer exists on

the output. After several seconds in this mode of operation the

IC the rmal pr o te ction in vokes ad jus ti n g th e tim in g of th e o n- off

cycle to pr e vent excess ive thermal diss ipation in the power

s witch protecting itself and surrounding circuitry. See Figure 16

for operation waveform.

Applications

•USB

• 2.5V to 5V up to 10W power port protection

FIGURE 15.

VIN

ENABLE

FLTn

GND

ISL6118H

Rpu = 2k

C = 0.1µ

µµ

µF

FIGURE 16. AUTO RESET OPERATION

IOUT 1 A / DIV

VOUT 2V / DIV

VIN / FLTn 5V / DIV

4ms/DIV

ISL6118

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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.

Acco rdingly, the re ader is cautioned to verify that data sheets are current befor e placing orders. Information furnished by Intersil is believed to be accurate and reliable. How-

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2401 Palm B ay R oad

Palm Bay, FL 329 05

TEL: (321) 724-7000

FAX: (321) 724-7240

EUROPE

Intersil SA

Mercure Center

100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2.724.2111

FAX: (32) 2.724.22.05

ASIA

Intersil Ltd.

8F-2, 96, Sec. 1, Chien-kuo North,

Taipei , Taiwan 104

Re publ ic o f China

TEL: 886-2-2515-8508

FAX: 886-2-2515-8369

ISL6118

Small Outline Plastic Packages (SOIC)

INDEX

AREA E

123

-B-

0.25(0.010) C AMBS

-A-

-C-

SEAT ING PLANE

0.10(0.004)

h x 45o

0.25(0.010) BM M

NOTES:

1. Sy mb ol s are defi ned i n t he “MO Ser ies Sym bol List ” in Secti on 2.2 o f

Pu blicat i on Numb e r 95.

2. Dimensioning and tolerancing per ANS I Y14 .5M-1982.

3. D imens ion “D” do es n ot inc lude mold fl ash, pro trusi ons or gat e bur rs.

Mold flas h, pr otru sion and gat e burrs shall no t exc eed 0.15m m (0.006

inch) per side.

4. D im en sion “ E” does n ot in cl ude int er lea d fl a sh or protru sion s. Inter-

lead f lash a nd protrusio ns shall no t exce ed 0.25 mm (0.01 0 inch) per

side.

5. Th e chamf er on the body is opt ion al. If it is not pr esen t, a v isua l in dex

feature must be located within the crosshatched area.

6. “ L” is the l en gt h o f ter mina l f or sold e ri ng to a subs trate.

7. “ N ” is th e nu m ber of te rmin al po si t io n s.

8. Terminal numbers are shown for reference only.

9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater

above the seating plane, shall not exceed a maximum value of

0. 61 m m (0.024 i nc h).

10. C ontro llin g dimensio n: MILLIMET ER. Con vert ed inch d imens ions

are not necessarily exact.

M8.15 (JEDEC MS-012-AA ISSUE C)

8 LEAD NARROW BODY SMALL OUTLINE PLASTIC

PACKAGE

SYMBOL

INCHES MILLIMETERS

NOTESMIN MAX MIN MAX

A 0.0532 0.0688 1.35 1.75 -

A1 0.0040 0.0098 0.10 0.25 -

B 0.013 0.020 0.33 0.51 9

C 0.0075 0.0098 0.19 0.25 -

D 0.1890 0.1968 4.80 5.00 3

E 0.1497 0.1574 3.80 4.00 4

e 0.050 BSC 1.27 BSC -

H 0.2284 0.2440 5.80 6.20 -

h 0.0099 0.0196 0.25 0.50 5

L 0.016 0.050 0.40 1.27 6

N8 87

α0o8o0o8o-

Rev. 0 12/93