19-0673; Rev 2; 12/14
MAX4947/MAX4948
Hex SPDT Data Switch
EVALUATION KIT AVAILABLE
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
General Description
The MAX4947/MAX4948 analog switches operate from a
single +1.8V to +5.5V supply. These switches feature a
low 30pF (typ) capacitance for high-speed data switch-
ing applications.
The MAX4947 is a triple double-pole/double-throw (DPDT)
switch, and the MAX4748 is a hex single-pole/double-
throw (SPDT) switch with one control logic input. The
MAX4947 has three logic inputs to control the switches in
pairs. The MAX4948 has one logic input and an enable
input (EN) to disable the switches.
The MAX4947/MAX4948 are available in small 24-pin
(4mm x 4mm) TQFN and 25-bump (2.5mm x 2.5mm)
chip-scale packages (UCSP™).
Applications
Benefits and Features
oMultiplex SDIO or Memory Stick Interfaces
oIdeal for High Speed Switching Applications
Low On-Resistance 4Ω(typ)
Low-Capacitance Switches, 30pF (typ)
oMinimize Switching Footprint through High Integration
MAX4947 triple double-pole/double-throw
(DPDT) switch
MAX4748 hex single-pole/double-throw (SPDT)
switch
One control logic input
Small 25-Bump UCSP™ (2.5mm x 2.5mm) or 24-
TQFN (4mm x 4mm)
oWide Supply Capability
1.8V to 5.5V Supply Voltage Range
Rail-to-Rail Signal Handling
MAX4947
S6
S5
COM6
COM5
S4
S3
COM4
COM3
S2
S1
VCC
COM2
COM1
GND
NO1
NC1
NO2
NC2
NO3
NC3
NO4
NC4
NO5
NC5
NO6
NC6
CB12
CB34
CB56
MAX4948
S6
S5
COM6
COM5
S4
S3
COM4
COM3
S2
S1
VCC
COM2
COM1
GND
NO1
NC1
NO2
NC2
NO3
NC3
NO4
NC4
NO5
NC5
NO6
NC6
CB
EN
Functional Diagram
USB Signal Switching
UART Signal Switching
SDIO/Memory Stick
Cell Phones
PDAs
Ordering Information and Typical Operating Circuit appears at
end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
MAX4947/MAX4948
Hex SPDT Data Switch
2Maxim Integrated
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3V, TA= +25°C.) (Notes 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC to GND ...........................................................-0.3V to +6.0V
All other pins to GND (Note 1)......................-0.3V to VCC + 0.3V
Continuous Current
NO_, NC_, COM_ .......................................................±100mA
Peak Current NO_, NC_, COM_
(pulsed at 1ms, 50% Duty Cycle)................................±200mA
(pulsed at 1ms, 10% Duty Cycle)................................±300mA
Continuous Power Dissipation (TA= +70°C)
25-Bump UCSP (derate 12.2mW/°C above +70°C) ....976mW
24-Pin TQFN (derate 20.8mW/°C above +70°C) .......1667mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ........................................................150°C
Storage Temperature Range .............................-65°C to +150°C
Bump Temperature (soldering)
Infrared (15s) ...............................................................+220°C
Vapor Phase (60s) ...........................................................+215°C
Lead Temperature (soldering) .........................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS TAMIN TYP MAX UNITS
POWER SUPPLY
Power-Supply Range VCC TMIN to
TMAX 1.8 5.5 V
VCC = 5.5V, VCB_ = 0V or VCC 1.0
VCC = 2.7V, VCB_ = 1.6V or 0.5V 5Power-Supply Current ICC
VCC = 5.5V, VCB_ = 1.6V or 0.5V
TMIN to
TMAX 10
µA
ANALOG SWITCH
Analog Signal Range VNO_, VNC_,
VCOM_,
TMIN to
TMAX 0V
CC V
+25°C 4.0 5.5
On-Resistance (Note 4) RON VCC = 2.7V, ICOM_ = 10mA;
VNC_ or VNO_ = 0 or VCC TMIN to
TMAX 6.5
Ω
+25°C 0.3 0.5
On-Resistance Match Between
Channels (Notes 4, 5) ΔRON VCC = 2.7V, ICOM_ = 10mA;
VNO_ or VNC_ = 0 or VCC TMIN to
TMAX 0.6
Ω
+25°C 0.5 1
On-Resistance Flatness
(Notes 4, 6) RFLAT VCC = 2.7V, ICOM_ = 10mA;
VNC_ or VNO_ = 0 or VCC TMIN to
TMAX 1.2
Ω
+25°C -3 +3
NO_ or NC_ Off-Leakage
Current
INO_(OFF) or
INC_
(
OFF
)
VCC = 3.6V; VCOM_ = 3.6V, 0;
VNO_ or VNC_ = 0, 3.6V TMIN to
TMAX -10 +10 nA
+25°C -6 +6
COM_ On-Leakage Current INO_
(
ON
)
VCC = 3.6V; VCOM_ = 3.6V, 0;
VNO_ or VNC_ = 3.6V, 0 or
unconnected
TMIN to
TMAX -10 +10 nA
Note 1: Signals on CB_, NO_, NC_, COM_, EN exceeding VCC or GND are clamped by internal diodes. Limit forward-diode current
to maximum current rating.
MAX4947/MAX4948
Hex SPDT Data Switch
3
Maxim Integrated
PARAMETER SYMBOL CONDITIONS TAMIN TYP MAX UNITS
+25°C -6 +6
COM_ Off-Leakage Current ICOM_
(
OFF
)
VCC = 3.6V (MAX4948);
VCOM_ = 3.3V, 0.3V;
VNO_ or VNC_ = 0, 3V, 3.3V
TMIN to
TMAX -10 +10 nA
DYNAMIC
+25°C 400 800
Turn-On Time tON
VCC = 2.7V; VNO_ or VNC_= 1.5V;
RL = 50Ω;
CL = 35pF, Figure 1
TMIN to
TMAX 800 ns
+25°C 300 800
Turn-Off Time tOFF
VCC = 2.7V; VNO_ or VNC_= 1.5V;
RL = 50Ω;
CL = 35pF, Figure 1
TMIN to
TMAX 800 ns
+25°C 100
Break-Before-Make tBBM
VCC = 2.7V; VNO_ or VNC_= 1.5V;
RL = 50Ω; CL = 35pF, Figure 2
(Note 7)
TMIN to
TMAX 2ns
HIGH-SPEED TIMING CHARACTERISTICS (rising time = 20ns)
Skew tSKEW VCC = 2.7V; RS = 39Ω; CL = 50pF,
Figure 3
TMIN to
TMAX 0.2 ns
Charge Injection Q VGEN = 0, RGEN = 0, CL = 1nF ,
Figure 4 +25°C 10 pC
-3dB Bandwidth BW Signal = 0dBm, CL = 5pF,
RL = 50Ω, Figure 5 +25°C 300 MHz
Off-Isolation VISO
CL = 5pF; RL = 50Ω;
VCOM_ = 1VP-P, f = 1MHz,
Figure 5 (Note 8)
+25°C -70 dB
Crosstalk VCT CL = 5pF; RL = 50Ω; f = 1MHz,
VCOM_ = 1VP-P, Figure 5 (Note 9) +25°C -90 dB
NC_ or NO_ Off-Capacitance CNC_(OFF)
CNO_
(
OFF
)
NC_ = NO_ = 0V, f = 1MHz
Figure 6 +25°C 15 pF
COM_ Off-Capacitance C
C OM _
(
OF F
)
VCOM = GND, f = 1MHz
(MAX4948), Figure 6 +25°C 25 pF
COM_ On-Capacitance CCOM_
(
ON
)
COM_ = 0V, f = 1MHz, Figure 6 +25°C 30 pF
DIGITAL I/O (EN, CB_)
Input-Logic High VIH TMIN to
TMAX 1.6 V
Input-Logic Low VIL TMIN to
TMAX 0.5 V
Input Leakage Current ICB VCB_ = 0 or VCC TMIN to
TMAX 1µA
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3V, TA= +25°C.) (Notes 2, 3)
4Maxim Integrated
MAX4947/MAX4948
Hex SPDT Data Switch
Typical Operating Characteristics
(VCC = 3V, TA = +25°C, unless otherwise noted.)
ON-RESISTANCE vs. VCOM
VCOM (V)
ON-RESISTANCE (Ω)
MAX4947/48 toc01
012345
0
5
10
15
20
25
30
35
40
VCC = 1.8V
VCC = 2.0V
VCC = 2.3V
VCC = 2.7V
VCC = 3.0V VCC = 5.0V
ON-RESISTANCE
vs. VCOM TEMPERATURE
VCOM (V)
RON (Ω)
MAX4947/48 toc02
0 0.5 1.0 1.5 2.0 2.5 3.0
0
1
2
3
4
5
6
7
TA = +85°CTA = +25°C
TA = -40°C
VCC = 3V
ON-RESISTANCE
vs. VCOM AND TEMPERATURE
VCOM (V)
RON (Ω)
MAX4947/48 toc03
012345
0
1
2
3
4
5
TA = +85°CTA = +25°C
TA = -40°C
VCC = 5V
NO/NC OFF-LEAKAGE CURRENT
vs. TEMPERATURE
MAX4947/48 toc04
TEMPERATURE (°C)
NO/NC OFF-LEAKAGE CURRENT (nA)
603510-15
0.001
0.01
0.1
1
10
0.0001
-40 85
VCC = 3V
VCC = 3V/5V
VCC = 5V
COM ON-LEAKAGE CURRENT
vs. TEMPERATURE
MAX4947/48 toc05
TEMPERATURE (°C)
COM ON-LEAKAGE CURRENT (nA)
603510-15
0.001
0.01
0.1
1
10
0.0001
-40 85
VCC = 3V
VCC = 3V/5V
VCC = 5V
COM OFF-LEAKAGE CURRENT
vs. TEMPERATURE (MAX4748)
MAX4947/48 toc06
TEMPERATURE (°C)
COM OFF-LEAKAGE CURRENT (nA)
603510-15
0.001
0.01
0.1
1
10
0.0001
-40 85
VCC = 3V
VCC = 3V/5V
VCC = 5V
Note 2: The algebraic convention is used. The most negative value is shown in the minimum column.
Note 3: UCSP parts are 100% tested at TA= +25°C. Limits across the full temperature range are guaranteed by correlation and
design. TQFN parts are guaranteed by correlation and design at TA= --40°C.
Note 4: RON and ΔRON matching specifications are guaranteed by design.
Note 5: ΔRON = RON(MAX) - RON(MIN).
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7: Guaranteed by design, not production tested.
Note 8: Off-Isolation = 20log10 [VCOM_ / (VNO_ or VNC_)], VCOM_ = output, VNO_ or VNC_ = input to off switch.
Note 9: Between any two switches.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.7V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3V, TA= +25°C.) (Notes 2, 3)
5
Maxim Integrated
MAX4947/MAX4948
Hex SPDT Data Switch
CHARGE INJECTION vs. VCOM
VCOM (V)
CHARGE INJECTION (pC)
MAX4947/48 toc07
012345
0
5
10
15
20
25
CL = 1nF
V+ = 5V
V+ = 3V
SUPPLY CURRENT vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (nA)
MAX4947/48 toc08
123456
0
1
2
3
4
5
7
9
11
13
14
6
8
10
12
15
SUPPLY CURRENT vs. TEMPERATURE
TEMPERATURE (°C)
SUPPLY CURRENT (nA)
MAX4947/48 toc09
-40 -15 10 35 60 85
0.1
1
10
100
VCC = 3V
VCC = 5V
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
LOGIC THRESHOLD (V)
MAX4947/48 toc10
1.5 2.5 3.5 4.5 5.5
0
0.4
0.8
1.2
1.6
2.0
VIH
VIL
TURN-ON/-OFF TIME
vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
tON/tOFF (ns)
MAX4947/48 toc11
1.5 2.5 3.5 4.5 5.5
0
300
900
800
700
600
500
400
200
100
1000
tON
tOFF
TURN-ON/-OFF TIMES vs. TEMPERATURE
TEMPERATURE (°C)
tON/tOFF (ns)
MAX4947/48 toc12
-40 -15 10 35 60 85
0
50
100
150
200
250
350
300
400
450
tON, V+ = 3V
tON, V+ = 5V
tOFF, V+ = 3V
tOFF, V+ = 5V
FREQUENCY RESPONSE
MAX4947/48 toc13
FREQUENCY (MHz)
ON-LOSS (dB)
1000.01 1
-120
-100
-80
-60
-40
-20
0
20
-140
0.0001
ON-LOSS
CROSSTALK
OFF-ISOLATION
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
FREQUENCY (kHz)
THD+N (%)
MAX4947/48 toc14
0.01 0.1 1 10 100
0.01
0.1
1
RL = 600Ω
SUPPLY CURRENT vs. LOGIC VOLTAGE
LOGIC VOLTAGE (V)
SUPPLY CURRENT (μA)
MAX4947/48 toc15
0 1.00.5 1.6 2.0 3.0 4.0 5.0 6.0
0
1
2
3
4
5
6
7
VCC = 5.5V
Operating Characteristics (continued)
(VCC = +3V, TA = +25°C, unless otherwise noted.)
MAX4947/MAX4948
Hex SPDT Data Switch
6Maxim Integrated
Pin Description
PIN NAME FUNCTION
MAX4947 MAX4948
TQFN UCSP TQFN UCSP
1 D2 1 D2 NC6 Analog Switch 6. Normally Closed Terminal 6.
2 D1 2 D1 NO5 Analog Switch 5. Normally Open Terminal 5.
3 C1 3 C1 COM5 Analog Switch 5. Common Terminal 5.
4 C2 4 C2 NC5 Analog Switch 5. Normally Closed Terminal 5.
5 B1 — — CB56 Digital Control Input for Analog Switches 5 and 6
6, 21 A1, C3,
D3 6, 21 A1, C3,
D3 GND Ground
7 B2 7 B2 COM4 Analog Switch 4. Common Terminal 4.
8 A2 8 A2 NO4 Analog Switch 4. Normally Open Terminal 4.
9 B3 9 B3 NC4 Analog Switch 4. Normally Closed Terminal 4.
10 A3 10 A3 NO3 Analog Switch 3. Normally Open Terminal 3.
11 A4 11 A4 COM3 Analog Switch 3. Common Terminal 3.
12 B4 12 B4 NC3 Analog Switch 3. Normally Closed Terminal 3.
13 A5 — — CB34 Digital Control Input for Analog Switches 3 and 4
14 B5 — — CB12 Digital Control Input for Analog Switches 1 and 2
15 C4 15 C4 NC2 Analog Switch 2. Normally Closed Terminal 2.
16 C5 16 C5 COM2 Analog Switch 2. Common Terminal 2.
17 D5 17 D5 NO2 Analog Switch 2. Normally Open Terminal 2.
18 D4 18 D4 NC1 Analog Switch 1. Normally Closed Terminal 1.
19 E5 19 E5 NO1 Analog Switch 1. Normally Open Terminal 1.
20 E4 20 E4 COM1 Analog Switch 1. Common Terminal 2.
22 E3 22 E3 VCC Positive Supply Voltage
23 E2 23 E2 COM6 Analog Switch 6. Common Terminal 6.
24 E1 24 E1 NO6 Analog Switch 6. Normally Open Terminal 6.
—— 5 B1EN Enable-Logic In. Drive EN high to set all switches into high-
impedance mode.
— — 13 A5 N.C. No Connection. Leave N.C. unconnected.
— — 14 B5 CB
Digital Control Input for Analog Switches 1–6. Drive CB low to
connect COM_ to NC_ for all six switches. Drive CB high to connect
COM_ to NO_ for all six switches. CB is valid only when EN is driven
low. If EN is driven high then all switches are high impedance.
EP — EP — EP Exposed Pad. Connect exposed pad to ground.
MAX4947/MAX4948
Hex SPDT Data Switch
7
Maxim Integrated
Pin Configurations/Truth Tables
UCSP 2.5mm x 2.5mm
(BUMPS SIDE DOWN) MAX4947
1
+
A
B
C
D
E
2345
GND NO4 NO3 COM3 CB34
CB56 COM4 NC4 NC3 CB12
COM5 NC5 GND NC2 COM2
NO5 NC6 GND NC1 NO2
NO6 COM6 VCC COM1 NO1
23
24
22
21
8
7
9
NO5
NC5
CB56
GND
10
NC6
NO2
NC2
CB12
NC1
CB34
12
VCC
456
1718 16 14 13
COM6
NO6
NO3
NC4
NO4
*EP COM4
MAX4947
COM5 COM2
3
15
GND
20 11 COM3
COM1
19 12 NC3
NO1
TQFN 4mm x 4mm
TOP VIEW
*EXPOSED PADDLE CONNECT TO GROUND
UCSP 2.5mm x 2.5mm
(BUMPS SIDE DOWN) MAX4948
1
A
B
C
D
E
2345
GND NO4 NO3 COM3 N.C.
EN COM4 NC4 NC3 CB
COM5 NC5 GND NC2 COM2
NO5 NC6 GND NC1 NO2
NO6 COM6 VCC COM1 NO1
23
24
22
21
8
7
9
NO5
NC5
EN
GND
10
NC6
NO2
NC2
CB
NC1
N.C.
12
VCC
456
1718 16 14 13
COM6
NO6
NO3
NC4
NO4
*EP COM4
MAX4948
COM5 COM2
3
15
GND
20 11 COM3
COM1
19 12 NC3
NO1
TQFN 4mm x 4mm
TOP VIEW
*EXPOSED PADDLE-CONNECT TO GROUND
MAX4947
CB12 NO1/NO2
ON
0 OFF ON
NC1/INC2
OFF1
NO3/NO4 NC3/NC4CB34
OFF ON0
ON OFF1
NO5/NO6 NC5/NC6CB56
OFF ON0
ON OFF1
MAX4948
EN CB
HIGH
LOW LOW OFF
NO_
ONLOW
X OFF
ON
NC_
OFF
OFFHIGH
+
+
+
MAX4947/MAX4948
Hex SPDT Data Switch
8Maxim Integrated
Timing Circuits/Timing Diagrams
tr < 5ns
tf < 5ns
50%
0V
LOGIC
INPUT
RL
COM_
GND
CB_
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VN_ ( RL )
RL + RON
VN_
VCC
tOFF
0V
NO_
OR NC_
0.9 x V0UT 0.9 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
VCC
CL
VCC
VOUT
MAX4947/
MAX4948
50%
Figure 1. Switching Time
Detailed Description
The MAX4947 triple DPDT and the MAX4948 hex SPDT
analog switches operate from a single +1.8V to
+5.5V supply. These devices are fully specified for +3V
applications.
The MAX4947/MAX4948 have a guaranteed 4Ω(typ) on-
resistance and a low 30pF (typ) capacitance that makes
the switch ideal for data switching applications. The
MAX4947 has three logic inputs to control two switches in
pairs and the MAX4948 has one logic control input and
an enable input (EN) to disable the switches.
Applications Information
Digital Control Inputs
The MAX4947/MAX4948 provide a digital control logic
input, CB_. CB_ controls the position of the switches as
shown in the
Pin Configurations/Truth Tables
. Driving
CB_ rail-to-rail minimizes power consumption.
The MAX4948 features an EN input to turn all switches
on or off. When EN is driven high, CB is disabled, and
the analog inputs enter a high-impedance state. Drive
EN low to turn the switches on and enable CB.
Analog Signal Levels
The on-resistance of the MAX4947/MAX4948 is very low
and stable as the analog input signals are swept
from ground to VCC (see the
Typical Operating
Characteristics
). These switches are bidirectional, allow-
ing NO_, NC_, and COM_ to be configured as either
inputs or outputs.
Power-Supply Biasing
Power-supply bypassing improves noise margin and
prevents switching noise to propagate from VCC supply
to other components. A 0.1µF capacitor connected
from V+ to GND is adequate for most applications.
Power-Supply Sequencing
CMOS devices require proper power-supply sequencing.
Always apply VCC before the analog signals, especially
if the input signal is not current limited.
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, printed circuit
board techniques, bump-pad layout, and recommend-
ed reflow temperature profile, as well as the latest infor-
mation on reliability testing results, go to the Maxim
website at www.maxim-ic.com/ucsp for the Application
Note:
UCSP-A Wafer-Level Chip-Scale Package.
MAX4947/MAX4948
Hex SPDT Data Switch
9
Maxim Integrated
tskew_i
90%
50%
10%
90%
50%
10%
tfi
INPUT A+
INPUT A-
tri
tskew_o
90%
50%
10%
90%
50%
10%
tfo
OUTPUT B+
OUTPUT B-
tro
B-
CL
A-
Rs
A+ B+
CL
TxD+
TxD-
Rs
Rs = 39Ω
CL = 50pF
DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS.
DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS.
CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS.
CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS.
|tskew_i|
|tskew_o|
|tfo - tfi|
|tro - tri|
MAX4947/MAX4948
•
•
•
•
•
•
•
Figure 3. Input/Output Skew Timing Diagram
Timing Circuits/Timing Diagrams (continued)
50%
VCC
0V
LOGIC
INPUT
VOUT 0.9 x VOUT
tBBM
LOGIC
INPUT
RL
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
CB_
NC_ VOUT
VCC
VCC
CL
VN_ COM_
MAX4947/
MAX4948
Figure 2. Break-Before-Make-Interval
MAX4947/MAX4948
Hex SPDT Data Switch
10 Maxim Integrated
VGEN GND
COM_
CL
VOUT
VOUT
CB_
OFF ON OFF
ΔVOUT
Q = (ΔVOUT)(CL)
NC_
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
OFF ON OFF
CB_
VIL TO VIH
VCC
VCC
RGEN
CB_
MAX4947/
MAX4948
OR NO_
Figure 4. Charge Injection
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND OFF NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND ON NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
+5V
VOUT
VCC
CB_
NC1
COM1
NO1*
VCB_
MAX4947/
MAX4948
OFF-ISOLATION = 20log
5
VOUT
VCB_.>
ON-LOSS = 20log
5
VOUT
VCB_.>
CROSSTALK = 20log
5
VOUT
VCB_.>
NETWORK
ANALYZER
50Ω
50Ω50Ω
50Ω
MEAS REF
10nF
0V OR V+
50Ω
GND
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
Timing Circuits/Timing Diagrams (continued)
CAPACITANCE
METER NC_ or
NO_
COM_
GND
CB_ VIL OR VIH
10nF VCC
f = 1MHz
VCC
MAX4947/
MAX4948
Figure 6. On-Loss, Off-Isolation, and Crosstalk
MAX4947/MAX4948
Hex SPDT Data Switch
11
Maxim Integrated
Typical Operating Circuit
MAX4948
S6
S5
COM6
COM5
S4
S3
COM4
COM3
S2
S1
LOGIC
VCC
COM2
COM1
SD
HOST
SD I/O 1
SD I/O 2
ENCB
GND
NO1
NC1
NO2
NC2
NO3
NC3
NO4
NC4
NO5
NC5
NO6
CLK
CMD
DAT0
DAT1
DAT2
DAT3
CLK
CMD
DAT0
DAT1
DAT2
DAT3
NC6
MAX4947/MAX4948
Hex SPDT Data Switch
12 Maxim Integrated
Ordering Information
*
Future product—contact factory for availability.
+
Denotes lead-free package.
EP = Exposed paddle.
PART TEMP RANGE PIN-PACKAGE
MAX4947ERA+* -40°C to +85°C 25 UCSP-25
MAX4947ETG+ -40°C to +85°C 24 TQFN-EP
MAX4948ERA+ -40°C to +85°C 25 UCSP-25
MAX4948ETG+ -40°C to +85°C 24 TQFN-EP
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE OUTLINE NO. LAND
PATTERN NO.
25 UCSP R252A2+1 21-0466
Refer to
Application
Note 1891
24 TQFN-EP T2444+4 21-0139 90-0022
Chip Information
PROCESS: CMOS
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 ________________________________
13
© 2014 Maxim Integrated Products, Inc. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX4947/MAX4948
Hex SPDT Data Switch
Revision History
REVISION
NUMBER
DATE DESCRIPTION PAGES
CHANGED
0 11/06 Initial release —
1 1/07 Updated Ordering Information table 1
2 12/14
Future product asterisk removed, product name updated to MAX4948ERA+
1, 2, 4, 12