39353 ADVANCED DATA SHEET -- 8/29/02 CSP 1 36 CSN VDSTH 2 35 VDD LSS 3 34 CSOUT GLC 4 33 OVSET SC 5 GHC 6 32 ENABLE A3935KLQ 31 CHI CC 7 30 CLO GLB 8 29 BLO SB 9 28 BHI GHB 10 27 AHI CB 11 26 ALO GLA 12 25 ~ FAULT SA 13 24 OVFLT GHA 14 23 UVFLT CA 15 VREG 16 22 VBAT 21 GND VDRAIN 17 20 BOOSTD VBOOST 18 19 BOOSTS [44-pin, PLCC pkg. ED also available] ABSOLUTE MAXIMUM RATINGS Load Supply Voltages, VBAT, VDRAIN, VBOOST, BOOSTD.................. 40 V GHA/GHB/GHC, VGHX ............... -4 to 55 V SA/SB/SC, VSX ..................... -4 to 40 V GLA/GLB/GLC, VGLX ............... -4 to 16 V CSP,CSN, LSS ........................ -4 to 6.5 V CA/CB/CC, VCX ............... -0.6 to 55 V Logic Supply Voltage, VDD ...... - 0.3 V to 6.5 V Logic Input/Outputs and OVSET, BOOSTS, CSOUT, VDSTH ............ -0.3 V to 6.5 V Package Thermal Impedances (TA = +25C) ED pkg: JA (JEDEC Hi-K PCB) ...... 23C/W LQ pkg: JA (JEDEC Hi-K PCB) .......44 C/W Operating Ambient Temperature Range, TA .................... -40 C to +135 C Operating Junction Temperature Range, TJ ............................. -40 C to +150 C Storage Temperature Range, TS ............................ -55 C to +150 C AUTOMOTIVE POWERMOSFET CONTROLLER The A3935 is designed specifically for automotive applications that require high-power motors. The A3935 provides six high-current gate drive outputs capable of driving a wide range of power n-channel MOSFETs. A requirement of automotive systems is steady operation over a varying battery input range. The A3935 integrates a pulse frequency modulated boost converter to create a constant supply voltage for driving the external MOSFETs. Bootstrap capacitors are utilized to provide the above battery supply voltage required for n-channel MOSFETs. Direct control of each gate output is possible via six TTL-compatible inputs. A differential amplifier is integrated to allow accurate measurement of the current in the three-phase bridge. A diagnostic output can be continuously monitored to protect the driver from short-to-battery, short-to-supply, bridge-open, and battery under/overvoltage conditions. Additional protection features include deadtime, VDD undervoltage, and thermal shutdown. FEATURES Drives Wide Range of N-Channel Diagnostic Outputs MOSFETs in 3-Phase Bridges Motor Lead Short-to-Battery, PFM Boost Converter for Use With Short-to-Ground, and Bridge-Open Protection Low-Voltage Battery Supplies Internal LDO Regulator for Gate- Undervoltage Protection Driver Supply -40C to 150C, TJ Operation Bootstrap Circuits for High-Side Gate Thermal Shutdown Drivers Current Monitor Output Adjustable Battery Overvoltage Detection. 3935 Automotive Power-MOSFET Controller Functional Block Diagram (1 of 3 outputs shown) BOOSTD VBAT VBOOST BOOSTS VDRAIN (KELVIN) Low Drop Out Linear Regulator VREG VBAT VIGN Motor Supply Voltage bi OS (off) bv OS (blank) External +5V VDD CA CBOOT AHI Turn ON Delay High Side Driver To Phase C GHA ALO BHI BLO Control Logic SA CHI VREG CLO ENABLE Turn ON Delay Low Side Driver GLA Phase A ~ FAULT OVFLT LSS VBAT Overvoltage VBAT Undervoltage UVFLT VBAT SB CSP cs VREG RSENSE VDD - SA VREG Undervoltage Short to Ground Short to Battery Bridge Open + OVSET CSN VDD Undervoltage Thermal Shutdown GND SC VDSTH Drain-Source Fault Monitor LSS VDD To Phase B VDRAIN 3935 CSOUT 3935 Automotive Power-MOSFET Controller Terminal Descriptions GND. Ground or negative side of VDD and VBAT AHI/BHI/CHI. Direct control of high-side gate outputs supplies. GHA/GHB/GHC. Logic "1" drives the gate "on". Logic "0" pulls the gate down, turning off the external power MOSFET. Internally pulled down when terminal is open. LSS. Low-side gate driver returns. Connects to the common sources in the low-side of the power MOSFET bridge. ALO/BLO/CLO. Direct control of low-side gate outputs GLA/GLB/GLC. Logic "1" drives the gate "on". Logic "0" pulls the gate down, turning off the external power MOSFET. Internally pulled down when terminal is open. OVFLT. Logic "1" means that the VBAT exceeded the VBAT overvoltage trip point set by OVSET level. It will recover after a hysteresis below that maximum value. Has a Hi-Z state. BOOSTD. Boost converter switch drain connection. OVSET. A positive, dc level that controls the VBAT BOOSTS. Boost converter switch source connection Overvoltage trip point. Usually, provided from precision resistor divider network between VDD and GND, but can be held grounded for a preset value. When terminal is open sets unspecified but high overvoltage trip point. CA/CB/CC. High-side connection for bootstrap capacitor, positive supply for high-side gate drive. The bootstrap capacitor is charged to VREG when the output Sx terminal is Low. When the output swings High, the voltage on this pin rises with the output to provide the boosted gate voltage needed for n-channel power MOSFETs. CSN. Input for current-sense, differential amplifier, inverting, negative side. Kelvin connection for ground side of current-sense resistor. CSOUT. Amplifier output voltage proportional to current sensed across an external low-value resistor placed in the ground-side of the power MOSFET bridge. CSP. Input for current-sense differential amplifier, noninverting, positive side. Connected to positive side of sense resistor. ENABLE. Logic "0" disables the gate control signals and switches off all the gate drivers "low" causing a "Coast". Can be used in conjunction with the gate inputs to PWM the load current. Internally pulled down when terminal is open. FAULT\. Diagnostic logic output signal indicates that one or more fault conditions has occurred, when "Low". GHA/GHB/GHC. High-side gate drive outputs for n-ch MOSFET drivers. External series gate resistors can control slew rate seen at the power driver gate; thereby, controlling the di/dt and dv/dt of Sx outputs. GLA/GLB/GLC. Low-side gate drive outputs for external, n-channel MOSFET drivers. External series gate resistors can control slew rate SA/SB/SC. Directly connected to the motor terminals, these pins sense the voltages switched across the load and are connected to the negative side of the bootstrap capacitors. Also, are the negative supply connection for the floating, high-side drivers. UVFLT. Logic "1" means that VBAT is below its minimum value and will recover after a hysteresis above that minimum value. Has a Hi-Z state. [If UVFLT and OVFLT are both in Hi-Z state; then, at least, a Thermal shutdown or VDD Undervoltage has occurred.] VBAT. Battery voltage, positive input and is usually connected to the motor voltage supply. VBOOST. Boost converter output, nominally 16 V, is also input to regulator for VREG. Has internal boost current and boost voltage control loops. In high-voltage systems is approximately one diode drop below VBAT. VDD. Logic supply, positive side. VDRAIN. Kelvin connection for drain-to-source voltage monitor and is connected to high-side drains of MOSFET bridge. High Z when pin is open and registers as a short-toground fault on all motor phases. VDSTH. A positive, dc level that sets the drain-to-source monitor threshold voltage. Internally pulled down when terminal is open. VREG. High-side, gate-driver supply, nominally, 13.5 V. Has low-voltage dropout (LDO) feature. 3935 Automotive Power-MOSFET Controller ELECTRICAL CHARACTERISTICS (unless noted; -40C < Tj < 150C, 7V < VBAT < 16 V, 4.75V < VDD < 5.25V, ENABLE = 22.5 kHz, 50% Duty cycle, two phases active. (*) or Typ. for design guide, only. Neg. current flows out of designated pin.) Characteristics Symbol Test Conditions Min. Typ. Max. Units Power Supply VDD Supply Current IDD All logic inputs = 0 V. 7 mA VBAT Supply Current IBAT All logic inputs = 0 V. 3 mA Battery Voltage Operating Range VBAT See Absolute Maximum Ratings. 7 40 V Bootstrap Diode Forward Voltage VDBOOT IDBOOT = 10 mA 0.8 2 V IDBOOT = 100 mA 1.5 2.3 V Bootstrap Diode Resistance rDBOOT rD(100 mA)=[VD (150) -VD (50]/100 2.5 7.5 Bootstrap Diode Current Limit ILIM 3 V < [VREG - VCX] < 12 V -150 -900 Bootstrap Quiescent Current I CX VCX = 40V, GHx = ON 10 30 uA 2.0 us Bootstrap Refresh Time * VREG Output Voltage 1 VREG Dropout Voltage 2 Gate Drive Avg. Supply Current * VREG Input Bias Current tREFRESH VREG VREGDO IREG IREGBIAS VSX = LOW to guarantee V=+0.5 V refresh of 0.47 uF Boot Cap at Vcx -Vsx = +10 V. VBAT=7 V to 40 V, Vboost from Boost Reg. 12.7 VREGDO = Vboost - Vreg, Ireg = 40 mA - mA 14 0.9 V - V 40 mA 4 mA 14.9 16.3 V 35 180 mV 3.3 300 mA 0.45 0.55 V No external dc load at Vreg. Creg=10 uF. Current into VBOOST, ENABLE = 0. Boost Supply VBOOST Output Voltage Limit VBOOSTLIM VBOOST Output Volt. Limit Hysteresis VHYST Boost Switch ON rDS(on) Max. Boost Switch Current VBAT = 7 V IBOOSTD < 300 mA. 1.4 IBOOST_SW Boost Current Limit Threshold Volt. VBI OFF Time tOFF 3 8 uS tBLANK 100 220 nS Blanking Time Increasing VBOOSTS Footnotes: 1) For Vboostlim < Vboost < 40 V power dissipation in the Vreg LDO increases. Observe Tj < 150C limit. 2) With Vboost decreasing Dropout Voltage measured at VREG = VREGref - 200 mV where VREGref = VREG at Vboost= 16 V. 3935 Automotive Power-MOSFET Controller Characteristics Symbol Test Conditions Min. Typ. Max. Units Control Logic Logic Input Voltages Logic Input Currents VIN (1) Minimum high level input for logical "one". 2.0 - - V VIN (0) Maximum low level input for logical "zero". - - .8 V IIN (1) VIN = VDD - 500 A IIN (0) VIN = 0.8 V 50 Input Hysteresis Vhys Logic Output HIGH Voltage Voh Ioh = - 800 uA Logic Output LOW Voltage Vol Iol = 1.6 mA A 100 200 VDD -.8 mV V .4 V Gate Drives, GHx, GLx ( internal SOURCE or upper switch stages) Output HIGH Voltage VDSL(HI) Source Current (pulsed) IxU Source ON Resistance rSDU(on) GHx: IxU = -10 mA, Vsx=0 VREG - 2.26 VREG V GLx: IxU = -10 mA, Vlss=0 VREG - 0.26 VREG V VSDU = 10 V, Tj = 25 C 800 mA VSDU = 10 V, Tj = 135 C 400 IxU = -150 mA, Tj = 25 C 4 10 IxU = -150 mA, Tj = 135 C 7 15 mA Gate Drives, GHx, GLx ( internal SINK or lower switch stages) Sink Current (pulsed) IxL Sink ON Resistance rDSL(on) VDSL = 10 V, Tj = 25 C 850 mA VDSL = 10 V, Tj = 135 C 550 IxL = +150 mA, Tj = 25 C 1.8 6.0 IxL = +150 mA, Tj = 135 C 3.0 7.5 mA Gate Drives, GHx, GLx (General) Propagation Delay, Logic only tPROP Logic input to unloaded GHx, GLx 150 nS Prop Delay Differences tPROP Grouped by edge, phase-to-phase. 50 nS Dead Time (Shoot-through Prevention) tDEAD Between GHx, GLx transitions of same phase 180 nS Notes: For GHX: VSDU = VCX - VGHX . For GLX: VSDU = VREG - VGLX . VDSL = VGHX - VSX . VDSL = VGLX - VLSS . VDSL(HI) = VDSL(HI) = VCX - VSDU - VSX . VREG - VSDU - VLSS . 75 3935 Automotive Power-MOSFET Controller Characteristics Symbol Test Conditions Min. Typ. Max. Units Sense Amplifier Input Bias Current IBIAS CSP=CSN=0 V. -360 -180 uA Input Offset Current IOS CSP=CSN=0 V. -35 35 uA Input Impedance * RIN CSP with respect to gnd. 80 k CSN with respect to gnd. 4 k Diff. Input Operating Voltage * VID VID = CSP - CSN. -1.3V < CSP,N < 4V. Output Offset Voltage VOSOUT CSP=CSN=0V Output Offset Voltage Drift * VOSOUT CSP=CSN=0V 77 VCM CSP = CSN Voltage Gain AV VID = 40 mV to 200 mV 18.6 -25 Verr Vid = 0 to 40 mV, Vout = 19.2*Vid + Vos + Verr DC Common Mode Gain ACM CSP = CSN = +200 mV Output Impedance * ROUT VCSOUT = 2.0 V Output Dynamic Range Output Current, Sink VCSOUT ICSOUT = -100 uA at top rail, 100 uA at bottom rail. mV 450 mV 100 Input Common Mode Oper. Range * Low Output Voltage Error 250 200 -1.5 19.2 uV/C 4 V 19.8 V/V +25 mV -28 dB 8 0.075 VDD .25 V ISINK VCSOUT = 2.5 V 20 mA Output Current, Source ISOURCE VCSOUT = 2.5 V -1 mA VDD Supply Ripple Gain PSRG CSP=CSN=GND. Freq = 0 to 1 MHz -20 dB VREG Supply Ripple Gain PSRG CSP=CSN=GND. Freq = 0 to 300 kHz -45 dB Small Signal 3-dB Bandwidth ( * ) B 10 mv input AC Common-Mode Gain Acm Vcm = 250 mV/pp, Freq = 0 to 800 kHz | Output Slew Rate | SR 200 mV step input. Meas. 10/90 % points. 1.6 MHz -26 10 dB V/us 3935 Automotive Power-MOSFET Controller Characteristics Symbol Test Conditions Min. Typ. Max. Units Fault Logic VDD Under-voltage VUVDD Decreasing VDD 3.8 4.3 V VDD Under-voltage Hysteresis VHYSDD VUVDD_RECOVERY = VUVDD + VHYSDD 100 300 mV OVSET Operating Voltage Range * VOVSET 0 VDD V OVSET Calibrated Voltage Range VOVSET 0 2.5 V OVSET Input Current Range IOVSET -1 +1 uA VBAT Over-voltage Range VOVBAT 0 V < VOVSET < 2.5 19.4 40 V VBAT Over-voltage VOVBAT Increasing VBAT , VOVSET = 0 v 19.4 VBAT Over-voltage Hysteresis VHYSOVBAT Percent of VOVBAT value set by VOVSET VBAT Over-voltage Gain Constant * KOVBAT VOVBAT = ( KOVBAT VOVSET ) + VOVBAT [0] VBAT Under-voltage VUVBAT Decreasing VBAT 5 VHYSUVBAT Percent of VUVBAT VREG Under-voltage VUVREG Decreasing VREG VDSTH Input Range * VDSTH VDSTH Input Current IDSTH VDSTH > 0.8 V Short-to-Ground Threshold VSTG Short-to-Battery Threshold VSTB VBAT Under-voltage Hysteresis VDRAIN /Open Bridge Operating Range 9 V 15 % V 8 12 % 9.9 11.1 V 0.5 3 V 40 100 uA With a High-side driver "on", as VSX decreases, VDRAIN - VSX > VSTG causes a fault. VDSTH -0..3 VDSTH + 0.2 V With a Low-side driver "on", as VSX increases, VSX - VLSS > VSTB causes a fault. VDSTH -0.3 VDSTH + 0.2 V VBAT+ 2 V -0.3 VDRAIN /Open Bridge Leakage Curr. I (V DRAIN) 7 V < VBAT < 40 V. 0 VDRAIN /Open Bridge Threshold Volt. V BDGOTH If VDRAIN < VBDGOTH then a Bridge fault occurs. 5.25 V/V 5.5 7 V < VBAT < 40 V Thermal Shutdown Hysteresis * 25.4 12 VDRAIN Thermal Shutdown Temp. * 22.4 1 TJ 160 170 TJ 7 10 1.0 mA 3 V 180 C 13 C 3935 Automotive Power-MOSFET Controller Functional Description Motor Lead Protection. A fault detection circuit OVFLT. Asserts "High" when a VBAT Overvoltage fault monitors the voltage across the drain to source of the external MOSFETs. A fault is asserted "Low" on the output pin, FAULT\, if the voltage across the drain-to-source of any MOSFET that is instructed to turn on is greater than the voltage applied to the VDSTH input terminal. When a highside switch is turned on, the voltage from pin VDRAIN to the appropriate motor phase output, VSX, is examined. If the motor lead is shorted to ground before the high side is turned on, the measured voltage will exceed the threshold and the FAULT\ pin will be go "Low". Similarly, when a low-side MOSFET is turned on, the differential voltage between the motor phase (drain) and the LSS pin (source) is monitored. The VDSTH voltage is set by a resistor divider to VDD. occurs and resets after a recovery hysteresis. It has a Hi-Z state when a thermal shutdown or VDD undervoltage occurs. The voltage at the OVSET pin, VOVSET, controls the VBAT overvoltage set point VOVBAT, i.e., Pin VDRAIN is intended to be a Kelvin connection for the high-side, drain-source monitor circuit. Voltage drops across the power bus are eliminated by connecting a private PCB trace from the VDRAIN pin to the drain of the MOSFET bridge. This allows improved accuracy in setting the VDSTH threshold voltage. The low-side, drain-source monitor uses the LSS pin, rather than VDRAIN pin, in comparing against the VDSTH voltage. VOVBAT = ( KOVBAT VOVSET ) + VOVBAT[0], where KOVBAT is the gain and VOVBAT[0] is the value of VOVBAT when VOVSET is zero. For valid formula, all variables must be in range and below maximum operating spec. UVFLT. Asserts "High" when a VBAT undervoltage fault occurs and resets after a recovery hysteresis. It has a Hi-Z state when a thermal shutdown or VDD undervoltage occurs. OVFLT and UVFLT are mutually exclusive by definition. Current Sensing. A current sense amplifier is provided to allow system monitoring of the load current. The differential amplifier inputs are intended to be Kelvin connected across a low-value sense resistor or current shunt. The output voltage is represented by: VCSOUT = ( ILOAD AV RSENSE ) + VOS The A3935 merely reports these motor faults. Where VOS is output voltage calibrated at zero load current and AV = diff amp gain of about 19. Fault Outputs. Transient faults on any of the fault outputs are to be expected during switching and will not disable the gate drive outputs. External circuitry or controller logic must determine if the faults represent a hazardous condition. Shutdown. If a fault occurs because of excessive junction temperature or undervoltage on V DD or VBAT, all gate driver outputs are driven "Low" until the fault condition is removed. In addition, the boost supply switch and the VREG are turned "off" until those undervoltages and junction temperatures recover. FAULT\. The FAULT\ terminal will go active "Low" when any of the following conditions occur: VBAT Overvoltage VBAT Undervoltage VREG Undervoltage Motor Lead Short-to-Ground Motor Lead Short-to-Supply (or Battery). Bridge (or VDRAIN) Open VDD Undervoltage Thermal Shutdown Boost Supply. The VBOOST voltage is controlled by an inner current-control loop, and by an outer voltage-feedback loop. The current-control loop turns "off" the boost switch for 5 us whenever the voltage across the boost current-sense resistor exceeds 500 mV. A diode reverse-recovery current flows through the sense resistor whenever the boost switch turns "on" that could turn it "off", again, if not for the "blanking time" circuit. Adjustment of this external sense resistor determines the maximum current in the inductor. Whenever VBOOST exceeds the predefined threshold, nominally 16 V, the boost switch is inhibited. 3935 Automotive Power-MOSFET Controller Input Logic. Enable 0 1 1 1 1 (x)LO X 0 0 1 1 (x)HI X 0 1 0 1 GL(x) 0 0 0 1 0 GH(x) 0 0 1 0 0 Mode of Operation All gate-drive outputs Low All gate drive outputs Low High Side On Low Side On XOR feature prevents shoot-through. Fault Responses. FAULT MODE ENABLE FAULT\ OVFLT UVFLT No Fault Short-to-Battery Short-to-Ground VREG Undervoltage VDD Undervoltage or Thermal Shutdown ! Bridge (VDRAIN) Fault VBAT Overvoltage VBAT Undervoltage ! X 1* 1* X X 1 0 0 0 0 0 0 0 0 Z 0 0 0 0 Z BOOST REG. ON ON ON ON OFF 1* X X 0 0 0 0 1 0 0 0 1 ON OFF* O FF VREG REG. ON ON ON ON OFF ON ON OFF GHX GLX 0 0 0 0 Notes: OFF* = Off, only because VBOOST ~ VBAT is above the voltage threshold of the regulator's voltage control loop. x = "little x "indicates A, B, or C phase. X = "Capital X " indicates a "don't care". - = Depends on (x)LO, (x)HI inputs and ENABLE. Z = Tri-stated output. 1* = Short-to-Battery can only be detected when the corresponding GLX = 1. Similarly, Short-to-Ground can only be detected when the corresponding GHX = 1. Bridge Fault appears as a Short-to-Ground Fault on all motor phases. These faults are not detected when ENABLE = 0 ! = These Faults are not only reported but action is taken by the internal logic to protect the 3935 and the system. 3935 Automotive Power-MOSFET Controller Terminal List LQ pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 - Pin Name CSP VDSTH LSS GLC SC GHC CC GLB SB GHB CB GLA SA GHA CA VREG VDRAIN VBOOST BOOSTS BOOSTD GND VBAT UVFLT OVFLT FAULT\ ALO AHI BHI BLO CLO CHI ENABLE OVSET TP CSOUT VDD CSN GND Pin Description Current-sense input, positive-side DC Input, Drain-to-Source Monitor Threshold Voltage Low-Side, Gate Drive Source returns Low-Side C Gate Drive Output Motor Phase C Input High-Side C Gate Drive Output Bootstrap C Cap Low-Side B Gate Drive Output Motor Phase B Input High-Side B Gate Drive Output Bootstrap B Cap Low-Side A Gate Drive Output Motor Phase A Input High-Side A Gate Drive Output Bootstrap A Cap Gate Drive Supply, Positive Kelvin Connection to MOSFET High-Side Drain Boost Supply Output Boost Switch, Source Boost Switch, Drain Ground, DC Supply Returns, Negative Battery Supply Connection, Positive VBAT Undervoltage Fault VBAT Overvoltage Fault Fault Output, Primary Gate Control Signal, A, Low-Side Gate Control Signal, A, High-Side Gate Control Signal, B, High-Side Gate Control Signal, B, Low-Side Gate Control Signal, C, Low-Side Gate Control Signal, C, High-Side Gate Output Enable DC Input, Overvoltage Threshold Setting for VBAT Test Point for manufacturing test use, only. Current-Sense Amplifier Output Logic Supply, Positive Current-Sense Input, Negative-Side GROUND, DC Supply Returns, Negative. Heat Path, Die Attach, Connected to Chip GND at Terminal 12. ED pin # 31 32 33 36 37 38 39 40 41 42 43 44 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 21 24 25 26 27 28 29 30 1,2,11,12,22, 23,34,35