LTC2942 Battery Gas Gauge with Temperature, Voltage Measurement Features n n n n n n n n n n n n Description Indicates Accumulated Battery Charge and Discharge High Accuracy Analog Integration ADC Measures Battery Voltage and Temperature Integrated Temperature Sensor High Side Sense 1% Voltage and Charge Accuracy 50mV Sense Voltage Range SMBus/I2C Interface Configurable Alert Output/Charge Complete Input 2.7V to 5.5V Operating Range Quiescent Current Less than 100A Small 6-Pin 2mm x 3mm DFN package Applications n n n n n Low Power Handheld Products Cellular Phones MP3 Players Cameras GPS The LTC(R)2942 measures battery charge state, battery voltage and chip temperature in handheld PC and portable product applications. Its operating range is perfectly suited for single-cell Li-Ion batteries. A precision coulomb counter integrates current through a sense resistor between the battery's positive terminal and the load or charger. Battery voltage and on-chip temperature are measured with an internal 14-bit No Latency TM ADC. The three measured quantities (charge, voltage and temperature) are stored in internal registers accessible via the onboard SMBus/I2C interface. The LTC2942 features programmable high and low thresholds for all three measured quantities. If a programmed threshold is exceeded, the device communicates an alert using either the SMBus alert protocol or by setting a flag in the internal status register. The LTC2942 requires only a single low value sense resistor to set the measured current range. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and No Latency , ThinSOT and Bat-Track are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Total Charge Error vs Differential Sense Voltage 2.0 LOAD 0.1F SENSE+ I2C/SMBus TO HOST LTC2942 AL/CC SDA SENSE- SCL GND RSENSE 100m + 1-CELL Li-Ion 2942 TA01a CHARGE ERROR (%) CHARGER VSENSE+ = 3.6V 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 0.1 1 10 100 VSENSE (mV) 2942 TA01b 2942fa 1 LTC2942 Absolute Maximum Ratings (Notes 1, 2) Pin Configuration Supply Voltage (SENSE+).............................. -0.3V to 6V SCL, SDA, AL/CC.......................................... -0.3V to 6V SENSE-................................... -0.3V to (VSENSE+ + 0.3V) Operating Ambient Temperature Range LTC2942C................................................. 0C to 70C LTC2942I.............................................. -40C to 85C Storage Temperature Range.................... -65C to 150C TOP VIEW 6 SENSE- SENSE+ 1 GND 2 7 5 AL/CC 4 SDA SCL 3 DCB PACKAGE 6-LEAD (2mm x 3mm) PLASTIC DFN TJMAX = 150C, JA = 120C/W EXPOSED PAD (PIN 7), DO NOT CONNECT Order Information Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2942CDCB#TRMPBF LTC2942CDCB#TRPBF LDVN 6-Lead (2mm x 3mm) Plastic DFN 0C to 70C LTC2942IDCB#TRMPBF LTC2942IDCB#TRPBF LDVN 6-Lead (2mm x 3mm) Plastic DFN TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ -40C to 85C Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Requirements VSENSE+ Supply Voltage ISUPPLY Supply Current (Note 3) 2.7 5.5 Battery Gas Gauge On, ADC Sleep 70 100 A Battery Gas Gauge On, ADC Converting Voltage l 300 350 A Battery Gas Gauge On, ADC Converting Temperature l 350 420 A 2.5 A 1 A 2.7 V 50 mV Shutdown l Shutdown, VSENSE+ 4.2V VUVLO Undervoltage Lockout Threshold V l VSENSE+ Falling l VSENSE+ - VSENSE- l 2.5 2.6 Coulomb Counter VSENSE Sense Voltage Differential Input Range RIDR Differential Input Resistance, Across SENSE+ and SENSE- (Note 8) 400 k 2942fa 2 LTC2942 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (Note 2) SYMBOL PARAMETER CONDITIONS qLSB Charge LSB (Note 4) Prescaler M = 128 (Default), RSENSE = 50m TCE Total Charge Error (Note 5) 10mV |VSENSE| 50mV DC MIN TYP MAX 0.085 UNITS mAh 1 % 10mV |VSENSE| 50mV DC, VSENSE + 4.2V l 1.5 % 1mV |VSENSE| < 50mV DC (Note 8) l 3.5 % (Note 8) l Voltage Measurement ADC Resolution (No Missing Codes) VFS Full-Scale Voltage VLSB Quantization Step of 14-Bit Voltage ADC TUEV Voltage Total Unadjusted Error 14 l (Note 6) Bits 6 V 366.2 V 1 1.3 l Gain Gain Accuracy VOS Offset INL Integral Nonlinearity l tCONV Conversion Time l 1.3 % 1 10 LSB 1 4 LSB 15 ms l Extrapolated from Measurements at 5.5V and 2.7V % % Temperature Measurement ADC Resolution (No Missing Code) (Note 8) TFS Full-Scale Temperature TLSB Quantization Step of 10-Bit Temperature ADC (Note 6) TUET Temperature Total Unadjusted Error VSENSE+ 2.8V (Note 8) tCONV Conversion Time 10 l Bits 600 K 0.586 K l 5 3 K K l 15 ms Digital Inputs and Digital Outputs VITH Logic Input Threshold, AL/CC, SCL, SDA l VOL Low Level Output Voltage, AL/CC, I = 3mA SDA l IIN Input Leakage, AL/CC, SCL, SDA VIN = VSENSE+/2 CIN Input Capacitance, AL/CC, SCL, SDA (Note 8) tPCC Minimum Charge Complete (CC) Pulse Width 0.3 * VSENSE+ 0.7 * VSENSE+ V 0.4 V l 1 A l 10 pF 1 s I2C Timing Characteristics fSCL(MAX) Maximum SCL Clock Frequency l tBUF(MIN) Bus Free Time Between STOP/ START l 1.3 s tSU,STA(MIN) Minimum Repeated START Set-Up Time l 600 ns tHD,STA(MIN) Minimum Hold Time (Repeated) START Condition l 600 ns tSU,STO(MIN) Minimum Set-Up Time for STOP Condition l 600 ns tSU,DAT(MIN) Minimum Data Set-Up Time Input l 100 ns tHD,DATI(MIN) Minimum Data Hold Time Input l 0 s 400 900 kHz 2942fa 3 LTC2942 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (Note 2) SYMBOL PARAMETER tHD,DATO Data Hold Time Output tOF Data Output Fall Time CONDITIONS MIN (Notes 7, 8) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive, all voltages are referenced to GND unless otherwise specified Note 3: ISUPPLY = ISENSE+ + ISENSE- Note 4: The equivalent charge of an LSB in the accumulated charge register depends on the value of RSENSE and the setting of the internal prescaling factor M: qLSB = 0.085mAh * TYP MAX UNITS l 0.3 0.9 s l 20 + 0.1 * CB 300 ns Note 5: Deviation of qLSB from its nominal value. Note 6: The quantization step of the 14-bit ADC in voltage mode and 10-bit ADC in temperature mode is not to be mistaken with the LSB of the combined 16-bit voltage registers (I, J) and 16-bit temperature registers (M, N). Note 7: CB = Capacitance of one bus line in pF (10pF CB 400pF). See Voltage and Temperature Registers section for more information. Note 8: Guaranteed by design, not subject to test. 50m M * RSENSE 128 See Choosing RSENSE and Choosing Coulomb Counter Prescaler M section for more information. 1mAh = 3.6C (coulombs). TIMING DIAGRAM tof SDA tSU, DAT tHD, DATO, tHD, DATI tSU, STA tHD, STA tBUF tSU, STO 2942 F01 SCL tHD, STA START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Figure 1. Definition of Timing on I2C Bus 2942fa 4 LTC2942 Typical Performance Characteristics Total Charge Error vs Differential Sense Voltage Total Charge Error vs Supply Voltage CHARGE ERROR (%) 1 0 1.00 0.75 0.75 0.50 0.50 0.25 0 -0.25 -1 -0.50 -2 -0.75 VSENSE+ = 2.7V VSENSE+ = 4.2V -3 0.1 1 10 -1.00 100 3.0 3.5 VSENSE (mV) 4.0 4.5 5.0 VSENSE+ (V) 5.5 2942 G01 6.0 3.5 4.0 4.5 5.0 VSENSE+ (V) 5.5 75 100 8 1.0 TA = 25C TA = -40C TA = 85C 50 6.0 0 2.5 3.0 3.5 4.0 4.5 5.0 VSENSE+ (V) 5.5 2942 G04 6.0 6 TA = 85C 4 2 0 TA = -45C -2 -4 -6 TA = 25C -8 -10 2.5 3.0 3.5 4.0 4.5 5.0 VSENSE- (V) 2942 G05 Voltage Measurement ADC Integral Nonlinearity 5.5 6.0 2942 G06 Temperature Error vs Temperature 1.0 3 TA = 85C 2 TEMPERATURE ERROR (C) 3.0 25 50 0 TEMPERATURE (C) 10 0.5 40 2.5 -25 2942 G03 2.0 ISHUTDOWN (A) 60 0.5 INL (VLSB) ISUPPLY (A) 70 -1.00 -50 VSENSE = -50mV VSENSE = -10mV Voltage Measurement ADC Total Unadjusted Error 1.5 80 -0.50 Shutdown Supply Current vs Supply Voltage TA = 25C TA = -40C TA = 85C 90 -0.25 2942 G02 Supply Current vs Supply Voltage 100 0 -0.75 VSENSE = -50mV VSENSE = -10mV 2.5 0.25 TOTAL UNADJUSTED ERROR (mV) CHARGE ERROR (%) 2 Total Charge Error vs Temperature 1.00 CHARGE ERROR (%) 3 0 TA = -40C TA = 25C -0.5 1 0 -1 -2 -1.0 2.5 3.0 3.5 4.0 4.5 5.0 VSENSE- (V) 5.5 6.0 2942 G07 -3 -50 -25 0 25 50 TEMPERATURE (C) 75 100 2942 G08 2942fa 5 LTC2942 Pin Functions SENSE+ (Pin 1): Positive Current Sense Input and Power Supply. Connect to the load/charger side of the sense resistor. VSENSE+ operating range is 2.7V to 5.5V. GND (Pin 2): Device Ground. Connect directly to the negative battery terminal. SCL (Pin 3): Serial Bus Clock Input. SDA (Pin 4): Serial Bus Data Input and Output. AL/CC (Pin 5): Alert Output or Charge Complete Input. Configured either as an SMBus alert output or charge complete input by control register bits B[2:1]. At power-up, the pin defaults to alert mode conforming to the SMBus alert response protocol. It behaves as an open-drain logic output that pulls to GND when any threshold register value is exceeded. When configured as a charge complete input, connect to the charge complete output from the battery charger circuit. A high level at CC sets the value of the accumulated charge (registers C, D) to FFFFh. SENSE- (Pin 6): Negative Current Sense Input. Connect SENSE- to the positive battery terminal side of the sense resistor. The voltage between SENSE- and SENSE+ must remain within 50mV in normal operation. SENSE- is also the input for the ADC in voltage measurement mode. Exposed Pad (Pin 7): Do Not Connect. Block Diagram 1 SENSE+ LTC2942 VSUPPLY COULOMB COUNTER REF TEMPERATURE SENSOR 6 2 SENSE- MUX CC CLK REFERENCE GENERATOR OSCILLATOR REF+ CLK IN ACCUMULATED CHARGE REGISTER AL I2C/ SMBus AL/CC SCL SDA ADC 5 3 4 DATA AND CONTROL REGISTERS REF- GND 2942 BD 2942fa 6 LTC2942 Operation Overview The LTC2942 is a battery gas gauge device designed for use with single Li-Ion cells and other battery types with a terminal voltage at 2.7V to 5.5V. It measures battery charge and discharge, battery voltage and chip temperature. A precision coulomb counter integrates current through a sense resistor between the battery's positive terminal and the load or charger. Battery voltage and on-chip temperature are measured with an internal 14-bit/10-bit ADC. Coulomb Counter Charge is the time integral of current. The LTC2942 measures battery current by monitoring the voltage developed across a sense resistor and then integrates this information to infer charge. The differential voltage between SENSE+ and SENSE- is applied to an auto-zeroed differential analog integrator to convert the measured current to charge. When the integrator output ramps to REFHI or REFLO levels, switches S1, S2, S3 and S4 toggle to reverse the ramp direction. By observing the condition of the switches and the ramp direction, polarity is determined. CHARGER LOAD 1 SENSE+ BATTERY The LTC2942 includes a 14-bit No Latency analog-todigital converter, with internal clock and voltage reference circuits. The ADC can either be used to monitor the battery voltage at SENSE- or to convert the output of the on-chip temperature sensor. The sensor generates a voltage proportional to temperature with a slope of 2.5mV/K resulting in a voltage of 750mV at 27C. Conversion of either temperature or voltage is triggered by setting the control register via the I2C interface. The LTC2942 features an automatic mode where a voltage and a temperature conversion are executed every two seconds. At the end of each conversion the corresponding registers are updated and the converter goes to sleep to minimize quiescent current. REFHI VCC S1 S3 6 + Voltage and Temperature ADC - + CONTROL LOGIC - S2 RSENSE IBAT A programmable prescaler effectively increases integration time by a factor M programmable from 1 to 128. At each underflow or overflow of the prescaler, the accumulated charge register (ACR) value is incremented or decremented one count. The value of accumulated charge is read via the I2C interface. 2 SENSE - M PRESCALER + + S4 GND ACR REFLO - POLARITY DETECTION 2942 F02 Figure 2. Coulomb Counter Section of the LTC2942 2942fa 7 LTC2942 Operation Power-Up Sequence When SENSE+ rises above a threshold of approximately 2.5V, the LTC2942 generates an internal power-on reset (POR) signal and sets all registers to their default state. In the default state, the coulomb counter is active while the voltage and temperature ADC is switched off. The accumulated charge register is set to mid-scale (7FFFh), all low threshold registers are set to 0000h and all high threshold registers are set to FFFFh. The alert mode is enabled and the coulomb counter prescaling factor M is set to 128. Applications Information I2C/SMBus Interface The LTC2942 communicates with a bus master using a 2-wire interface compatible with I2C and SMBus. The 7-bit hard-coded I2C address of the LTC2942 is 1100100. The LTC2942 is a slave-only device. Therefore the serial clock line (SCL) is an input only while the serial data line (SDA) is bidirectional. The device supports I2C standard and fast mode. For more details refer to the I2C Protocol section. Internal Registers The LTC2942 integrates current through a sense resistor, measures battery voltage and temperature and stores the results in internal 16-bit registers accessible via I2C. High and low limits can be programmed for each measurement quantity. The LTC2942 continuously monitors these limits and sets a flag in the onboard status register when a limit is exceeded. If the alert mode is enabled, the AL/CC pin pulls low. The sixteen internal registers are organized as shown in Table 1. Table 1. Register Map ADDRESS NAME REGISTER DESCRIPTION R/W DEFAULT 00h A Status R See Below 01h B Control R/W 3Ch 02h C Accumulated Charge MSB R/W 7Fh 03h D Accumulated Charge LSB R/W FFh 04h E Charge Threshold High MSB R/W FFh 05h F Charge Threshold High LSB R/W FFh 06h G Charge Threshold Low MSB R/W 00h 07h H Charge Threshold Low LSB R/W 00h 08h I Voltage MSB R XXh 09h J Voltage LSB R XXh 0Ah K Voltage Threshold High R/W FFh 0Bh L Voltage Threshold Low R/W 00h 0Ch M Temperature MSB R XXh 0Dh N Temperature LSB R XXh 0Eh O Temperature Threshold High R/W FFh 0Fh P Temperature Threshold Low R/W 00h R = Read, W = Write, XX = Unknown 2942fa 8 LTC2942 Applications Information Status Register (A) The status of the charge, voltage and temperature alerts is reported in the status register shown in Table 2. Table 2. Status Register A (Read only) BIT NAME A[7] Chip Identification OPERATION DEFAULT 0: LTC2942 1: LTC2941 0 A[6] Reserved 0 A[5] Accumulated Charge Indicates that the value of the Overflow/Underflow ACR hit either top or bottom. 0 A[4] Temperature Alert Indicates one of the temperature limits was exceeded. 0 A[3] Charge Alert High Indicates that the ACR value exceeded the charge threshold high limit. 0 A[2] Charge Alert Low Indicates that the ACR value dropped below the charge threshold low limit. 0 A[1] Voltage Alert Indicates one of the battery voltage limits was exceeded. 0 A[0] Undervoltage Lockout Alert Indicates recovery from undervoltage. If set to 1, a UVLO has occurred and the contents of the registers are uncertain. X All status register bits except A[7] are cleared after being read by the host, if the conditions which set these bits have been removed. As soon as one of the three measured quantities exceeds the programmed limits, the corresponding bit A[4], A[3], A[2] or A[1] in the status register is set. Bit A[5] is set if the LTC2942's accumulated charge registers (ACR) overflows or underflows. In these cases, the ACR stays at FFFFh or 0000h and does not roll over. The undervoltage lockout (UVLO) bit of the status register A[0] is set if, during operation, the voltage on SENSE+ pin drops below 2.7V without reaching the POR level. The analog parts of the coulomb counter are switched off while the digital register values are retained. After recovery of the supply voltage the coulomb counter resumes integrating with the stored value in the accumulated charge registers but it has missed any charge flowing while SENSE+ < 2.7V. The hard-coded bit A[7] of the status register enables the host to distinguish the LTC2942 from the pin compatible LTC2941, allowing the same software to be used with both devices. Control Register (B) The operation of the LTC2942 is controlled by programming the control register. Table 3 shows the organization of the 8-bit control register B[7:0]. Table 3. Control Register B BIT NAME OPERATION Default B[7:6] ADC Mode [11] Automatic Mode. Performs voltage and temperature conversion every second. [10] Manual Voltage Mode. Performs single voltage conversion, then sleeps. [01] Manual Temperature Mode. Performs single temperature conversion, then sleeps. [00] Sleep. [00] B[5:3] Prescaler M Sets coulomb counter prescaling factor M between 1 and 128. Default is 128. M = 2(4 * B[5] + 2 * B[4] + B[3]) [111] B[2:1] AL/CC Configure Configures the AL/CC pin. [10] Alert Mode. Alert functionality enabled. Pin becomes logic output. [01] Charge Complete Mode. Pin becomes logic input and accepts "charge complete" signal (e.g., from a charger) to set accumulated charge register (C, D) to FFFFh. [00] AL/CC pin disabled. [11] Not allowed. B[0] Shutdown Shut down analog section to reduce ISUPPLY. [10] [0] Power Down B[0] Setting B[0] to 1 shuts down the analog parts of the LTC2942, reducing the current consumption to less than 1A. All analog circuits are inoperative while the values in the registers are retained. Note that any charge flowing while B[0] is 1 is not measured and the charge information below 1LSB of the accumulated charge register is lost. 2942fa 9 LTC2942 Applications Information Alert/Charge Complete Configuration B[2:1] The AL/CC pin is a dual function pin configured by the control register. By setting bits B[2:1] to [10] (default) the AL/CC pin is configured as an alert pin following the SMBus protocol. In this configuration the AL/CC pin is a digital output and is pulled low if one of the three measured quantities (charge, voltage, temperature) exceeds its high or low threshold or if the value of the accumulated charge register overflows or underflows. An alert response procedure started by the master resets the alert at the AL/CC pin. For further information see the Alert Response Protocol section. Setting the control bits B[2:1] to [01] configures the AL/CC pin as a digital input. In this mode, a high input on the AL/CC pin communicates to the LTC2942 that the battery is full and the accumulated charge register is set to its maximum value FFFFh. The AL/CC pin would typically be connected to the "charge complete" output from the battery charger circuitry. If neither the alert nor the charge complete functionality is desired, bits B[2:1] should be set to [00]. The AL/CC pin is then disabled and should be tied to GND. Avoid setting B[2:1] to [11] as it enables the alert and the charge complete modes simultaneously. Choosing RSENSE To achieve the specified precision of the coulomb counter, the differential voltage between SENSE+ and SENSE- must stay within 50mV. For differential input signals up to 300mV the LTC2942 will remain functional but the precision of the coulomb counter is not guaranteed. The required value of the external sense resistor, RSENSE, is determined by the maximum input range of VSENSE and the maximum current of the application: RSENSE 50mV IMAX The choice of the external sense resistor value influences the gain of the coulomb counter. A larger sense resistor gives a larger differential voltage between SENSE+ and SENSE- for the same current which results in more precise coulomb counting. Thus the amount of charge represented by the least significant bit (qLSB) of the accumulated charge (registers C, D) is equal to: qLSB = 0.085mAh * 50m M * RSENSE 128 qLSB = 0.085mAh * 50m RSENSE or when the prescaler is set to its default value of M = 128. Note that 1mAh = 3.6C (coulomb). Choosing RSENSE = 50mV/IMAX is not sufficient in applications where the battery capacity (QBAT) is very large compared to the maximum current (IMAX): QBAT > IMAX * 5.5 Hours For such low current applications with a large battery, choosing RSENSE according to RSENSE = 50mV/IMAX can lead to a qLSB smaller than QBAT/216 and the 16-bit accumulated charge register may underflow before the battery is exhausted or overflow during charge. Choose, in this case, a maximum RSENSE of: RSENSE 0.085mAh * 216 * 50m QBAT In an example application where the maximum current is IMAX = 100mA, calculating RSENSE = 50mV/IMAX would lead to a sense resistor of 500m. This gives a qLSB of 8.5Ah and the accumulated charge register can represent a maximum battery capacity of QBAT = 8.5Ah * 65535 = 557mAh. If the battery capacity is larger, RSENSE must be lowered. For example, RSENSE must be reduced to 150m if a battery with a capacity of 1800mAh is used. 2942fa 10 LTC2942 Applications Information Choosing Coulomb Counter Prescaler M B[5:3] If the battery capacity (QBAT) is very small compared to the maximum current (IMAX) (QBAT < IMAX * 0.1 Hours) the prescaler value M should be changed from its default value (128). In these applications with a small battery but a high maximum current, qLSB can get quite large with respect to the battery capacity. For example, if the battery capacity is 100mAh and the maximum current is 1A, the standard equation leads to choosing a sense resistor value of 50m, resulting in: qLSB = 0.085mAh = 306mC The battery capacity then corresponds to only 1176 qLSBs and less than 2% of the accumulated charge register is utilized. To preserve digital resolution in this case, the LTC2942 includes a programmable prescaler. Lowering the prescaler factor M allows reducing qLSB to better match the accumulated charge register to the capacity of the battery. The prescaling factor M can be chosen between 1 and its default value 128. The charge LSB then becomes: qLSB = 0.085mAh * 50m M * RSENSE 128 Note that the internal digital resolution of the coulomb counter is higher than indicated by qLSB. The digitized charge qINTERNAL is M * 8 times smaller than qLSB. qINTERNAL is typically 299As for a 50m sense resistor. ADC Mode B[7:6] The LTC2942 features an ADC which measures either voltage on SENSE- (battery voltage) or temperature via an internal temperature sensor. The reference voltage and clock for the ADC are generated internally. The ADC has four different modes of operation, as shown in Table 3. These modes are controlled by bits B[7:6] of the control register. At power-up, bits B[7:6] are set to [00] and the ADC is in sleep mode. A single voltage conversion is initiated by setting the bits B[7:6] to [10]. A single temperature conversion is started by setting bits B[7:6] to [01]. After a single voltage or temperature conversion, the ADC resets B[7:6] to [00] and goes to sleep. The LTC2942 also offers an automatic scan mode where the ADC converts voltage, then temperature, then sleeps for approximately two seconds before repeating the voltage and temperature conversions. The LTC2942 is set to this automatic mode by setting B[7:6] to [11] and stays in this mode until B[7:6] are reprogrammed by the host. To use as much of the range of the accumulated charge register as possible the prescaler factor M should be chosen for a given battery capacity QBAT and a sense resistor RSENSE as: Programming B[7:6] to [00] puts the ADC to sleep. If control bits B[7:6] change within a conversion, the ADC will complete the current conversion before entering the newly selected mode. RSENSE * 0.085mAh 50m M can be set to 1, 2, 4, 8, ... 128 by programming B[5:3] of the control register as M = 2(4 * B[5] + 2 * B[4] + B[3]). The default value after power up is M = 128 = 27 (B[5:3] = 111). A conversion of either voltage or temperature requires 10ms conversion time (typical). At the end of each conversion, the corresponding registers are updated. If the converted quantity exceeds the values programmed in the threshold registers, a flag is set in the status register and the AL/CC pin is pulled low (if alert mode is enabled). In the above example of a 100mAh battery and an RSENSE of 50m, the prescaler should be programmed to M = 4. The qLSB then becomes 2.656Ah and the battery capacity corresponds to roughly 37650 qLSBs. During a voltage conversion, the SENSE- pin is connected through a small resistor to a sampling circuit with an equivalent resistance of 2M, leading to a mean input current of I = VSENSE-/2M. M128 * 16 2 QBAT * 2942fa 11 LTC2942 Applications Information Accumulated Charge Register (C, D) The coulomb counter of the LTC2942 integrates current through the sense resistor. The result of this charge integration is stored in the 16-bit accumulated charge register (registers C, D). As the LTC2942 does not know the actual battery status at power-up, the accumulated charge register (ACR) is set to mid-scale (7FFFh). If the host knows the status of the battery, the accumulated charge (C[7:0]D[7:0]) can be either programmed to the correct value via I2C or it can be set after charging to FFFFh (full) by pulling the AL/CC pin high if charge complete mode is enabled via bits B[2:1]. Before writing the accumulated charge registers, the analog section should be shut down by setting B[0] to 1. In order to avoid a change in the accumulated charge registers between reading MSBs C[7:0] and LSBs D[7:0], it is recommended to read them sequentially, as shown in Figure 10. Voltage and Temperature Registers (I, J), (M, N) The result of the 14-bit ADC conversion of the voltage at SENSE- is stored in the voltage registers (I, J), whereas the temperature measurement result is stored in the temperature registers (M, N). The voltage and temperature registers are read only. As the ADC resolution is 14-bit in voltage mode and 10-bit in temperature mode, the lowest two bits of the combined voltage registers (I, J) and the lowest six bits of the combined temperature registers (M, N) are always zero. From the result of the 16-bit voltage registers I[7:0]J[7:0] the measured voltage can be calculated as: VSENSE - = 6V * RESULTDEC RESULTh = 6V * FFFFh 65535 Example: a register value of I[7:0] = B0h and J[7:0] = 1Ch corresponds to a voltage on SENSE- of: 45084DEC B01Ch VSENSE - = 6 V * = 6V * 4.12776V 65535 FFFFh The actual temperature can be obtained from the two byte register C[7:0]D[7:0] by: T = 600K * RESULTDEC RESULTh = 600K * FFFFh 65535 Example: a register value of C[7:0] = 80h D[7:0] = 00h corresponds to 300K or 27C. Threshold Registers (E, F, G, H, K, L, O, P) For each of the measured quantities (battery charge, voltage and temperature) the LTC2942 features a high and a low threshold registers. At power-up, the high thresholds are set to FFFFh while the low thresholds are set to 0000h. All thresholds can be programmed to a desired value via I2C. As soon as a measured quantity exceeds the high threshold or falls below the low threshold, the LTC2942 sets the corresponding flag in the status register and pulls the AL/CC pin low if alert mode is enabled via bits B[2:1]. Note that the voltage and temperature threshold registers are single-byte registers and only the 8 MSBs of the corresponding quantity are checked. To set a low level threshold for the battery voltage of 3V, register L should be programmed to 80h; a high temperature limit of 60C is programmed by setting register O to 8Eh. I2C Protocol The LTC2942 uses an I2C/SMBus compatible 2-wire opendrain interface supporting multiple devices and masters on a single bus. The connected devices can only pull the bus wires LOW and they never drive the bus HIGH. The bus wires must be externally connected to a positive supply voltage via a current source or pull-up resistor. When the bus is idle, both SDA and SCL are HIGH. Data on the I2C bus can be transferred at rates of up to 100kbit/s in standard mode and up to 400kbit/s in fast mode. Each device on the I2C/SMBus is recognized by a unique address stored in that device and can operate as either a transmitter or receiver, depending on the function of the device. In addition to transmitters and receivers, devices can also be classified as masters or slaves when performing data transfers. A master is the device which initiates a data transfer on the bus and generates the clock signals to permit that transfer. At the same time any device ad2942fa 12 LTC2942 Applications Information dressed is considered a slave. The LTC2942 always acts as a slave. Figure 3 shows an overview of the data transmission for fast and standard mode on the I2C bus. START and STOP Conditions When the bus is idle, both SCL and SDA must be HIGH. A bus master signals the beginning of a transmission with a START condition by transitioning SDA from HIGH to LOW while SCL is HIGH. When the master has finished communicating with the slave, it issues a STOP condition by transitioning SDA from LOW to HIGH while SCL is HIGH. The bus is then free for another transmission. When the bus is in use, it stays busy if a repeated START (Sr) is generated instead of a STOP condition. The repeated START (Sr) conditions are functionally identical to the START (S). Data Transmission After a START condition, the I2C bus is considered busy and data transfer begins between a master and a slave. As data is transferred over I2C in groups of nine bits (eight data bits followed by an acknowledge bit), each SDA a6 - a0 SCL 1-7 8 9 ADDRESS R/W ACK group takes nine SCL cycles. The transmitter releases the SDA line during the acknowledge clock pulse and the receiver issues an acknowledge (ACK) by pulling SDA LOW or leaves SDA HIGH to indicate a not acknowledge (NACK) condition. Change of data state can only happen while SCL is LOW. Write Protocol The master begins a write operation with a START condition followed by the seven bit slave address 1100100 and the R/W bit set to zero, as shown in Figure 4. The LTC2942 acknowledges this by pulling SDA LOW and then the master sends a command byte which indicates which internal register the master is to write. The LTC2942 acknowledges and latches the command byte into its internal register address pointer. The master delivers the data byte, the LTC2942 acknowledges once more and latches the data into the desired register. The transmission is ended when the master sends a STOP condition. If the master continues by sending a second data byte instead of a STOP, the LTC2942 acknowledges again, increments its address pointer and latches the second data byte in the following register, as shown in Figure 5. b7 - b0 1-7 b7 - b0 8 9 1-7 8 9 S P START CONDITION S DATA ACK DATA ACK Figure 3. Data Transfer Over I2C or SMBus ADDRESS W A REGISTER A DATA A 1100100 0 0 01h 0 FCh 0 P S STOP CONDITION 2942 F03 ADDRESS W A REGISTER A DATA A DATA A 1100100 0 0 02h 0 F0h 0 01h 0 2942 F04 FROM MASTER TO SLAVE FROM SLAVE TO MASTER A: ACKNOWLEDGE (LOW) A: NOT ACKNOWLEDGE (HIGH) S: START CONDITION P: STOP CONDITION P 2942 F05 Figure 5. Writing F001h to the LTC2942 Accumulated Charge Register (C, D) R: READ BIT (HIGH) W: WRITE BIT (LOW) Figure 4. Writing FCh to the LTC2942 Control Register (B) 2942fa 13 LTC2942 Applications Information Read Protocol tents of the requested register. The transmission is ended when the master sends a STOP condition. If the master acknowledges the transmitted data byte, the LTC2942 increments its address pointer and sends the contents of the following register as depicted in Figure 7. The master begins a read operation with a START condition followed by the seven bit slave address 1100100 and the R/W bit set to zero, as shown in Figure 6. The LTC2942 acknowledges and then the master sends a command byte which indicates which internal register the master is to read. The LTC2942 acknowledges and then latches the command byte into its internal register address pointer. The master then sends a repeated START condition followed by the same seven bit address with the R/W bit now set to one. The LTC2942 acknowledges and sends the con- S ADDRESS W A REGISTER A 1100100 0 0 00h 0 Alert Response Protocol In a system where several slaves share a common interrupt line, the master can use the alert response address (ARA) to determine which device initiated the interrupt (Figure 8). S ADDRESS R A DATA A 1100100 1 0 01h 1 P 2942 F06 Figure 6. Reading the LTC2942 Status Register (A) S ADDRESS W A REGISTER A 1100100 0 0 08h 0 S ADDRESS R A DATA A DATA A 1100100 1 0 F1h 0 24h 1 P 2942 F07 Figure 7. Reading the LTC2942 Voltage Register (I, J) S ALERT RESPONSE ADDRESS R A DEVICE ADDRESS A 0001100 1 0 11001001 1 P 2942 F08 Figure 8. LTC2942 Serial Bus SDA Alert Response Protocol S ADDRESS W A REGISTER A DATA P 1100100 0 0 01h 0 S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P 10ms 1100100 0 0 BC 08h 0 1100100 1 0 F1h 0 80h 1 2942 F09 Figure 9. Voltage Conversion Sequence S ADDRESS W A REGISTER A 1100100 0 0 02h 0 S ADDRESS R A DATA A DATA A 1100100 1 0 80h 0 01h 1 P 2942 F10 Figure 10. Reading the LTC2942 Accumulated Charge Registers (C, D) 2942fa 14 LTC2942 Applications Information The master initiates the ARA procedure with a START condition and the special 7-bit ARA bus address (0001100) followed by the read bit (R) = 1. If the LTC2942 is asserting the AL/CC pin in alert mode, it acknowledges and responds by sending its 7-bit bus address (1100100) and a 1. While it is sending its address, it monitors the SDA pin to see if another device is sending an address at the same time using standard I2C bus arbitration. If the LTC2942 is sending a 1 and reads a 0 on the SDA pin on the rising edge of SCL, it assumes another device with a lower address is sending and the LTC2942 immediately aborts its transfer and waits for the next ARA cycle to try again. If transfer TO CHARGER/LOAD is successfully completed, the LTC2942 will stop pulling down the AL/CC pin and will not respond to further ARA requests until a new Alert event occurs. PC Board Layout Suggestions Keep all traces as short as possible to minimize noise and inaccuracy. Use a 4-wire Kelvin sense connection for the sense resistor, locating the LTC2942 close to the resistor with short sense traces to the SENSE+ and SENSE- pins. Use wider traces from the resistor to the battery, load and/or charger (see Figure 11). Put the bypass capacitor close to SENSE+ and GND. RSENSE 6 1 C 2 3 TO BATTERY LTC2942 5 4 2942 F10 Figure 11. Kelvin Connection on Sense Resistor 2942fa 15 LTC2942 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DCB Package 6-Lead Plastic DFN (2mm x 3mm) (Reference LTC DWG # 05-08-1715) 0.70 0.05 3.55 0.05 1.65 0.05 (2 SIDES) 2.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 1.35 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP R = 0.05 TYP 2.00 0.10 (2 SIDES) 3.00 0.10 (2 SIDES) 0.40 0.10 4 6 1.65 0.10 (2 SIDES) PIN 1 NOTCH R0.20 OR 0.25 x 45 CHAMFER PIN 1 BAR TOP MARK (SEE NOTE 6) 3 0.200 REF 0.75 0.05 1 (DCB6) DFN 0405 0.25 0.05 0.50 BSC 1.35 0.10 (2 SIDES) 0.00 - 0.05 BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 2942fa 16 LTC2942 Revision History REV DATE DESCRIPTION PAGE NUMBER A 8/10 Revised Exposed Pad description in the Pin Configuration and Pin Functions sections. 2, 6 2942fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 17 LTC2942 Typical Application Single-Cell Lithium-Ion Coulomb Counter with Battery Charger for Charge and Discharge Currents of Up to 500mA 4 VIN 5V VCC BAT 500mA 3 LTC4057-4.2 (CHARGER) 1F 5 2k PROG SHDN GND LOAD 0.1F 3.3V 2k 1 VDD P 2 2k 2k 1 SENSE+ LTC2942 5 AL/CC 4 6 SDA SENSE- 3 SCL GND RSENSE 100m + 1-CELL Li-Ion 2 2942 TA02 Related Parts PART NUMBER DESCRIPTION COMMENTS Battery Gas Gauges LTC2942-1 Battery Gas Gauge with I2C Interface and Voltage and Temperature ADC; Integrated Sense Resistor 2.7V to 5.5V Operation, 14-Bit -ADC, Pin Compatible with LTC2941-1 LTC2941 Battery Gas Gauge with I2C Interface 2.7V to 5.5V Operation, Pin Compatible with LTC2942 LTC2941-1 Battery Gas Gauge with I2C Interface and Integrated 2.7V to 5.5V Operation, Pin Compatible with LTC2942-1 LTC4150 Coulomb Counter/Battery Gas Gauge 2.7V to 8.5V Operation, 10-Pin MSOP Package LTC1734 Lithium-Ion Battery Charger in ThinSOTTM Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed LTC4002 Switch Mode Lithium-Ion Battery Charger Standalone, 4.7V VIN 24V, 500kHz Frequency LTC4052 Monolithic Lithium-Ion Battery Pulse Charger No Blocking Diode or External Power FET Required, 1.5A Charge Current LTC4053 USB Compatible Monolithic Li-Ion Battery Charger Standalone Charger with Programmable Timer, Up to 1.25A Charge Current LTC4057 Lithium-Ion Linear Battery Charger Up to 800mA Charge Current, Thermal Regulation, ThinSOT Package LTC4058 Standalone 950mA Lithium-Ion Charger in DFN C/10 Charge Termination, Battery Kelvin Sensing, 7% Charge Accuracy LTC4059 900mA Linear Lithium-Ion Battery Charger 2mm x 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output LTC4061 Standalone Linear Li-Ion Battery Charger with Thermistor Input 4.2V, 0.35% Float Voltage, Up to 1A Charge Current, 3mm x 3mm DFN Package LTC4063 Li-Ion Charger with Linear Regulator Up to 1A Charge Current, 100mA, 125mV LDO, 3mm x 3mm DFN Package LTC4088 High Efficiency Battery Charger/USB Power Manager Maximizes Available Power from USB Port, Bat-TrackTM, Instant-On Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m Option, 3.3V/25mA Always-On LDO, 4mm x 3mm DFN-14 Package 50m Sense Resistor Battery Chargers 2942fa 18 Linear Technology Corporation LT 0810 REV A * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2010