LP3990
LP3990 150mA Linear Voltage Regulator for Digital Applications
Literature Number: SNVS251H
October 16, 2006
LP3990
150mA Linear Voltage Regulator for Digital Applications
General Description
The LP3990 regulator is designed to meet the requirements
of portable, battery-powered systems providing an accurate
output voltage, low noise, and low quiescent current. The
LP3990 will provide a 0.8V output from the low input voltage
of 2V at up to 150mA load current. When switched into shut-
down mode via a logic signal at the enable pin, the power
consumption is reduced to virtually zero.
The LP3990 is designed to be stable with space saving ce-
ramic capacitors as small as 1.0µF.
Performance is specified for a -40°C to 125°C junction tem-
perature range.
For output voltages other than 0.8V, 1.2, 1.35V, 1.5V, 1.8V,
2.5V, 2.8V, or 3.3V please contact your local NSC sales of-
fice.
Features
1% Voltage Accuracy at Room Temperature
Stable with Ceramic Capacitor
Logic Controlled Enable
No Noise Bypass Capacitor Required
Thermal-Overload and Short-Circuit Protection
Key Specifications
Input Voltage Range 2.0 to 6.0V
Output Voltage Range 0.8 to 3.3V
Output Current 150mA
Output Stable - Capacitors 1.0uF
Virtually Zero IQ (Disabled) <10nA
Very Low IQ (Enabled) 43uA
Low Output Noise 150uVRMS
PSRR 55dB at 1kHz
Fast Start Up 105us
Package
All available in Lead Free option.
4 Pin micro SMD 1 mm x 1.3 mm
6 pin LLP (SOT23 footprint)
SOT23 - 5
For other package options contact your NSC sales office.
Applications
Cellular Handsets
Hand-Held Information Appliances
Typical Application Circuit
20076801
© 2008 National Semiconductor Corporation 200768 www.national.com
LP3990 150mA Linear Voltage Regulator for Digital Applications
Pin Descriptions
Packages
Pin No Symbol Name and Function
LLP micro
SMD
SOT23-5
5 A2 3 VEN Enable Input; Enables the Regulator when 0.95V.
Disables the Regulator when 0.4V.
Enable Input has 1M pulldown resistor to GND.
2 A1 2 GND Common Ground. Connect to Pad.
1 B1 5 VOUT Voltage output. A 1.0µF Low ESR Capacitor should be connected
to this Pin. Connect this output to the load circuit.
6 B2 1 VIN Voltage Supply Input. A 1.0µF capacitor should be connected at
this input.
3 4 N/C No Connection. Do not connect to any other pin.
4 N/C No Connection. Do not connect to any other pin.
Pad GND Common Ground. Connect to Pin 2.
Connection Diagrams
Micro SMD, 4 Bump Package
20076803
See NS package number TLA04
LLP-6 Package
20076806
See NS package number SDE06A
www.national.com 2
LP3990
SOT23 - 5 Package (MF)
20076808
See NS package number MF05A
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LP3990
Ordering Information
For micro SMD Package
Output Voltage
(V) Grade LP3990 Supplied as 250 Units,
Tape and Reel
LP3990 Supplied as 3000 Units,
Tape and Reel Package Marking
0.8 STD LP3990TL-0.8 LP3990TLX-0.8
1.2 STD LP3990TL-1.2 LP3990TLX-1.2
1.35 STD LP3990TL-1.35 LP3990TLX-1.35
1.5 STD LP3990TL-1.5 LP3990TLX-1.5
1.8 STD LP3990TL-1.8 LP3990TLX-1.8
2.5 STD LP3990TL-2.5 LP3990TLX-2.5
2.8 STD LP3990TL-2.8 LP3990TLX-2.8
For LLP-6 Package
Output Voltage
(V) Grade LP3990 Supplied as 1000 Units,
Tape and Reel
LP3990 Supplied as 3000 Units,
Tape and Reel
Package Marking
0.8 STD LP3990SD-0.8 LP3990SDX-0.8 L085B
1.2 STD LP3990SD-1.2 LP3990SDX-1.2 L086B
1.35 STD LP3990SD-1.35 LP3990SDX-1.35 L150B
1.5 STD LP3990SD-1.5 LP3990SDX-1.5 L087B
1.8 STD LP3990SD-1.8 LP3990SDX-1.8 L088B
2.5 STD LP3990SD-2.5 LP3990SDX-2.5 L090B
2.8 STD LP3990SD-2.8 LP3990SDX-2.8 L091B
For SOT23 - 5 Package
Output Voltage
(V) Grade LP3990 Supplied as 1000 Units,
Tape and Reel
LP3990 Supplied as 3000 Units,
Tape and Reel
Package Marking
1.2 STD LP3990MF-1.2 LP3990MFX-1.2 SCDB
1.5 STD LP3990MF-1.5 LP3990MFX-1.5 SCEB
1.8 STD LP3990MF-1.8 LP3990MFX-1.8 SCFB
2.5 STD LP3990MF-2.5 LP3990MFX-2.5 SCJB
2.8 STD LP3990MF-2.8 LP3990MFX-2.8 SCKB
3.3 STD LP3990MF-3.3 LP3990MFX-3.3 SCLB
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LP3990
Absolute Maximum Ratings
(Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Input Voltage -0.3 to 6.5V
Output Voltage -0.3 to (VIN + 0.3V) with
6.5V (max)
Enable Input Voltage -0.3 to (VIN + 0.3V) with
6.5V (max)
Junction Temperature 150°C
Lead/Pad Temp. (Note 3)
LLP/SOT23 235°C
micro SMD 260°C
Storage Temperature -65 to 150°C
Continuous Power Dissipation
Internally Limited(Note 4)
ESD (Note 5)
Human Body Model 2KV
Machine Model 200V
Operating Ratings (Note 1)
Input Voltage 2V to 6V
Enable Input Voltage 0 to (VIN + 0.3V) with
6.0V (max)
Junction Temperature -40°C to 125°C
Ambient Temperature TARange
(Note 6)
-40°C to 85°C
Thermal Properties (Note 1)
Junction To Ambient Thermal
Resistance(Note 8)
θJA(LLP-6) 88°C/W
θJA(microSMD) 220°C/W
θJASOT23-5 220°C/W
Electrical Characteristics
Unless otherwise noted, VEN =950mV, VIN = VOUT + 1.0V, or 2.0V, whichever is higher. CIN = 1 µF, IOUT = 1 mA, COUT =0.47 µF.
Typical values and limits appearing in normal type apply for TJ = 27°C. Limits appearing in boldface type apply over the full junction
temperature range for operation, −40 to +125°C. (Note 13)
Symbol Parameter Conditions Typ Limit Units
Min Max
VIN Input Voltage (Note 14) 2 6 V
ΔVOUT Output Voltage Tolerance ILOAD = 1 mA Micro SMD -1 +1
%
LLP -1.5 +1.5
SOT-23 -1.5 +1.5
Over full line and
load regulation.
Micro SMD -2.5 +2.5
LLP -3 +3
SOT-23 -4 +4
Line Regulation Error VIN = (VOUT(NOM) + 1.0V) to 6.0V, 0.02 -0.1 0.1 %/V
Load Regulation Error IOUT = 1mA
to 150mA
VOUT = 0.8 to 1.95V
MicroSMD
0.002 -0.005 0.005
%/mA
VOUT = 0.8 to 1.95V
LLP, SOT-23
0.003 -0.008 0.008
VOUT = 2.0 to 3.3V
MicroSMD
0.0005 -0.002 0.002
VOUT = 2.0 to 3.3V
LLP, SOT-23
0.002 -0.005 0.005
VDO Dropout Voltage IOUT = 150mA
(Notes 7, 10)
120 200 mV
ILOAD Load Current (Notes 9, 10) 0 µA
IQQuiescent Current VEN = 950mV, IOUT = 0mA 43 80
µA
VEN = 950mV, IOUT = 150mA 65 120
VEN = 0.4V 0.002 0.2
ISC Short Circuit Current Limit (Note 11) 550 1000 mA
IOUT Maximum Output Current 150 mA
PSRR Power Supply Rejection Ratio f = 1kHz, IOUT = 1mA to 150mA 55 dB
f = 10kHz, IOUT = 150mA 35
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LP3990
Symbol Parameter Conditions Typ Limit Units
Min Max
enOutput noise Voltage (Note 10) BW = 10Hz to
100kHz,
VOUT = 0.8 60
µVRMS
VOUT = 1.5 125
VOUT = 3.3 180
TSHUTDOWN Thermal Shutdown Temperature 155 °C
Hysteresis 15
Enable Control Characteristics
IEN
(Note 12)
Maximum Input Current at
VEN Input
VEN = 0.0V 0.001 0.1 µA
VEN = 6V 6 2.5 10
VIL Low Input Threshold VIN = 2V to 6V 0.4 V
VIH High Input Threshold VIN = 2V to 6V 0.95 V
Timing Characteristics
TON Turn On Time (Note 10) To 95% Level
VIN(MIN) to 6.0V
VOUT = 0.8 80 150
µs
VOUT = 1.5 105 200
VOUT = 3.3 175 250
Transient
Response
Line Transient Response |δVOUT|Trise = Tfall = 30µs (Note 10)
δVIN = 600mV 8 16 mV
(pk - pk)
Load Transient Response |δVOUT|Trise = Tfall = 1µs (Note 10)IOUT = 1mA to
150mA
COUT = 1µF
55
100 mV
Note 1: Absolute Maximum Ratings are limits beyond which damage can occur. Operating Ratings are conditions under which operation of the device is
guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 2: All Voltages are with respect to the potential at the GND pin.
Note 3: For further information on these packages please refer to the following application notes;AN-1112 Micro SMD Package Wafer Level Chip Scale
Package,AN-1187 Leadless Leadframe Package.
Note 4: Internal thermal shutdown circuitry protects the device from permanent damage.
Note 5: The human body model is 100pF discharged through a 1.5k resistor into each pin. The machine model is a 200pF capacitor discharged directly into
each pin.
Note 6: The maximum ambient temperature (TA(max)) is dependant on the maximum operating junction temperature (TJ(max-op) = 125°C), the maximum power
dissipation of the device in the application (PD(max)), and the junction to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA(max) = TJ(max-op) - (θJA × PD(max)).
Note 7: Dropout voltage is voltage difference between input and output at which the output voltage drops to 100mV below its nominal value. This parameter only
for output voltages above 2.0V.
Note 8: Junction to ambient thermal resistance is dependant on the application and board layout. In applications where high maximum power dissipation is
possible, special care must be paid to thermal dissipation issues in board design.
Note 9: The device maintains the regulated output voltage without the load.
Note 10: This electrical specification is guaranteed by design.
Note 11: Short circuit current is measured with VOUT pulled to 0V and VIN worst case = 6.0V.
Note 12: Enable Pin has 1M typical, resistor connected to GND.
Note 13: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production at TJ = 25°C or correlated using
Statistical Quality Control methods. Operation over the temperature specification is guaranteed by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
Note 14: VIN(MIN) = VOUT(NOM) + 0.5V, or 2.0V, whichever is higher.
Output Capacitor, Recommended Specifications
Symbol Parameter Conditions Nom Limit Units
Min Max
COUT Output Capacitance Capacitance
(Note 15)
1.0 0.7 µF
ESR 5 500 m
Note 15: The full operating conditions for the application should be considered when selecting a suitable capacitor to ensure that the minimum value of capacitance
is always met. Recommended capacitor type is X7R. However, dependent on application, X5R, Y5V, and Z5U can also be used. (See capacitor section in
Applications Hints)
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LP3990
Typical Performance Characteristics. Unless otherwise specified, CIN = 1.0µF Ceramic, COUT = 0.47
µF Ceramic, VIN = VOUT(NOM) + 1.0V, TA = 25°C, VOUT(NOM) = 1.5V , Shutdown pin is tied to VIN.
Output Voltage Change vs Temperature
20076810
Ground Current vs Load Current
20076831
Ground Current vs VIN. ILOAD = 0mA
20076812
Ground Current vs VIN. ILOAD = 1mA
20076813
Ground Current vs VIN. ILOAD = 150mA
20076814
Short Circuit Current
20076815
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LP3990
Short Circuit Current
20076816
Line transient
20076817
Power Supply Rejection Ratio
20076819
Power Supply Rejection Ratio
20076820
Enable Start-up Time
20076821
Enable Start-up Time
20076822
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LP3990
Load Transient
20076825
Noise Density
20076828
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LP3990
Application Hints
EXTERNAL CAPACITORS
In common with most regulators, the LP3990 requires exter-
nal capacitors for regulator stability. The LP3990 is specifi-
cally designed for portable applications requiring minimum
board space and smallest components. These capacitors
must be correctly selected for good performance.
INPUT CAPACITOR
An input capacitor is required for stability. It is recommended
that a 1.0µF capacitor be connected between the LP3990 in-
put pin and ground (this capacitance value may be increased
without limit).
This capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analogue
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important: To ensure stable operation it is essential that
good PCB design practices are employed to minimize ground
impedance and keep input inductance low. If these conditions
cannot be met, or if long leads are used to connect the battery
or other power sorce to the LP3990, then it is recommended
that the input capacitor is increased. Also, tantalum capaci-
tors can suffer catastrophic failures due to surge current when
connected to a low-impedance source of power (like a battery
or a very large capacitor). If a tantalum capacitor is used at
the input, it must be guaranteed by the manufacturer to have
a surge current rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will remain approximately
1.0µF over the entire operating temperature range.
OUTPUT CAPACITOR
The LP3990 is designed specifically to work with very small
ceramic output capacitors. A 1.0µF ceramic capacitor (tem-
perature types Z5U, Y5V or X7R) with ESR between 5m to
500m, is suitable in the LP3990 application circuit.
For this device the output capacitor should be connected be-
tween the VOUT pin and ground.
It is also possible to use tantalum or film capacitors at the
device output, COUT (or VOUT), but these are not as attractive
for reasons of size and cost (see the section Capacitor Char-
acteristics).
The output capacitor must meet the requirement for the min-
imum value of capacitance and also have an ESR value that
is within the range 5m to 500m for stability.
NO-LOAD STABILITY
The LP3990 will remain stable and in regulation with no ex-
ternal load. This is an important consideration in some cir-
cuits, for example CMOS RAM keep-alive applications.
CAPACITOR CHARACTERISTICS
The LP3990 is designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer. For
capacitance values in the range of 0.47µF to 4.7µF, ceramic
capacitors are the smallest, least expensive and have the
lowest ESR values, thus making them best for eliminating
high frequency noise. The ESR of a typical 1.0µF ceramic
capacitor is in the range of 20m to 40m, which easily
meets the ESR requirement for stability for the LP3990.
For both input and output capacitors, careful interpretation of
the capacitor specification is required to ensure correct device
operation. The capacitor value can change greatly, depend-
ing on the operating conditions and capacitor type.
In particular, the output capacitor selection should take ac-
count of all the capacitor parameters, to ensure that the
specification is met within the application. The capacitance
can vary with DC bias conditions as well as temperature and
frequency of operation. Capacitor values will also show some
decrease over time due to aging. The capacitor parameters
are also dependant on the particular case size, with smaller
sizes giving poorer performance figures in general. As an ex-
ample, Figure 1 shows a typical graph comparing different
capacitor case sizes in a Capacitance vs. DC Bias plot. As
shown in the graph, increasing the DC Bias condition can re-
sult in the capacitance value falling below the minimum value
given in the recommended capacitor specifications table
(0.7µF in this case). Note that the graph shows the capaci-
tance out of spec for the 0402 case size capacitor at higher
bias voltages. It is therefore recommended that the capacitor
manufacturers’ specifications for the nominal value capacitor
are consulted for all conditions, as some capacitor sizes (e.g.
0402) may not be suitable in the actual application.
20076840
FIGURE 1. Graph Showing a Typical Variation in
Capacitance vs DC Bias
The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a temper-
ature range of -55°C to +125°C, will only vary the capacitance
to within ±15%. The capacitor type X5R has a similar toler-
ance over a reduced temperature range of -55°C to +85°C.
Many large value ceramic capacitors, larger than 1µF are
manufactured with Z5U or Y5V temperature characteristics.
Their capacitance can drop by more than 50% as the tem-
perature varies from 25°C to 85°C. Therefore X7R is recom-
mended over Z5U and Y5V in applications where the ambient
temperature will change significantly above or below 25°C.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
0.47µF to 4.7µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum capac-
itor with an ESR value within the stable range, it would have
to be larger in capacitance (which means bigger and more
www.national.com 10
LP3990
costly) than a ceramic capacitor with the same ESR value. It
should also be noted that the ESR of a typical tantalum will
increase about 2:1 as the temperature goes from 25°C down
to -40°C, so some guard band must be allowed.
ENABLE CONTROL
The LP3990 features an active high Enable pin, VEN, which
turns the device on when pulled high. When not enabled the
regulator output is off and the device typically consumes 2nA.
If the application does not require the Enable switching fea-
ture, the VEN pin should be tied to VIN to keep the regulator
output permanently on.
To ensure proper operation, the signal source used to drive
the VEN input must be able to swing above and below the
specified turn-on/off voltage thresholds listed in the Electrical
Characteristics section under VIL and VIH.
Micro SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques, which are detailed in National Semiconductor Appli-
cation Note AN-1112.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
Micro SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct light may affect the
operation of the device. Light sources, such as halogen
lamps, can affect electrical performance, if placed in close
proximity to the device.
Light with wavelengths in the infra-red portion of the spectrum
is the most detrimental, and so, fluorescent lighting used in-
side most buildings, has little or no effect on performance.
11 www.national.com
LP3990
Physical Dimensions inches (millimeters) unless otherwise noted
micro SMD, 4 Bump, Package (TLA04)
NS Package Number TLA04AMA
The dimensions for X1, X2 and X3 are given as:
X1 = 1.014 +/− 0.03mm
X2 = 1.294 +/− 0.03mm
X3 = 0.600 +/− 0.075mm
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LP3990
LLP, 6 Lead, Package (SOT23 Land)
NS Package Number SDE06A
SOT23 - 5 Package
NS Package Number MF05A
13 www.national.com
LP3990
Notes
LP3990 150mA Linear Voltage Regulator for Digital Applications
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