Apr. 2004
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
PM100CLA060
FEATURE
a) Adopting new 5th generation IGBT (CSTBT) chip, which
performance is improved by 1µm fine rule process.
For example, typical Vce(sat)=1.5V @Tj=125°C
b) I adopt the over-temperature conservation by Tj detection of
CSTBT chip, and error output is possible from all each con-
servation upper and lower arm of IPM.
c) New small package
Reduce the package size by 10%, thickness by 22% from
S-DASH series.
•3φ 100A, 600V Current-sense IGBT type inverter
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, short-
circuit, over-temperature & under-voltage (P-Fo available
from upper arm devices)
• Acoustic noise-less 11kW class inverter application
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES Dimensions in mm
106
19.75 3.25
7
16 15.25 2-φ5.5
6-M5 NUTS
MOUNTING HOLES
6-23-23-23-2
B
NP
UVW
10.75
7
12 (SCREWING DEPTH)
19-■0.5
32.75 23 23 23
13
31
5511.75
32
13.5
3
16
17.5 17.5
19.75
12
14.5
1616
12011
1. VUPC
2. UFO
3. UP
4. VUP1
5. VVPC
6. VFO
7. VP
8. VVP1
9. VWPC
10. WFO
11. WP
12. VWP1
13. VNC
14. VN1
15. NC
16. UN
17. VN
18. WN
19. Fo
Terminal code
1591319
12 22
+
–1
0.5
2-φ2.5
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
Apr. 2004
VCES
±IC
±ICP
PC
Tj
Collector-Emitter Voltage
Collector Current
Collector Current (Peak)
Collector Dissipation
Junction Temperature
VD = 15V, VCIN = 15V
TC = 25°C
TC = 25°C
TC = 25°C (Note-1)
V
A
A
W
°C
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol Parameter Condition Ratings Unit
600
100
200
356
–20 ~ +150
INTERNAL FUNCTIONS BLOCK DIAGRAM
VFO
IFO
CONTROL PART
V
mA
20
20
Supply Voltage
Input Voltage
Fault Output Supply Voltage
Fault Output Current
Symbol Parameter Condition Ratings Unit
Applied between : VUP1-VUPC
VVP1-VVPC, VWP1-VWPC, VN1-VNC
Applied between : UP-VUPC, VP-VVPC
WP-VWPC, UN • VN • WN-VNC
Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC
FO-VNC
Sink current at UFO, VFO, WFO, FO terminals
20
20
VD
VCIN
V
V
V
N
U
N
W
P
V
WP1
WF
O
V
WPC
V
P
V
VP1
VF
O
V
VPC
U
P
V
UP1
UF
O
V
UPC
NC
NC N W V U P
Fo V
NC
V
N1
W
N
Gnd In Fo Vcc
Gnd Si Out OT
Gnd In Fo Vcc
Gnd Si Out OT
Gnd In Fo Vcc
Gnd Si Out OT
Gnd In Fo Vcc
Gnd Si Out OT
Gnd In Fo Vcc
Gnd Si Out OT
Gnd In Fo Vcc
Gnd Si Out OT
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
Apr. 2004
Parameter
Symbol Supply Voltage Protected by
SC
Supply Voltage (Surge)
Module Case Operating
Temperature
Storage Temperature
Isolation Voltage
Condition
VCC(surge)
TC
Tstg
Viso
Ratings
VCC(PROT) 400
500
–20 ~ +100
–40 ~ +125
2500
Unit
V
°C
°C
Vrms
V
VD = 13.5 ~ 16.5V, Inverter Part,
Tj = +125°C Start
Applied between : P-N, Surge value
(Note-1)
60Hz, Sinusoidal, Charged part to Base, AC 1 min.
(Note-1) Tc (base plate) measurement point is below.
2.1
2.0
3.3
2.4
0.4
1.0
2.5
1.0
1
10
Min. Typ. Max.
Collector-Emitter
Saturation Voltage
Collector-Emitter
Cutoff Current
–IC = 100A, VD = 15V, VCIN = 15V (Fig. 2)
Tj = 25°C
Tj = 125°C
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Parameter
Symbol Condition
VCE(sat)
ICES
VEC
ton
trr
tc(on)
toff
tc(off)
Limits
—
—
—
0.5
—
—
—
—
—
—
1.6
1.5
2.2
1.0
0.2
0.4
1.2
0.5
—
—
Tj = 25°C
Tj = 125°C
FWDi Forward Voltage
Switching T ime
VD = 15V, VCIN = 0V↔15V
VCC = 300V, IC = 100A
Tj = 125°C
Inductive Load (Fig. 3,4)
V
CE
= V
CES
, V
CIN
= 15V
(Fig. 5)
VD = 15V, IC = 100A
VCIN = 0V, Pulsed (Fig. 1)
TOTAL SYSTEM
V
mA
V
µs
Unit
0.27*
0.43*
0.35
0.56
0.038
°C/W
Rth(j-c)Q
Rth(j-c)F
Rth(j-c)Q
Rth(j-c)F
Rth(c-f)
Inverter IGBT part (per 1/6) (Note-2)
Inverter FWDi part (per 1/6) (Note-2)
Inverter IGBT part (per 1/6) (Note-1)
Inverter FWDi part (per 1/6) (Note-1)
Case to fin, (per 1 module)
Thermal grease applied (Note-1)
Symbol Condition Unit
Min.
—
—
—
—
—
—
—
—
—
—
Junction to case Thermal
Resistances
THERMAL RESISTANCES
Contact Thermal Resistance
Parameter Limits
Typ. Max.
UP
IGBT
28.3
–8.5
VP WP UN VN WN
FWDi
28.0
1.7
IGBT
65.0
–8.5
FWDi
65.2
1.7
IGBT
87.0
–8.5
FWDi
87.2
1.7
IGBT
39.3
6.5
FWDi
39.5
–5.2
IGBT
54.0
6.5
FWDi
53.7
–5.2
IGBT
76.0
6.5
FWDi
75.7
–5.2
arm
axis X
Y
Bottom view
Top view
Tc
B
NP
UVW
* If you use this value, Rth(f-a) should be measured just under the chips.
(Note-2) Tc (under the chip) measurement point is below. (unit : mm)
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
Apr. 2004
VD = 15V
Detect Tj of IGBT chip
–20 ≤ Tj ≤ 125°C
VD = 15V, VFO = 15V (Note-3)
VD = 15V (Note-3)
–20≤ Tj ≤ 125°C, VD = 15V (Fig. 3,6)
VD = 15V (Fig. 3,6)
3.5
3.5
—
—
—
—
Main terminal screw : M5
Mounting part screw : M5
—
Symbol Parameter
Mounting torque
Mounting torque
Weight
Condition Unit
N • m
N • m
g
Limits
Min. Typ. Max.
2.5
2.5
—
3.0
3.0
380
MECHANICAL RATINGS AND CHARACTERISTICS
VD = 15V, VCIN = 15V
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
UN • VN • WN-VNC
ID
µs
°C
V
mA
ms
25
10
1.8
2.3
—
—
—
—
12.5
—
0.01
15
—
mA
Circuit Current
Input ON Threshold Voltage
Input OFF Threshold Voltage
Short Circuit Trip Level
Short Circuit Current Delay
Time
Over Temperature Protection
Supply Circuit Under-Voltage
Protection
Fault Output Current
Minimum Fault Output Pulse
Width
Vth(ON)
Vth(OFF)
SC
toff(SC)
OT
OTr
UV
UVr
IFO(H)
IFO(L)
tFO
Trip level
Reset level
Trip level
Reset level
CONTROL PART
—
—
1.2
1.7
200
—
135
—
11.5
—
—
—
1.0
Parameter
Symbol Condition Max.
Min. Typ. Unit
Limits
15
5
1.5
2.0
—
0.2
145
125
12.0
12.5
—
10
1.8
(Note-3) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to
protect it.
V
VN1-VNC
VXP1-VXPC
A
RECOMMENDED CONDITIONS FOR USE
Recommended value Unit
Condition
Symbol Parameter V
Applied across P-N terminals
Applied between : VUP1-VUPC, VVP1-VVPC
VWP1-VWPC, VN1-VNC (Note-4)
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
UN • VN • WN-VNC
Using Application Circuit of Fig. 8
For IPM’s each input signals (Fig. 7)
Supply Voltage
Control Supply Voltage
Input ON Voltage
Input OFF Voltage
PWM Input Frequency
Arm Shoot-through
Blocking T ime
≤ 400
15 ±1.5
≤ 0.8
≥ 9.0
≤ 20
≥ 2.0
VCC
VCIN(ON)
VCIN(OFF)
fPWM
tdead
VDV
kHz
µs
V
(Note-4) With ripple satisfying the following conditions dv/dt swing ≤ ±5V/µs, Variation ≤ 2V peak to peak
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
Apr. 2004
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-
lowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W)
U,V,W, (N) U,V,W, (N)
VD (all)
IN
Fo IN
Fo
VD (all)
VCIN
(0V) Ic
V V
P, (U,V,W)
VCIN
(15V) –Ic
Fig. 7 Dead time measurement point example
Fig. 1 VCE(sat) Test Fig. 2 VEC Test
0V 1.5V 1.5V
1.5V
2V
2V
2V
0V
t
t
tdeadtdeadtdead
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
IPM’ input signal VCIN
(Upper Arm)
IPM’ input signal VCIN
(Lower Arm)
10%
90%
trr Irr
trtd(on)
tc(on) tc(off)
td(off)
VCIN
Ic VCE
10%
10% 10%
90%
tf
(ton= td(on) + tr) (toff= td(off) + tf)
Fo
Fo
P
N
N
CS
CS
U,V,W Vcc
Vcc
Ic
Ic
VD (all)
VD (all)
P
U,V,W
VCIN
VCIN
VCIN
(15V)
VCIN
(15V)Fo
Fo
Fig. 3 Switching time and SC test circuit Fig. 4 Switching time test waveform
a) Lower Arm Switching
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
b) Upper Arm Switching
VCIN
Fig. 5 ICES Test
Fig. 6 SC test waveform
SC
Short Circuit Current
toff(SC)
VD (all) U,V,W, (N)
P, (U,V,W) A
Pulse VCE
VCIN
(15V) Ic
Fo
IN
Fo
Constant Current
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100CLA060
FLAT-BASE TYPE
INSULATED PACKAGE
Apr. 2004
NOTES FOR STABLE AND SAFE OPERATION ;
•Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the
stray capacity between the input and output wirings of opto-coupler.
•Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.
•Fast switching opto-couplers: tPLH, tPHL ≤ 0.8µs, Use High CMR type.
•Slow switching opto-coupler: CTR > 100%
•Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the
power supply.
•Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
terminal.
•Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
and improve noise immunity of the system.
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
OUT
Si
OT
OT
OT
OT
OT
OT
GNDGND
In
Vcc
U
V
W
NC
N
P
M
→
IF +
–
OUT
Si
GNDGND
In
Vcc
OUT
Si
GNDGND
In
Vcc
OUT
Si
GNDGND
In
Fo
Fo
Fo
Fo
Vcc
OUT
Si
GNDGND
In
Fo
Vcc
OUT
Si
GND
GND
In
Fo
Vcc
VWP1
WP
VWPC
UN
VN
VN1
WN
VNC
Rfo
Rfo
Rfo
Rfo
Fo
VVP1
VP
VVPC
≥0.1µ
1kΩ
≥0.1µ
≥0.1µ
20kΩ
20kΩ
20kΩ
≥10µ
≥10µ
≥10µ
20kΩ≥10µ
≥0.1µ
Fo
Fo
Fo
VUP1
UP
VUPC
NC
→
→
IF
IF
IF
5V
→
V
D
V
D
V
D
V
D
