FDS8984-F085 - ON SEMICONDUCTOR

November, 2018 − Rev. 7

1Publication Order Number:

NCP718/D

NCP718

Low Dropout Regulator, Wide

Input Voltage, Low Iq,

300 mA

The NCP718 is 300 mA LDO Linear Voltage Regulator. It is a very

stable and accurate device with ultra−low quiescent current

consumption (typ. 4 mA over the full temperature range) and a wide

input voltage range (up to 24 V). The regulator incorporates several

protection features such as Thermal Shutdown and Current Limiting.

Features

•Operating Input Voltage Range: 2.5 V to 24 V

•Fixed Voltage Options Available: 1.2 V to 5 V (upon request)

•Adjustable Voltage Option from 1.2 V to 5 V

•Ultra−Low Quiescent Current: typ. 4 mA over Temperature

•±2% Accuracy Over Full Load, Line and Temperature Variations

•PSRR: 60 dB at 1 kHz

•Noise: typ. 36 mVRMS from 100 Hz to 100 kHz

•Stable with Small 1 mF Ceramic Capacitor

•Soft−start to Reduce Inrush Current and Overshoots

•Thermal Shutdown and Current Limit Protection

•SOA Limiting for High Vin / High Iout – Static / Dynamic

•Active Discharge Option Available (upon request)

•Available in TSOT−23−5 and WDFN6 2x2 mm Packages

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Typical Applications

•Wireless Chargers

•Portable Equipment

•Communication Systems

Figure 1. Typical Application Schematic

1mF

Ceramic

NCP718

IN OUT

GND COUT

CIN

VIN VOUT

1mF

Ceramic EN

OFF

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See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

ORDERING INFORMATION

MARKING

DIAGRAMS

WDFN6

MT SUFFIX

CASE 511BR

PIN CONNECTIONS

WDFN6 2x2 mm

(Top View)

XX M

TSOT−23−5

SN SUFFIX

CASE 419AE

XX MG

(Note: Microdot may be in either location)

XX = Specific Device Code

M = Date Code*

G= Pb−Free Package

XX = Specific Device Code

M = Date Code

TSOT−23−5

(Top View)

*Date Code orientation and/or position may

vary depending upon manufacturing location.

OUT

NC/ADJ

GND

OUT

NC/ADJ

GND

NCP718

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Figure 2. Simplified Block Diagram

THERMAL

SHUTDOWN

MOSFET

DRIVER WITH

CURRENT LIMIT

INTEGRATED

SOFT−START

BANDGAP

REFERENCE

ENABLE

LOGIC

OUT

GND

* ACTIVE DISCHARGE

Version A only

THERMAL

SHUTDOWN

MOSFET

DRIVER WITH

CURRENT LIMIT

INTEGRATED

SOFT−START

BANDGAP

REFERENCE

ENABLE

LOGIC

OUT

GND

* ACTIVE DISCHARGE

Version A only

ADJ

Fixed Version Adjustable Version

Table 1. PIN FUNCTION DESCRIPTION

Pin No.

(WDFN6)

Pin No.

(TSOT−23−5) Pin Name Description

6 1 IN Input pin. A small capacitor is needed from this pin to ground to assure stability.

3, EXP 2 GND Power supply ground.

4 3 EN Enable pin. Driving this pin high turns on the regulator. Driving EN pin low puts the regulator

into shutdown mode.

2 4 NC / ADJ Fixed Version: No connection. This pin can be tied to ground to improve thermal dissipation

or left disconnected.

Adjustable Version: Feedback pin for set−up output voltage. Use resistor divider for voltage

selection.

1 5 OUT Regulated output voltage pin. A small 1 mF ceramic capacitor is needed from this pin to

ground to assure stability.

5−N/C No connection. This pin can be tied to ground to improve thermal dissipation or left dis-

connected.

Table 2. ABSOLUTE MAXIMUM RATINGS

Rating Symbol Value Unit

Input Voltage (Note 1) VIN −0.3 to 24 V

Enable Voltage VEN −0.3 to VIN+0.3 V

Output Voltage VOUT −0.3 to VIN+0.3 (max. 6) V

Output Short Circuit Duration tSC Indefinite s

Maximum Junction Temperature TJ(MAX) 150 °C

Storage Temperature TSTG −55 to 150 °C

ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V

ESD Capability, Charged Device Model (Note 2) ESDCDM 1000 V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

2. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)

ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model.

Latch up Current Maximum Rating tested per JEDEC standard: JESD78. Latch−up is not guaranteed on ENABLE pin.

Table 3. THERMAL CHARACTERISTICS

Rating Symbol Value Unit

Thermal Characteristics, WDFN6, 2 mm x 2 mm

Thermal Resistance, Junction−to−Air

RqJA 65 °C/W

Thermal Characteristics, TSOT−23−5

Thermal Resistance, Junction−to−Air

RqJA 235 °C/W

NCP718

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Table 4. ELECTRICAL CHARACTERISTICS -40°C ≤ TJ ≤ 125°C; VIN = 2.5 V or (VOUT + 1.0 V), whatever is greater; IOUT = 1 mA,

CIN = COUT = 1 mF, unless otherwise noted. Typical values are at TJ = +25°C. (Note 3)

Parameter Test Conditions Symbol Min Typ Max Unit

Operating Input Voltage VIN 2.5 24 V

Output Voltage Accuracy

(fixed versions)

−40°C ≤ TJ ≤ 125°C,

VOUT + 1 V < VIN < 16 V,

0.1 mA < IOUT < 300 mA (Note 5)

VOUT < 1.8 V VOUT −3% +3% V

VOUT ≥ 1.8 V −2% +2%

Reference Voltage −40°C ≤ TJ ≤ 125°C,

VOUT + 1 V < VIN < 16 V

VADJ 1.2 V

Reference Voltage Accuracy −40°C ≤ TJ ≤ 125°C,

VOUT + 1 V < VIN < 16 V

VOUT −2% +2% V

Line Regulation VOUT + 1 V ≤ VIN ≤ 16 V, Iout = 1 mA RegLINE 10 mV

Load Regulation IOUT = 0.1 mA to 300 mA RegLOAD 10 mV

Dropout Voltage

(Package TSOT−23−5)

VDO = VIN – (VOUT(NOM) – 3%),

IOUT = 300 mA (Note 4)

2.1 V – 2.4 V VDO 480 mV

2.5 V − 2.7 V 320 490

2.8 V − 3.2 V 295 465

3.3 V – 4.9 V 275 440

5 V 250 380

Dropout Voltage

(Package WDFN6)

VDO = VIN – (VOUT(NOM) – 3%),

IOUT = 300 mA (Note 4)

2.1 V – 2.4 V VDO 490 mV

2.5 V − 2.7 V 335 505

2.8 V − 3.2 V 305 475

3.3 V – 4.9 V 285 450

5 V 260 395

Maximum Output Current VIN = VOUT + 1 V (Note 5) ILIM 300 800 mA

Disable Current VEN = 0 V, VIN = 5 V IDIS 0.1 1.0 mA

Quiescent Current IOUT = 0 mA, −40°C ≤ TJ ≤ 125°CIQ4.0 8.0 mA

Ground current IOUT = 10 mA IGND 50 mA

IOUT = 300 mA 300

Power Supply Rejection Ratio VIN = 3.5 V + 100 mVpp

VOUT = 2.5 V

IOUT = 1 mA, Cout = 1 mF

f = 1 kHz PSRR 60 dB

Output Noise Voltage VOUT = 1.2 V, IOUT = 10 mA

f = 100 Hz to 100 kHz

VN36 mVrms

Enable Input Threshold Voltage Voltage increasing VEN_HI 1.2 − − V

Voltage decreasing VEN_LO − − 0.4

ADJ Pin Current VIN = VOUT + 1 V IADJ 0.1 1.0 mA

EN Pin Current VEN = 5.5 V IEN 100 nA

Active Output Discharge

Resistance

VIN = 5.5 V, VEN = 0 V Rdis 100 W

Thermal Shutdown Temperature

(Note 6)

Temperature increasing from TJ = +25°C TSD 165 °C

Thermal Shutdown Hysteresis

(Note 6)

Temperature falling from TSD TSDH −25 −°C

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

3. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at TJ = TA =

25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

4. Voltage dropout for voltage variants below 2.1 V is given by minimum input voltage 2.5 V.

5. Respect SOA

6. Guaranteed by design and characterization.

NCP718

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TYPICAL CHARACTERISTICS

Figure 3. Output Voltage vs. Temperature −

VOUT = 1.2 V

Figure 4. Quiescent Current vs. Input Voltage

TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V)

100806040200−20−40

1.180

1.184

1.192

1.196

1.200

1.220

2218161210842

2.0

2.2

2.6

2.8

3.0

3.4

3.8

4.0

Figure 5. Disable Current vs. Temperature Figure 6. Current to Enable Pin vs.

Temperature

TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)

120806040200−20−40

0.1

0.2

0.3

0.4

0.5

0.6

1.0

120806040200−20−40

0.01

0.02

0.06

0.07

0.08

0.09

0.10

Figure 7. Ground Current vs. Output Current −

VOUT = 1.2 V

Figure 8. Short Circuit Current vs.

Temperature

IOUT

, OUTPUT CURRENT (mA) TJ, JUNCTION TEMPERATURE (°C)

97654210

1201006040200−20−40

440

460

500

520

560

580

600

640

VOUT

, OUTPUT VOLTAGE (V)

IQ, QUIESCENT CURRENT (mA)

IDIS, DISABLE CURRENT (mA)

IEN, ENABLE CURRENT (mA)

IGND, GROUND CURRENT (mA)

ISC, SHORT CIRCUIT CURRENT (mA)

120

1.188

1.204

1.208

1.212

1.216

0.7

0.8

0.9

100

3810

6142024

2.4

3.2

3.6

100

0.05

0.04

0.03

480

540

620

VIN = 2.5 V

VOUT = 1.2 V

CIN = 1 mF

COUT = 1 mF

IOUT = 1 mA

VIN = 24 V

CIN = 1 mF

COUT = 1 mF

VIN = 2.5 V

VOUT = 1.2 V

CIN = 1 mF

COUT = 1 mF

VIN = 2.5 V

VOUT = 1.2 V

CIN = 1 mF

COUT = 1 mF

VEN = VIN

VOUT = 1.2 V

IOUT = 10 mA

CIN = 1 mF

COUT = 1 mF

VIN = 24 V

VIN = 2.5 V

VOUT = 1.2 V

CIN = 1 mF

COUT = 1 mF

125°C

25°C

−40°C

NCP718

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TYPICAL CHARACTERISTICS

Figure 9. SOA Current Limit vs. Differential

Voltage

Figure 10. Dropout Voltage vs. Output Current

− VOUT = 2.5 V

VDIF

, DIFFERENTIAL VOLTAGE VIN − VOUT (V) IOUT

, OUTPUT CURRENT (mA)

201814 246420

120

240

300

360

480

600

0.360.280.240.200.120.080.040

0.04

0.08

0.16

0.24

0.28

0.32

0.40

Figure 11. Power Supply Rejection Ratio vs.

Current, VIN = 3.5 V, COUT = 1 mF

Figure 12. Power Supply Rejection Ratio vs.

Current, VIN = 12 V, COUT = 1 mF

FREQUENCY (Hz) FREQUENCY (Hz)

10M1M100K10K1K10010

Figure 13. Output Voltage Noise Spectral

Density for VOUT = 1.2 V, IOUT = 10 mA,

COUT = 1 mF

Figure 14. Output Voltage Noise Spectral

Density for VOUT = 1.8 V, IOUT = 10 mA,

COUT = 1 mF

FREQUENCY (Hz) FREQUENCY (Hz)

1M100K10K1K10010

100

10K

100K

1M100K10K1K10010

100

10K

100K

SOA CURRENT LIMITATION (mA)

VDROP

, DROPOUT VOLTAGE (mV)

RR, RIPPLE REJECTION (dB)

OUTPUT VOLTAGE NOISE (nV/√Hz)

121081622

180

420

540

0.16 0.32 0.40

0.12

0.20

0.36

f = 50 Hz

Duty = 20%

CIN = 1 mF

COUT = 1 mF

VOUT = 2.5 V

CIN = 1 mF

COUT = 1 mF

125°C

25°C

−40°C

VIN = 2.5 V

VOUT = 1.2 V

IOUT = 10 mA

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

1 mA

10 mA

100 mA

1 mA

10 mA

100 mA

VIN = 3.5 V

VOUT = 2.5 V

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

VIN = 2.8 V

VOUT = 1.8 V

IOUT = 10 mA

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

VIN = 12 V

VOUT = 2.5 V

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

NCP718

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APPLICATIONS INFORMATION

The NCP718 is the member of new family of Wide Input

Voltage Range Low Dropout Regulators which delivers

Ultra Low Ground Current consumption, Good Noise and

Power Supply Rejection Ratio Performance. The NCP718

incorporates EN pin and soft−start feature for simple

controlling by microprocessor or logic.

Input Decoupling (CIN)

It is recommended to connect at least 1 mF ceramic X5R

or X7R capacitor between IN and GND pin of the device.

This capacitor will provide a low impedance path for any

unwanted AC signals or noise superimposed onto constant

input voltage. The good input capacitor will limit the

influence of input trace inductances and source resistance

during sudden load current changes.

Higher capacitance and lower ESR capacitors will

improve the overall line transient response.

Output Decoupling (COUT)

The NCP718 does not require a minimum Equivalent

Series Resistance (ESR) for the output capacitor. The device

is designed to be stable with standard ceramics capacitors

with values of 1 mF or greater. The X5R and X7R types have

the lowest capacitance variations over temperature thus they

are recommended.

Power Dissipation and Heat Sinking

The maximum power dissipation supported by the device

is dependent upon board design and layout. Mounting pad

configuration on the PCB, the board material, and the

ambient temperature affect the rate of junction temperature

rise for the part. For reliable operation junction temperature

should be limited to +125°C.

The maximum power dissipation the NCP718 can handle

is given by:

PD(MAX) +ƪTJ(MAX) *TAƫ

RqJA

(eq. 1)

The power dissipated by the NCP718 for given

application conditions can be calculated from the following

equations:

PD[VINǒIGND(IOUT)Ǔ)IOUTǒVIN *VOUTǓ(eq. 2)

VIN(MAX) [

PD(MAX) )ǒVOUT IOUTǓ

IOUT )IGND

(eq. 3)

Hints

VIN and GND printed circuit board traces should be as

wide as possible. When the impedance of these traces is

high, there is a chance to pick up noise or cause the regulator

to malfunction. Place external components, especially the

output capacitor, as close as possible to the NCP718, and

make traces as short as possible.

NCP718

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ORDERING INFORMATION

Device Part No. Voltage Option Marking Option Package Shipping†

NCP718AMTADJTBG Adj. GA

With Active Output

Discharge

WDFN6

(Pb−Free) 3000 / Tape & Reel

NCP718AMT120TBG 1.2 V GN

NCP718AMT180TBG 1.8 V GP

NCP718AMT300TBG 3.0 V GQ

NCP718AMT330TBG 3.3 V GR

NCP718AMT500TBG 5.0 V GM

NCP718BMTADJTBG Adj. GC

Without Active Output

Discharge

NCP718BMT180TBG 1.8 V GU

NCP718BMT300TBG 3.0 V GV

NCP718BMT330TBG 3.3 V GW

NCP718BMT500TBG 5.0 V GE

NCP718ASNADJT1G Adj. GAA

With Active Output

Discharge

TSOT−23−5

(Pb−Free) 3000 / Tape & Reel

NCP718ASN120T1G 1.2 V GAE

NCP718ASN150T1G 1.5 V GAF

NCP718ASN180T1G 1.8 V GAD

NCP718ASN250T1G 2.5 V GAG

NCP718ASN300T1G 3.0 V GAH

NCP718ASN330T1G 3.3 V GAJ

NCP718ASN500T1G 5.0 V GAK

NCP718BSNADJT1G Adj. GAC

Without Active Output

Discharge

NCP718BSN120T1G 1.2 V GCA

NCP718BSN150T1G 1.5 V GCC

NCP718BSN180T1G 1.8 V GCD

NCP718BSN250T1G 2.5 V GCF

NCP718BSN300T1G 3.0 V GCG

NCP718BSN330T1G 3.3 V GCH

NCP718BSN500T1G 5.0 V GCE

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

NCP718

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PACKAGE DIMENSIONS

TSOT−23−5

CASE 419AE

ISSUE O

E1 E

TOP VIEW

SIDE VIEW END VIEW

LL2

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MO-193.

SYMBOL

MIN NOM MAX

0º 8º

0.01

0.80

0.30

0.12

0.30

0.05

0.87

0.15

2.90 BSC

2.80 BSC

1.60 BSC

0.95 TYP

0.40

0.60 REF

0.25 BSC

1.00

0.10

0.90

0.45

0.20

0.50

NCP718

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PACKAGE DIMENSIONS

WDFN6 2x2, 0.65P

CASE 511BR

ISSUE B

MOUNTING FOOTPRINT*

RECOMMENDED

DIMENSIONS: MILLIMETERS

0.45

2.30

1.12

1.72

0.65

PITCH

6X 0.40

PACKAGE

OUTLINE

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

ÍÍÍ

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND

IS MEASURED BETWEEN 0.15 AND 0.25 mm FROM

THE TERMINAL TIP.

4. COPLANARITY APPLIES TO THE EXPOSED PAD AS

WELL AS THE TERMINALS.

5. FOR DEVICES CONTAINING WETTABLE FLANK

OPTION, DETAIL A ALTERNATE CONSTRUCTION

A-2 AND DETAIL B ALTERNATE CONSTRUCTION

B-2 ARE NOT APPLICABLE.

SEATING

PLANE

0.10 C

0.10 C DIM

MIN MAX

MILLIMETERS

0.70 0.80

A1 0.00 0.05

A3 0.20 REF

b0.25 0.35

D2.00 BSC

D2 1.50 1.70

0.90 1.10

E2.00 BSC

e0.65 BSC

0.20 0.40

PIN ONE

REFERENCE

0.05 C

NOTE 4

A0.10 C

NOTE 3

0.05 C

BOTTOM VIEW

DETAIL A

ALTERNATE

CONSTRUCTIONS

DETAIL A

DETAIL B

TOP VIEW

SIDE VIEW

--- 0.15

ÉÉ

ÇÇ

DETAIL B

MOLD CMPDEXPOSED Cu

ALTERNATE

CONSTRUCTIONS

ÉÉ

ÇÇ

ALTERNATE B−2ALTERNATE B−1

ALTERNATE A−2ALTERNATE A−1

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PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

NCP718/D

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