EVALUATION KIT AVAILABLE MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO General Description The MAX11300 integrates a PIXITM, 12-bit, multichannel, analog-to-digital converter (ADC) and a 12-bit, multichannel, buffered digital-to-analog converter (DAC) in a single integrated circuit. This device offers 20 mixed-signal highvoltage, bipolar ports, which are configurable as an ADC analog input, a DAC analog output, a general-purpose input (GPI), a general-purpose output (GPO), or an analog switch terminal. One internal and two external temperature sensors track junction and environmental temperature. Adjacent pairs of ports are configurable as a logic-level translator for open-drain devices or an analog switch. PIXI ports provide highly flexible hardware configuration for 12-bit mixed-signal applications. The MAX11300 is best suited for applications that demand a mixture of analog and digital functions. Each port is individually configurable with up to four selectable voltage ranges within -10V to +10V. The MAX11300 allows for the averaging of 2, 4, 8, 16, 32, 64, or 128 ADC samples from each ADC-configured port to improve noise performance. A DAC-configured output port can drive up to 25mA. The GPIO ports can be programmed to user-defined logic levels, and a GPI coupled with a GPO forms a logic-level translator. Internal and external temperature measurements monitor programmable conditions of minimum and maximum temperature limits, using the interrupt to notify the host if one or more conditions occur. The temperature measurement results are made available through the serial interface. The device features an internal, low-noise 2.5V voltage reference and provides the option to use external voltage references with separate inputs for the DAC and ADC. The device uses a 4-wire, 20MHz, SPI-compatible serial interface, operating from a 5V analog supply and a 1.8V to 5.0V digital supply. The PIXI port supply voltages operate from a wide range of -12.0V to +12.0V. Benefits and Features 20 Configurable Mixed-Signal Ports Maximize Design Flexibility Across Platforms * Up to 20 12-Bit ADC Inputs * Single-Ended, Differential, or Pseudo-Differential * Range Options: 0 to 2.5V, 5V, 0 to +10V, -10V to 0V * Programmable Sample Averaging Per ADC Port * Unique Voltage Reference for Each ADC PIXI Port * Up to 20 12-Bit DAC Outputs * Range Options: 5V, 0 to +10V, -10V to 0V * 25mA Current Drive Capability with Overcurrent Protection * Up to 20 General-Purpose Digital I/Os * 0 to +5V GPI Input Range * 0 to +2.5V GPI Programmable Threshold Range * 0 to +10V GPO Programmable Output Range * Logic-Level Shifting Between Any Two Pins * 60 Analog Switch Between Adjacent PIXI Ports * Internal/External Temperature Sensors, 1C Accuracy Adapts to Specific Application Requirements and Allows for Easy Reconfiguration as System Needs Change Configurability of Functions Enables Optimized PCB Layout Reduces BOM Cost with Fewer Components in Small Footprint * 36mm2 40-Pin TQFN * 49mm2 48-Pin TQFP Ordering Information appears at end of data sheet. The MAX11300 is available in a 40-pin TQFN, 6mm x 6mm package or a 48-pin TQFP, 7mm x 7mm package specified over the -40C to +105C temperature range. Applications Base Station RF Power Device Bias Controllers System Supervision and Control Power-Supply Monitoring Industrial Control and Automation Control for Optical Components 19-7318; Rev 3; 4/16 PIXI is a trademark of Maxim Integrated Products, Inc. MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Functional Diagram DVDD DAC_REF ADC_INT_REF ADC_EXT_REF AVDD CLOCK GENERATOR 2.5V INTERNAL REFERENCE AVDDIO MAX11300 2.5V TEMPERATURE MONITORS EXT AND INT TEMP SENSORS D1P D1N D0P D0N REFERENCE MUX CNVT DOUT CS SCLK ADC SEQUENCER ADC SERIAL INTERFACE AND DIGITAL CORE DAC 20 20 20 DAC SEQUENCER GPI 20 GPO 20 PIXI PORT MANAGER PORT[x+1] PORT[x] (0 x 18) DIN INT www.maximintegrated.com DGND AGND1 AGND AVSSIO Maxim Integrated 2 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Absolute Maximum Ratings DVDD to DGND........................................................-0.3V to +6V AVDD to AGND........................................................-0.3V to +6V AVDDIO to AVSSIO................................................-0.3V to +25V AVDDIO to AGND...................................................-0.3V to +17V AVSSIO to AGND...................................................-14V to +0.3V AGND to AGND1...................................................-0.3V to +0.3V AGND to DGND....................................................-0.3V to +0.3V AGND1 to DGND..................................................-0.3V to +0.3V (PORT0 to PORT19) to AGND..............max of (VAVSSIO - 0.3V) or -14V to min of (VAVDDIO + 0.3V) or +17V (PORT0 to PORT19) to AGND (GPI and Bidirectional Level Translator Modes)...... -0.3V to the min of (VAVDD + 0.3V) or +6V (CNVT, DOUT) to DGND.... -0.3V to the min of (VDVDD + 0.3V) or +6V (CS, SCLK, DIN, INT) to DGND...............................-0.3V to +6V DAC and ADC Reference Pins to AGND (DAC_REF, ADC_INT_REF, ADC_EXT_REF)............... -0.3V to the min of (VAVDD + 0.3V) or +4V Temperature Sensor Pins (D0N, D0P, D1N, D1P) to AGND..................... -0.3V to the min of (VAVDD + 0.3V) or +6V Current into Any PORT Pin...............................................100mA Current into Any Other Pin Except Supplies and Ground.....................................................................50mA Continuous Power Dissipation (TA = +70C) (Multilayer board) TQFN (derate 37mW/C above +70C) ....................2963mW TQFP (derate 36.2mW/C above +70C)................2898.6mW Operating Temperature Range.......................... -40C to +105C Storage Temperature Range............................. -65C to +150C Lead Temperature (soldering, 10s).................................. +300C Soldering Temperature (reflow)........................................+260C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 1) TQFN Junction-to-Case Thermal Resistance (JC)..................1C/W Junction-to-Ambient Thermal Resistance (JA)...........27C/W TQFP Junction-to-Case Thermal Resistance (JC)..................2C/W Junction-to-Ambient Thermal Resistance (JA)........27.6C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics ADC Electrical Specifications (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC ACCURACY (Note 3) Resolution 12 Integral Nonlinearity INL Differential Nonlinearity DNL Offset Error Offset Error Drift Bits No missing codes over temperature 0.5 LSB 1 LSB 8 0.002 Gain Error Gain Error Drift 2.5 LSB LSB/C 11 LSB 0.01 LSB/C Channel-to-Channel Offset Matching 1 LSB Channel-to-Channel Gain Matching 2 LSB www.maximintegrated.com Maxim Integrated 3 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Electrical Characteristics (continued) ADC Electrical Specifications (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE (Single-Ended Inputs) Signal-to-Noise Plus Distortion SINAD fS = 400ksps, fIN = 10kHz fS = 400ksps, fIN = 10kHz 70 dB 71 dB fS = 400ksps, fIN = 10kHz fS = 400ksps, fIN = 10kHz -75 dB 75 dB Crosstalk fS = 100ksps, fIN = 10kHz DYNAMIC PERFORMANCE (Differential Inputs) -85 dB Signal-to-Noise Plus Distortion Signal to Noise SNR Total Harmonic Distortion THD Spurious-Free Dynamic Range Signal to Noise Total Harmonic Distortion Spurious-Free Dynamic Range SFDR SINAD fS = 400ksps, fIN = 10kHz 71 dB SNR fS = 400ksps, fIN = 10kHz fS = 400ksps, fIN = 10kHz 72 dB -82 dB THD SFDR Crosstalk fS = 400ksps, fIN = 10kHz fS = 100ksps, fIN = 10kHz 82 dB -85 dB ADCCONV[1:0] = 00 200 ADCCONV[1:0] = 01 250 ADCCONV[1:0] = 10 333 ADCCONV[1:0] = 11 400 ADCCONV[1:0] = 00 3.5 ADCCONV[1:0] = 01 2.5 ADCCONV[1:0] = 10 1.5 ADCCONV[1:0] = 11 1.0 CONVERSION RATE Throughput (Note 4) Acquisition Time tACQ ksps s ANALOG INPUT (All Ports) Absolute Input Voltage (Note 5) Input Resistance www.maximintegrated.com VPORT Range 1 0 10 Range 2 -5 +5 Range 3 -10 0 V Range 4 0 Range 1, 2, 3 70 100 130 2.5 k Range 4 50 75 100 k Maxim Integrated 4 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO REF Electrical Specifications (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2.5 2.506 V 10 25 ppm/C 10 F 2.5 2.506 V 10 ADC INTERNAL REFERENCE Reference Output Voltage REF Output Tempco (Note 6) Internal references at TA = +25C 2.494 TC-VREF Capacitor Bypass at ADC_INT_ REF 4.7 DAC INTERNAL REFERENCE Reference Output Voltage REF Output Tempco (Note 6) Internal references at TA = +25C 2.494 TC-VREF Capacitor Bypass at DAC_REF 25 ppm/C 4.7 10 F 2 2.75 V 1.25 2.5 V ADC EXTERNAL REFERENCE Reference Input Range DAC EXTERNAL REFERENCE Reference Input Range GPIO Electrical Specifications (VAVDD = 5.0V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VDACREF V GPIO EXCEPT IN BIDIRECTIONAL LEVEL TRANSLATION MODE Programmable Input Logic Threshold VITH 0.3 Input High Voltage VIH VITH + 0.3 Input Low Voltage VIL VITH - 0.3 Hysteresis Programmable Output Logic Level V 30 VOLVL Propagation Delay from GPI Input to GPO Output in Unidirectional Level Translating Mode Midscale threshold, 5V logic swing mV 4x VDACREF 0 V 2 V s BIDIRECTIONAL LEVEL TRANSLATION PATH AND ANALOG SWITCH Input High Voltage VIH Input Low Voltage VIL On-Resistance www.maximintegrated.com 1 From VAVSSIO +2.50V to VAVDDIO - 2.50V V 0.2 V 60 Maxim Integrated 5 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO GPIO Electrical Specifications (continued) (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP 10k pullup resistors to rail in each side. Midvoltage to midvoltage when driving side goes from high to low Propagation Delay MAX UNITS 1 s ANALOG SWITCH Turn-On Delay (Note 7) 400 ns Turn-Off Delay (Note 7) 400 ns On-Time Duration (Note 7) 1 s Off-Time Duration (Note 7) 1 s On-Resistance From VAVSSIO +2.50V to VAVDDIO - 2.50V 60 DAC Electrical Specifications (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC ACCURACY Resolution N Output Range (Note 5) VPORT Integral Linearity Error INL Differential Linearity Error DNL Offset Voltage 12 0 +10 Range 2 -5 +5 Range 3 -10 From code 100 to code 3996 0.5 At code 100 1.5 LSB 1 LSB 20 LSB 15 Gain Error From code 100 to code 3996 Gain Error Tempco From code 100 to code 3996 PSRR V 0 0.5 Offset Voltage Tempco Power-Supply Rejection Ratio Bits Range 1 -0.6 ppm/C +0.6 % of FS 4 ppm of FS/C 0.4 mV/V 1.6 V/s 40 s 6 s 3.8 mVP-P DYNAMIC CHARACTERISTICS Output Voltage Slew Rate Output Settling Time SR To 1 LSB, from 0 to full scale, output load capacitance of 250pF (Note 7) Settling Time After CurrentLimit Condition Noise www.maximintegrated.com f = 0.1Hz to 300kHz Maxim Integrated 6 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO DAC Electrical Specifications (continued) (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS TRACK-AND-HOLD Digital Feedthrough 5 Hold Step 1 6 mV 0.3 15 mV/s Droop Rate (note 6) nV*s Interface Digital IO Electrical Specifications (VAVDD = 5.0V, VDVDD = 1.62V to 5.50V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SPI IO DC SPECIFICATION Input High Voltage (DIN, SCLK, CS, CNVT) Input Low Voltage (DIN, SCLK, CS, CNVT) Input Leakage Current (DIN, SCLK, CS, CNVT, INT) VDVDD = 2.50V to 5.50V 0.7 x VDVDD V VDVDD = 1.62V to 2.50V 0.85 x VDVDD V VDVDD = 2.50V to 5.50V 0.3 x VDVDD V VDVDD = 1.62V to 2.50V 0.15 x VDVDD V +10 A Input voltage at DVDD -10 Input Capacitance (DIN, SCLK, CS, CNVT) 10 ISRC = 5mA, VDVDD = 2.50V to 5.50V VDVDD 0.5 V ISRC = 2mA, VDVDD = 1.62V to 2.50V VDVDD 0.3 V Output High Voltage (DOUT) Output Low Voltage (DOUT, INT) Output Leakage Current (DOUT) www.maximintegrated.com pF ISNK = 5mA, VDVDD = 2.50V to 5.50V 0.4 ISNK = 2mA, VDVDD = 1.62V to 2.50V -10 V 0.2 V +10 A Maxim Integrated 7 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Interface Digital IO Electrical Specifications (continued) (VAVDD = 5.0V, VDVDD = 1.62V to 5.50V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 20 MHz 10 MHz SPI TIMING REQUIREMENTS (See Figures 1 and 2) SCLK Frequency fSCLK SCLK Clock Period tCP SCLK Pulse-Width High tCH SCLK Pulse-Width Low tCL VDVDD = 2.50V to 5.50V VDVDD = 1.62V to 2.50V VDVDD = 2.50V to 5.50V 50 ns VDVDD = 1.62V to 2.50V 100 ns 10 ns VDVDD = 2.50V to 5.50V 25 ns VDVDD = 1.62V to 2.50V 65 ns CS Low to First SCLK Rise Setup tCSS0 5 ns 24th SCLK Rising Edge to CS Rising Edge tCSS1 5 ns SCLK Rise to CS Low tCSH0 5 ns CS Pulse-Width High tCSW 50 ns DIN to SCLK Setup tDS 5 ns DIN Hold After SCLK tDH 5 ns DOUT Transition Valid After SCLK Fall tDOT CS Rise to DOUT Disable tDOD tCSH0 tCSS0 tDS tDH VDVDD = 2.50V to 5.50V 23 ns VDVDD = 1.62V to 2.50V 55 ns CLOAD = 20pF 50 ns tCP tCSS1 tCSW tCH tCL CS SCLK AD6 DIN DOUT AD5 AD2 AD1 AD0 RB/W D[N16-1] D[N16-2] D[N16-3] D[N16-12] D[N16-15] D[N16-16] HIGH-Z Figure 1. SPI Write Timing (N = Number of Words Written; N > 1 for Burst Mode) www.maximintegrated.com Maxim Integrated 8 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO tCSH0 tCSS0 tDS tDH tCP tDOT tCSS1 tCSW tCH tCL CS SCLK AD6 DIN DOUT AD5 AD2 AD1 AD0 RB/W HIGH-Z tDOD D[N16-1] D[N16-2] D[N16-3] D[N16-12] D[N16-15] HIGH-Z D[N16-16] Figure 2. SPI Read Timing (N = Number of Words Written; N > 1 for Burst Mode) Internal and External Temperature Sensor Specifications (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ACCURACY Accuracy of Internal Sensor (Note 6,8) Accuracy of External Sensor (Note 6,8) 0C TJ +80C 0.3 2.0 C -40C TJ +125C 0.7 5 C 0C TRJ +80C 0.3 2.0 C -40C TRJ +150C 1.0 5 C Temperature Measurement Resolution External Sensor Junction Current External Sensor Junction Current D0N/D1N Voltage www.maximintegrated.com 0.125 C High 68 A Low 4 A High Series resistance cancellation mode 136 A Low Series resistance cancellation mode 8 A 0.5 V Internally generated Maxim Integrated 9 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Power Supply Specifications PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VAVDD 4.75 5.25 V VDVDD 1.62 5.50 V VAVDD 15.75 V - 12.0 0 V VAVDD 24 V 18 mA VAVDDIO VAVSSIO VAVDDIO to VAVSSIO IAVDD All ports in high-impedance mode 14 LPEN = 1 11 mA All ports in ADC-related modes 17 mA All ports in DAC-related modes 18 IDVDD Serial interface in idle mode IAVDDIO All ports in mode 0 IAVSSIO mA 2 A 150 A -400 All ports in mode 0 A Recommended VDDIO/VSSIO Supply Selection DAC RANGE ADC RANGE -10V TO 0V -5V TO +5V 0V TO +10V 0 TO 2.5V -10V TO 0V VAVDDIO = +5V VAVSSIO = -12V VAVDDIO = +5V VAVSSIO = -12V VAVDDIO = +10V VAVSSIO = -12V VAVDDIO = +5V VAVSSIO = -12V -5V TO +5V VAVDDIO = +7V VAVSSIO = -10V VAVDDIO = +7V VAVSSIO = -7V VAVDDIO = +10V VAVSSIO = -7V VAVDDIO = +7V VAVSSIO = -7V 0V TO +10V VAVDDIO = +12V VAVSSIO = -10V VAVDDIO = +12V VAVSSIO = -5V VAVDDIO = +12V VAVSSIO = -2V VAVDDIO = +12V VAVSSIO = -2V The values of VAVDDIO and VAVSSIO supply voltages depend on the application circuit and the device configuration. VAVDDIO needs to be the maximum of those four values: If one or more ports are in mode 3, 4, 5, 6, or 10 (DAC-related modes), VAVDDIO must be set, at minimum, to the value of the largest voltage driven by any of the ports set in those modes. For improved linearity, it is recommended to set VAVDDIO 2.0V above the largest voltage value. If one or more ports are in mode 7, 8, or 9 (ADC-related modes), VAVDDIO must be set, at minimum, to the value of the largest voltage applied to any of the ports set in those modes. If one or more ports are in mode 11 or 12 (Analog switch-related modes), VAVDDIO must be set, at minimum, to 2.0V above the value of the largest voltage applied to any of the ports functioning as analog switch terminals. VAVDDIO cannot be set lower than VAVDD. VAVSSIO needs to be the minimum of those four values: If one or more ports are in mode 3, 4, 5, 6, or 10 (DAC-related modes), VAVSSIO must be set, at maximum, to the value of the lowest voltage driven by any of the ports set in those modes. For improved linearity, it is recommended to set VAVSSIO 2.0V below the lowest voltage value. If one or more ports are in mode 7, 8, or 9 (ADC-related modes), VAVSSIO must be set, at maximum, to the value of the lowest voltage applied to any of the ports set in those modes. www.maximintegrated.com Maxim Integrated 10 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Recommended VDDIO/VSSIO Supply Selection (continued) If one or more ports are in mode 11 or 12 (Analog Switch-related modes), VAVSSIO must be set, at maximum, to 2.0V below the value of the lowest voltage applied to any of the ports functioning as analog switch terminals. VAVSSIO cannot be set higher than VAGND. For example, the MAX11300 can operate with only one voltage supply of 5V (5%) connected to AVDD, AVDDIO, and DVDD, and one ground of 0V connected to AGND, DGND, and AVSSIO. However, the level of performance presented in the electrical specifications requires the setting of the supplies connected to AVDDIO and AVSSIO as previously described. Common PIXI Electrical Specifications (VAVDD = 4.75V to 5.25V, VDVDD = 3.3V, VAVDDIO = +12.0V, VAGND = VDGND = 0V, VAVSSIO = -2.0V, VDACREF = 2.5V, VADCREF = 2.5V (Internal), fS = 400ksps, 10V analog input range set to range 1 (0 to +10V). TA = -40C to +105C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 100 k 100 ms 250 pF VAVSSIO + 1.0 V PIXI PORTS Input Capacitance All PIXI ports Input Resistance All PIXI input ports except ADC mode Startup Time Between stable supplies and accessing registers 20 50 75 pF HIGH-VOLTAGE OUTPUT DRIVER CHARACTERISTICS Maximum Output Capacitance Output Low Voltage, DAC Mode Sinking 25mA, VAVSSIO = 0V, AVDDIO = 10V Output High Voltage, DAC Mode Sourcing 25mA, VAVSSIO = 0V, VAVDDIO = 10V Output Low Voltage, GPO Mode Sinking 2mA, VAVSSIO = 0V, VAVDDIO = 10V Output High Voltage, GPO Mode Sourcing 2mA, VAVSSIO = 0V, VAVDDIO = 10V Current Limit VAVDDIO - 1.5 V VAVSSIO + 0.4 VAVDDIO - 0.4 V V Short to AVDDIO 75 mA Short to AVSSIO 75 mA Note 2: Electrical specifications are production tested at TA = +25C. Specifications over the entire operating temperature range are guaranteed by design and characterization. Typical specifications are at TA = +25C. Note 3: DC accuracy specifications are tested for single-ended ADC inputs only. Note 4: The effective ADC sample rate for port X configured in mode 6, 7, or 8 is: [ADC sample rate per ADCCONV]/(([number of ports in modes 6,7,8] + [1 if TMPSEL 000]) x [2# OF SAMPLES for port X]) Note 5: See the Recommended VDDIO/VSSIO Supply Selection table for each range. For ports in modes 6, 7, 8, or 9, the voltage applied to those ports must be within the limits of their selected input range, whether in single-ended or differential mode. Note 6: Specification is guaranteed by design and characterization. Note 7: Switch controlled by GPI-configured port. One switch terminal connected to 0V, the other terminal connected to 5V through a 5mA current source. Timing is measured at the 2.5V transition point. Turn-on and turn-off delays are measured from the edge of the control signal to the 2.5V transition point. Turn-on and turn-off durations are measured between control signal transitions. Note 8: In DAC-related modes, the rate, at which PIXI ports configured in mode 1, 3, 4, 5, 6, or 10 are refreshed, is as follows: 1/(40s x [number of ports in modes 1, 3, 4, 5, 6, 10]) Note 9: Typical (TYP) values represent the errors at the extremes of the given temperature range. www.maximintegrated.com Maxim Integrated 11 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Operating Characteristics (TA = +25C, unless otherwise noted.) ADC INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE INTERNAL REFERENCE toc01 toc02 1 0.8 2 0.6 1.5 1 0.4 1 0.5 0.2 0.5 0 -0.5 -1 RANGE 0V TO 10V RANGE -5V TO +5V -2 0 1000 0 -0.2 2000 3000 -1 -0.6 -1 4000 0 1000 DIGITAL OUPUT CODE (DECIMAL) toc04 0.4 -2 0.2 0 -0.2 -0.4 RANGE 0V TO 10V RANGE -5V TO +5V RANGE -10V TO 0V 0 1000 -5 -6 RANGE 0-10V RANGE -5V - +5V RANGE -10 - 0V RANGE 0 - 2.5V -50 4000 3000 4000 toc06 -25 0 -0.5 -1.5 -2.5 -3.5 RANGE 0-10V 50 75 100 125 -50 -25 0 TEMPERATURE (C) ADC OFFSET ERROR vs. SUPPLY VOLTAGE RANGE -5V - +5V RANGE -10 - 0V -4.5 25 RANGE 0 - 2.5V 25 50 75 100 125 TEMPERATURE (C) ADC GAIN ERROR vs. SUPPLY VOLTAGE toc07 toc08 1 0 -1 0 -2 GAIN ERROR (LSB) OFFSET ERROR (LSB) 2000 ADC GAIN ERROR vs. TEMPERATURE toc05 -4 DIGITAL OUPUT CODE (DECIMAL) 1 1000 DIGITAL OUPUT CODE (DECIMAL) -3 -9 3000 RANGE -10V TO 0V 0 4000 0.5 -8 2000 3000 1.5 -7 -1 2000 GAIN ERROR (LSB) -1 OFFSET ERROR (LSB) 0 0.6 -0.8 RANGE -5V TO +5V -2.5 ADC OFFSET ERROR vs. TEMPERATURE 1 0.8 -0.6 RANGE 0V TO 10V -2 DIGITAL OUPUT CODE (DECIMAL) ADC DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE EXTERNAL REFERENCE 1 0 -1.5 RANGE 0V TO 10V RANGE -5V TO +5V RANGE -10V TO 0V toc03 -0.5 -0.4 -0.8 RANGE -10V TO 0V -2.5 INL (LSB) 2 -1.5 DNL (LSB) 2.5 1.5 DNL (LSB) INL (LSB) 2.5 ADC INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE EXTERNAL REFERENCE ADC DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE INTERNAL REFERENCE -3 -4 -5 -6 -7 -8 4.7 RANGE 0-10V RANGE -5V - +5V RANGE -10 - 0V RANGE 0 - 2.5V 4.8 4.9 5 5.1 SUPPLY VOLTAGE (V) www.maximintegrated.com 5.2 -1 -2 -3 RANGE 0-10V -4 5.3 RANGE -5V - +5V RANGE -10 - 0V 4.7 4.8 4.9 RANGE 0 - 2.5V 5 5.1 5.2 5.3 SUPPLY VOLTAGE (V) Maxim Integrated 12 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) SUPPLY CURRENT vs. TEMPERATURE ADC RANGE 0V TO 10V 100000 toc9a 100000 10000 SUPPLY CURRENT (A) SUPPLY CURRENT (A) IAVDD IAVSSIO 100 IAVDDIO 10 IAVDDIO 1 100 IAVDDIO 10 IAVDDIO 1 -50 -25 0 25 50 75 100 0.1 125 -50 -25 0 toc9c IAVDD CURRENT (mA) SUPPLY CURRENT (A) IAVDD IAVSSIO IAVDDIO 10 IAVDDIO 0 25 50 75 16 ADC RANGE -10V TO 0V 15.5 ADC RANGE 0V TO 10V 100 14 125 0 5 10 15 20 NO.OF ADC-CONFIGURED PORTS DAC INTEGRAL NONLINEARITY vs. DIGITAL CODE INTERNAL REFERENCE toc11 toc10 17 TEMPERATURE (C) ADC INTERNAL REFERENCE vs. TEMPERATURE 125 16.5 14.5 -25 100 15 1 -50 75 ADC RANGE -5V TO +5V 17.5 100 50 IAVDD vs. ADC CHANNELS 18 10000 1000 25 TEMPERATURE (C) SUPPLY CURRENT vs. TEMPERATURE ADC RANGE -10V TO 0V 100000 2.506 IAVDD IAVSSIO 1000 TEMPERATURE (C) 0.1 toc9b 10000 1000 0.1 SUPPLY CURRENT vs. TEMPERATURE ADC RANGE -5V TO +5V 1.5 DAC DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE INTERNAL REFERENCE toc12 toc13 1 2.502 0.5 2.500 0.4 0 2.498 -0.5 2.496 -1 2.494 0.6 DNL (LSB) 1 INL (LSB) REFERENCE VOLTAGE (V) 0.8 2.504 -25 0 25 50 75 TEMPERATURE (C) www.maximintegrated.com 100 125 0 -0.2 -0.4 -0.6 RANGE 0V TO 10V RANGE -5V TO +5V RANGE -10V TO 0V -1.5 -50 0.2 0 1000 2000 RANGE 0V TO 10V RANGE -5V TO +5V RANGE -10V TO 0V -0.8 -1 3000 DAC CODE (DECIMAL) 4000 0 1000 2000 3000 4000 DAC CODE (DECIMAL) Maxim Integrated 13 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) DAC INTEGRAL NONLINEARITY vs. DIGITAL CODE EXTERNAL REFERENCE DAC DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE EXTERNAL REFERENCE toc14 1.5 1 DAC OFFSET ERROR vs. TEMPERATURE toc15 0.8 1 0.6 0 OFFSET ERROR (LSB) 0.2 DNL (LSB) INL (LSB) 2.5 0.4 0.5 0 -0.2 -0.5 -0.4 -1 -0.6 RANGE 0V TO 10V RANGE -5V TO +5V RANGE -10V TO 0V -1.5 0 1000 3000 -1 4000 1.5 0.5 -0.5 RANGE 0V TO 10V RANGE 0V TO 10V RANGE -5V TO +5V RANGE -10V TO 0V -0.8 2000 0 1000 DAC CODE (DECIMAL) -1.5 RANGE -5V TO +5V RANGE -10V TO 0V 2000 3000 -2.5 4000 -50 -25 0 DAC CODE (DECIMAL) DAC GAIN ERROR vs. TEMPERATURE 2 25 50 75 100 125 TEMPERATURE (C) DAC OFFSET ERROR vs. SUPPLY VOLTAGE toc17 toc16 3.5 DAC GAIN ERROR vs. SUPPLY VOLTAGE toc18 4 toc19 -0.1 1.5 3 0.5 0 -0.5 -0.3 GAIN ERROR (LSB) OFFSET ERROR (LSB) 2 1 0 RANGE 0V TO 10V -1.5 -2 -50 -25 0 25 50 RANGE -5V TO +5V RANGE -10V TO 0V RANGE -10V TO 0V 100 -2 4.7 125 4.8 4.9 TEMPERATURE (C) toc20a 10000 IAVSSIO IAVDD 1000 100 IAVDDIO 10 IAVDDIO 1 0.1 RANGE 0V TO 10V -1.3 5 5.1 5.2 5.3 -25 0 25 50 75 TEMPERATURE (C) www.maximintegrated.com RANGE -10V TO 0V 4.7 4.8 4.9 toc20b 100 IAVDDIO 10 100 125 0.1 100000 IAVDD 1000 5.1 5.2 SUPPLY CURRENT vs. TEMPERATURE DAC RANGE -10V TO 0V 10000 IAVSSIO 5 5.3 SUPPLY VOLTAGE (V) IAVDDIO 1 -50 RANGE -5V TO +5V -1.5 SUPPLY CURRENT vs. TEMPERATURE DAC RANGE -5V TO +5V 100000 SUPPLY CURRENT (A) SUPPLY CURRENT (A) 10000 -0.9 SUPPLY VOLTAGE (V) SUPPLY CURRENT vs. TEMPERATURE DAC RANGE 0V TO 10V 100000 -0.7 RANGE 0V TO 10V -1 RANGE -5V TO +5V 75 -0.5 -1.1 -1 SUPPLY CURRENT (A) GAIN ERROR (LSB) 1 IAVSSIO toc20c IAVDD 1000 100 IAVDDIO 10 IAVDDIO 1 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 0.1 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) Maxim Integrated 14 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) 19 toc21a IAVDDIO vs. DAC CHANNELS 5 4.5 17 ADC RANGE 0V TO 10V ADC RANGE -5V TO +5V 16 15 ADC RANGE -10V TO 0V 14 13 2 ADC RANGE 0V TO 10V 1.5 1 0 5 10 15 0 20 5 10 15 DAC SETTLING TIME CHANGE FROM PSV1 TO PSV2 toc22 2.506 0 4 ADC RANGE 0V TO 10V 3 ADC RANGE -10V TO 0V 2 0 20 NO. OF DAC-CONFIGURED PORTS DAC INTERNAL REFERENCE vs. TEMPERATURE 5 1 0.5 NO. OF DAC-CONFIGURED PORTS 0 5 10 15 20 NO. OF DAC-CONFIGURED PORTS DAC SETTLING TIME CHANGE FROM MIN TO MAX NO LOAD toc23 toc24a PSV1 = 0X000 PSV2 = 0XFFF 2.504 REFERENCE VOLTAGE (V) ADC RANGE -10V TO 0V 2.5 toc21c ADC RANGE -5V TO +5V 6 3.5 3 IAVSSIO vs. DAC CHANNELS 7 ADC RANGE -5V TO +5V 4 IAVDDIO CURRENT (mA) IAVDD CURRENT (mA) 18 toc21b IAVSSIO CURRENT (mA) IAVDD vs. DAC CHANNELS 2.502 2.500 2V/div 2V/div 2.498 2.496 2.494 -50 -25 0 25 50 75 100 125 5s/div TEMPERATURE (C) DAC SETTLING TIME CHANGE FROM MAX TO MIN NO LOAD DAC SETTLING TIME CHANGE FROM MIN TO MAX 1F CAP LOAD toc24b 2V/div 2.5s/div www.maximintegrated.com 2.5s/div DAC SETTLING TIME CHANGE FROM MAX TO MIN 1F CAP LOAD toc24c 2V/div 50s/div toc24d 2V/div 50s/div Maxim Integrated 15 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) DAC DROOP RATE vs. TEMPERATURE (DAC RANGE -5V TO +5V) toc25a 0.30 0.07 0.20 DROOP RATE (mV/s) DROOP RATE (mV/s) AVDD = 5.25V 0.15 0.10 0.06 0.05 0.04 0.03 -50 -25 0 25 50 75 100 0.00 125 AVDD VAVDD= 5.25V = 5.25V -0.15 -0.20 -0.25 -0.40 -50 -25 0 TEMPERATURE (C) 25 50 75 100 125 -50 62.0 61.6 61.6 0.700 61.4 61.4 0.400 CURRENT (mA) 0.800 CURRENT (mA) 61.8 VOH 61.2 61.0 60.8 0.200 60.4 60.4 0.100 60.2 60.2 0 25 50 75 100 125 60.0 60.0 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) TEMPERATURE (C) DAC OUTPUT NOISE INTERNAL REFERENCE (0.1Hz TO 10Hz) MAJOR-CODE TRANSITION GLITCH DAC CODE FROM 0x7FF TO 0x800 toc29 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) DAC OUTPUT NOISE EXTERNAL REFERENCE (0.1Hz TO 10Hz) toc30 toc28 60.8 60.6 -25 100 61.0 60.6 -50 75 61.2 0.300 0.000 50 62.0 toc27 61.8 VOL 25 DAC DRIVE CURRENT LIMIT vs. TEMPERATURE DAC = 10V, SHORTED TO VSSIO 0.900 0.500 0 TEMPERATURE (C) DAC DRIVE CURRENT LIMIT vs. TEMPERATURE DAC = 0V, SHORTED TO VDDIO toc26 1.000 0.600 -25 TEMPERATURE (C) DAC VOH AND VOL vs. TEMPERATURE (ILOAD = 25mA) VOLTAGE (V) -0.10 -0.35 0.01 0.00 -0.05 VAVDD= =4.75V 4.75V AVDD VAVDD= =5V5V AVDD -0.30 0.02 0.05 toc25c 0.00 AVDD VAVDD==4.75V 4.75V 5V VAVDD==5V AVDD 5.25V VAVDD==5.25V AVDD 0.08 AVDD = 5V 0.25 toc25b 0.09 AVDD = 4.75V DAC DROOP RATE vs. TEMPERATURE (DAC RANGE -10V TO 0) DROOP RATE (mV/s) DAC DROOP RATE vs. TEMPERATURE (DAC RANGE 0 TO 10V) toc31 CS 5V/div 20V/div 20V/div DAC VOUT ACCOUPLED 1mV/div 10s/div www.maximintegrated.com 1s/div 1s/div Maxim Integrated 16 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) GPI OFFSET vs. SUPPLY VOLTAGE GPI OFFSET vs. TEMPERATURE toc32 4.5 toc33 6 4 5 3.5 OFFSET (mV) OFFSET (mV) 3 2.5 2 1.5 4 3 2 1 VTH= =0.9V 0.9V Vth Vth VTH= =0.9V 0.9V 1 VTH= =1.65V 1.65V Vth 0.5 VTH= =1.65V Vth 1.65V VTH= =2.5V 2.5V Vth 0 4.7 4.8 4.9 5 5.1 5.2 VTH= =2.5V 2.5V Vth 0 5.3 -50 -25 0 SUPPLY VOLTAGE (V) 1.0 0.8 34 32 30 28 26 20 VTH VTH==0.9V 0.9V VTH VTH==1.65V 1.65V -25 0 25 50 75 TEMPERATURE (C) www.maximintegrated.com 125 100 toc35 0.6 0.4 0.2 0.0 -0.2 -0.4 VTH VTH==2.5V 2.5V -50 100 1.2 TEMPERATURE ERROR (C) HYSTERESIS (mV) toc34 36 22 75 EXTERNAL TEMPERATURE SENSOR ERROR vs. TEMPERATURE 38 24 50 TEMPERATURE (C) GPI HYSTERESIS vs. TEMPERATURE 40 25 125 -0.6 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) Maxim Integrated 17 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO AVDDIO PORT3 PORT4 PORT5 21 PORT6 28 27 26 25 24 23 22 PORT7 29 PORT8 30 PORT9 PORT10 TOP VIEW PORT11 Pin Configurations PORT12 31 20 D1N AGND1 32 19 D1P AVDDIO 33 18 PORT2 PORT13 34 17 PORT1 16 PORT0 PORT15 36 15 AGND PORT16 37 14 AVDD PORT17 38 13 D0N 12 D0P 11 DAC_REF MAX11300 PORT14 35 PORT18 39 EP + 1 2 3 4 5 6 7 8 9 10 DGND DVDD DIN SCLK CS DOUT INT CNVT ADC_INT_REF ADC_EXT_REF PORT19 40 TQFN 6mm x 6mm www.maximintegrated.com Maxim Integrated 18 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO AGND1 PORT12 38 37 PORT14 AVDDIO PORT15 43 39 AVSSIO 44 40 PORT16 45 AVSSIO PORT17 PORT13 PORT18 42 41 AVSSIO 48 47 46 Pin Configurations (continued) PORT19 1 36 PORT11 DGND 2 35 PORT10 DVDD 3 34 AVSSIO DIN 4 33 PORT9 SCLK 5 32 PORT8 MAX11300 CS 6 31 PORT7 DOUT 7 30 PORT6 INT 8 29 AVSSIO CNVT 9 28 PORT5 ADC_INT_REF 10 27 PORT4 ADC_EXT_REF 11 26 AVDDIO 25 PORT3 EP 14 15 16 17 18 19 20 21 22 23 24 AVDD AVDD AGND PORT0 PORT1 PORT2 D1P D1N AVSSIO AGND 13 D0P 12 D0N DAC_REF TQFP 7mm x 7mm 2 81mm total area www.maximintegrated.com Maxim Integrated 19 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Pin Description PIN NAME FUNCTION TQFN TQFP 1 2 DGND Digital Ground 2 3 DVDD Positive Digital Supply 3 4 DIN Serial Interface Data Input 4 5 SCLK Serial Interface Clock Input 5 6 CS 6 7 DOUT 7 8 INT 8 9 CNVT 9 10 ADC_INT_REF ADC Internal Voltage Reference Output. Connect a bypass capacitor at this pin (4.7F to 10F). 10 11 ADC_EXT_REF ADC External Voltage Reference Input. Connect a bypass capacitor at this pin (4.7F recommended). 11 12 DAC_REF DAC External/Internal Voltage Reference Input. Connect a bypass capacitor at this pin (4.7F to 10F). 12 13 D0P 1st External Temperature Sensor Positive Input 1st External Temperature Sensor Negative Input Serial Interface Chip-Select-Active Low Serial Interface Data Output Interrupt Open-Drain Output. Active low. ADC Trigger Control Input. Active low. 13 14 D0N 14 15, 16 AVDD Positive Analog Supply. For TQFP, connect both pins to AVDD. 15 17, 18 AGND Analog Ground. For TQFP, connect both pins to AGND. 16 19 PORT0 Configurable Mixed-Signal Port 0 17 20 PORT1 Configurable Mixed-Signal Port 1 18 21 PORT2 Configurable Mixed-Signal Port 2 19 22 D1P 2nd External Temperature Sensor Positive Input 20 23 D1N 2nd External Temperature Sensor Negative Input 21 25 PORT3 Configurable Mixed-Signal Port 3 22, 33 26, 39 AVDDIO Analog Positive Supply For Mixed-Signal Ports. Connect both pins to AVDDIO. 23 27 PORT4 Configurable Mixed-Signal Port 4 24 28 PORT5 Configurable Mixed-Signal Port 5 25 30 PORT6 Configurable Mixed-Signal Port 6 26 31 PORT7 Configurable Mixed-Signal Port 7 27 32 PORT8 Configurable Mixed-Signal Port 8 28 33 PORT9 Configurable Mixed-Signal Port 9 29 35 PORT10 Configurable Mixed-Signal Port 10 30 36 PORT11 Configurable Mixed-Signal Port 11 31 37 PORT12 Configurable Mixed-Signal Port 12 32 38 AGND1 Analog Ground. www.maximintegrated.com Maxim Integrated 20 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Pin Description (continued) PIN NAME FUNCTION TQFN TQFP 34 40 PORT13 Configurable Mixed-Signal Port 13 35 42 PORT14 Configurable Mixed-Signal Port 14 36 43 PORT15 Configurable Mixed-Signal Port 15 37 45 PORT16 Configurable Mixed-Signal Port 16 38 46 PORT17 Configurable Mixed-Signal Port 17 39 47 PORT18 Configurable Mixed-Signal Port 18 40 1 PORT19 Configurable Mixed-Signal Port 19 -- 24, 29, 34, 41, 44, 48 AVSSIO Analog Negative Supply for Mixed-Signal Ports. For TQFP, connect all pins to AVSSIO.. -- -- EP www.maximintegrated.com Exposed Pad. For TQFN, connect EP to AVSSIO. For TQFP, connect EP to AGND. Maxim Integrated 21 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Application Circuits VIN (36V) PIXITM DAC 0 TO 10V FB2 ADC 0 TO 10V VOUT2_DET MAX17503 DC/DC VOUT2 (15V TO 28V) RS MAX44285 MAX11300 IOUT2_DET ADC 0 TO 2.5V TDD_CLK2 PTMA210152 STAGE 2 VG2 DAC 0 TO 10V VIN (36V) DAC 0 TO 10V VIN_DET DAC 0 TO 10V FB1 ADC 0 TO 10V VOUT1_DET MAX17503 DC/DC VOUT1 (15V TO 28V) RS MAX44285 IOUT1_DET ADC 0 TO 2.5V TDD_CLK1 PTMA210152 STAGE 1 VG1 RF IN DAC 0 TO 10V ISO_SPI MAX14850 SPI MAXQ622 USB PA Biasing Solution www.maximintegrated.com Maxim Integrated 22 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Typical Application Circuits (continued) 8V, 5A POWERSUPPLY MONITOR VOLTAGE CSA RS CURRENT ADC SCL_5V SCL_3V3 ADC LEVEL TRANSLATOR SDA_5V MAX44285 MAX11300 SDA_3V3 DSP/P/FPGA 0V TO +10V ADC DAC 10V-5V TO +5V ANALOG OUTPUTS ADC DAC 0 TO 20mA 0V TO 10V -5V TO +5V ANALOG OUTPUTS 0 TO 20mA ADC DAC 250 RLOAD DIFF DAC BINARY INPUT DIGITAL OUTPUTS GP1 GP0 DIGITAL OUTPUTS DAC ANALOG SWITCH COOLING FAN THERMAL PROBE SERIAL INTERFACE AND CONTROL THERMAL CONTROL SWITCH I/O ANALOG SWITCH TEMPERATURE SENSOR AND MONITOR C CONTROL ANALOG SWITCH SWITCH I/O Control and Monitoring Solution www.maximintegrated.com Maxim Integrated 23 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Detailed Description * Single conversion mode. The ADC performs a single conversion at the current port in the series of ADCconfigured ports when CNVT is asserted. * Continuous sweep mode. The ADC continuously sweeps the ADC-configured ports. The CNVT port has no effect in this mode. Functional Overview The MAX11300 has 20 configurable mixed-signal I/O ports. Each port is independently configured as a DAC output, an ADC input, a GPI, a GPO, or an analog switch terminal. User-controllable parameters are available for each of those configurations. The device offers one internal and two external temperature sensors. The serial interface operates as a SPI Mode 0 interface. The DAC is used to drive out a voltage defined by the DAC data register of the DAC-configured ports. The DAC uses either an internal or external voltage reference. The selection of the voltage reference is set for all the ports and cannot be configured on a port-by-port basis. The ADC converts voltages applied to the ADC-configured ports. The ADC can operate in single-ended mode or in differential mode, by which any two ports can form a differential pair. The port configured as the negative input of the ADC can be used by more than one differential ADC input pairs. The ADC uses either an internal or external voltage reference. In some configurations, the ADC uses the DAC voltage reference. The ADC voltage reference selection can be configured on a port-by-port basis. Interrupts provide the host with the occurrence of userselected events through the configuration of an interrupt mask register. ADC Operations The ADC is a 12-bit, low-power, successive approximation analog-to-digital converter, capable of sampling a single input at up to 400ksps. The ADC's conversion rate can be programmed to 400ksps, 333ksps, 250ksps, or 200ksps. The default conversion rate setting is 200ksps. Each ADC-configured port can be programmed for one of four input voltage ranges: 0V to +10V, -5V to +5V, -10V to 0V, and 0V to +2.5V. The ADC uses the internal ADC 2.5V voltage reference, the external ADC voltage reference, or, in some cases, the DAC voltage reference. The voltage reference can be selected on a port-by-port basis. ADC Control The ADC can be triggered using an external signal CNVT or from a control bit. CNVT is active-low and must remain low for a minimal duration of 0.5 s to trigger a conversion. Four configurations are available: * Idle mode (default setting). * Single sweep mode. The ADC sweeps sequentially the ADC-configured ports, from the lowest index port to the highest index port, once CNVT is asserted. www.maximintegrated.com ADC Averaging Function ADC-configured ports can be configured to average blocks of 2, 4, 8, 16, 32, 64, or 128 conversion results. The corresponding ADC data register is updated only when the averaging is completed, thus decreasing the throughput proportionally. If the number of samples to average is modified for a given port, the content of the ADC data register for that port is cleared before starting to average the new block of samples. ADC Mode Change When users change the ADC active mode (continuous sweep, single sweep, or single conversion), the ADC data registers are reset. However, ADC data registers retain content when the ADC is changed to idle mode. ADC Configurations The ADC can operate in single-ended, differential, or pseudo-differential mode. In single-ended mode, the PIXI port is the positive input to the ADC while the negative input is grounded internally (Figure 3). In differential mode (Figure 4), any pair of PIXI ports can be configured as inputs to the differential ADC. In pseudo-differential mode (Figure 5), one PIXI port produces the voltage applied to the negative input of the ADC while another PIXI port forms the positive input. The ADC data format is straight binary in single-ended mode, and two's complement in differential and pseudodifferential modes. DAC Operations The MAX11300 uses a 12-bit DAC, which operates at the rate of 40s per port. Since up to 20 ports can be configured in DAC-related modes, the minimum refresh rate per port is 1.25kHz. No external component is required to set the offset and gain of the DAC drivers. The PIXI port driver features a wide output voltage range of 10V and high current capability with dedicated power supplies (AVDDIO, AVSSIO). The DAC uses either the internal or external voltage reference. Unlike the ADC, the DAC voltage reference cannot be configured on a port-by-port basis. DAC mode configuration is illustrated in Figure 6. Maxim Integrated 24 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO ADC_INT_REF PORT ADC_EXT_REF REFERENCE MUX SCALING BLOCK SEQUENCER CNVT DIGITAL CORE ADC SERIAL INTERFACE SPI 12 BITS UP TO 400ksps INT Figure 3. ADC with Single-Ended Input ADC_INT_REF ANY PORT ANY OTHER PORT SCALING BLOCK SCALING BLOCK ADC_EXT_REF REFERENCE MUX SEQUENCER CNVT DIGITAL CORE ADC SPI 12 BITS UP TO 400ksps SERIAL INTERFACE INT Figure 4. ADC with Differential Inputs ADC_INT_REF ANY PORT ANY OTHER PORT SCALING BLOCK SCALING BLOCK ADC_EXT_REF REFERENCE MUX SEQUENCER ADC CNVT DIGITAL CORE SPI SERIAL INTERFACE INT DAC_REF INTERNAL OR EXTERNAL FOR ALL PORTS SCALING BLOCK SEQUENCER DAC Figure 5. ADC with Pseudo-Differential Input Set by DAC www.maximintegrated.com Maxim Integrated 25 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO DAC_REF INTERNAL OR EXTERNAL FOR ALL PORTS SERIAL INTERFACE DIGITAL CORE SPI SCALING BLOCK SEQUENCER DAC PORT 0mA 25mA CURRENT LIMIT at 50mA 40s to 1 LSB INT Figure 6. DAC Configuration CNVT DAC_REF INTERNAL OR EXTERNAL FOR ALL PORTS SERIAL INTERFACE SPI DIGITAL CORE SEQUENCER DAC ADC_INT_REF SCALING BLOCK PORT DAC_REF REFERENCE MUX ADC SCALING BLOCK SEQUENCER INT Figure 7. DAC Configuration with ADC Monitoring DAC operations can be monitored by the ADC. In such a mode, the ADC samples the DAC-configured port to allow the host to monitor that the voltage at the port is within expectations given the accuracy of the ADC and DAC. This ADC monitoring mode is shown in Figure 7. its sequence can jump to update the port that just received new data to convert. After having updated this port, the DAC continues its default sequence from that port. In that mode, users should allow a minimum of 80s between DAC data register updates for subsequent jump operations. By default, the DAC updates the DAC-configured ports sequentially. However, users can configure the DAC so that www.maximintegrated.com Maxim Integrated 26 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO In addition to port-specific DAC data registers, the host can also use the same data for all DAC-related ports using one of two preset DAC data registers. configured port can be set to detect rising edges, falling edges, either rising or falling edges, or none. When a port is configured as GPO (Figure 9), the amplitude of its logic-one level is set by its DAC data register. If the DAC data register is set at 0x0FFF, the GPO logic-one level is four times the DAC reference voltage. The logiczero level is always 0V. The host can set the logic state of GPO-configured ports through the corresponding GPO data registers. All DAC output drivers are protected by overcurrent limit circuitry. In case of overcurrent, the MAX11300 generates an interrupt. Detailed status registers are offered to the host to determine which ports are current limited. General-Purpose Input and Output Each PIXI port can be configured as a GPI or a GPO. The GPI threshold (Figure 8) is adjusted by setting the DAC data register of that GPI port to the corresponding voltage. If the DAC data register is set at 0x0FFF, the GPI threshold is the DAC reference voltage. The amplitude of the input signal must be contained within 0V to VAVDD. The GPI- DAC_REF INTERNAL OR EXTERNAL FOR ALL PORTS SEQUENCER PORT DAC DIGITAL CORE GPI SERIAL INTERFACE SPI 30mV HYSTERESIS INT Figure 8. GPI Mode DAC_REF INTERNAL OR EXTERNAL FOR ALL PORTS DAC SERIAL INTERFACE SPI DIGITAL CORE SEQUENCER SCALING BLOCK GPO PORT CURRENT LIMIT at 50mA INT Figure 9. GPO Mode www.maximintegrated.com Maxim Integrated 27 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Unidirectional and Bidirectional Level Translator Operations By combining GPI- and GPO-configured ports, unidirectional level translator paths can be formed. The signaling at the input of the path can be different from the signaling at the end (Figure 10). For example, a unidirectional path could convert a signal from 1.8V logic level to 3.3V logic level. The unidirectional path configuration allows for the transmission of signals received on a GPI-configured port to one or more GPO-configured ports. Pairs of adjacent PIXI ports can also form bidirectional level translator paths that are targeted to operate with open-drain drivers (Figure 11). When used as a bidirectional level translator, the pair of PIXI ports must be accompanied with external pullup resistors to meet proper logic levels. DAC_REF INTERNAL OR EXTERNAL FOR ALL PORTS SEQUENCER ANY PORT SERIAL INTERFACE DAC DAC SEQUENCER DIGITAL CORE GPI SCALING BLOCK GPO ANY OTHER PORT INT SPI Figure 10. Unidirectional Level Translator Path Mode CHIP1 WITH VDD1 LOGIC LEVEL VDD2 VDD1 MAX11300 PIXI[i] LOGIC CONTROLLER CHIP2 WITH VDD2 LOGIC LEVEL PIXI[i+1] LOGIC CONTROLLER Figure 11. Bidirectional Level Translation Application Diagram www.maximintegrated.com Maxim Integrated 28 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Internally or Externally Controlled Analog Switch Operation Power-Supply Brownout Detection Two adjacent PIXI ports can form a 60 analog switch that is controlled by two different configurations. In one configuration, the switch is dynamically controlled by any other GPI-configured PIXI port, as illustrated in Figure 12. The signal applied to that GPI-configured port can be inverted. In the other configuration, the switch is programmed to be permanently "ON" by configuring the corresponding PIXI port. To turn the switch "OFF", the host must set that PIXI port in high-impedance configuration. The MAX11300 features a brownout detection circuit that monitors AVDDIO and AVDD pins. When AVDDIO goes below approximately 4.0V, an interrupt is registered, and the interrupt port is asserted if not masked. When AVDD goes below approximately 4.0V, the device resets. SPI Operations The MAX11300 SPI interface complies with the timing of Mode 0, as illustrated in Figure 13. The MAX11300 samples incoming data on the rising edge of SCLK and releases outgoing data on the falling edge of SCLK. GPI PIXI PORT[i] ANY OTHER PORT PIXI PORT[i+1] Figure 12. PIXI Ports as a Controllable Analog Switch SCLK B23 DIN DOUT B23 B22 B21 B3 B2 B1 B0 B22 B21 B3 B2 B1 B0 CS Figure 13. SPI Timing (Mode 0) www.maximintegrated.com Maxim Integrated 29 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO SPI transactions are made of a minimum of three bytes. Each transaction is defined by the assertion of CS. The first byte contains the address and the read/write bit. The second byte carries the most significant byte of the data to either write or read. The third byte contains the least significant byte of the data to either write or read. Such a transaction is shown in Table 1. For write transactions, the targeted register content is modified only after the third byte has been fully received. The bits come out of DOUT (or come in DIN), most significant bit first. Note that the duration of the transaction is determined by the assertion of CS. If CS remains asserted past the third byte, and if SCLK remains active past the third byte, the MAX11300 assumes that a second data sample is received (or transmitted) corresponding to the next register address. The address keeps on incrementing as CS remains asserted and SCLK remains active. Table 2 shows an example of such a burst transaction. Each time a new data sample is read or written, the register address is incremented by one until it reaches the last register address. If a transaction targets an unused address, nothing is written within the MAX11300 for write transactions, and all zeros are read back for read transactions. Similarly, if Table 1. Single Register SPI Transaction Format B7 B6 1st Byte B5 B4 B3 B2 Address[6:0] 2nd Byte Data[15:8] 3rd Byte Data[7:0] B1 B0 R/WB a write transaction targets a read-only register, nothing is written to the device. Burst Transaction Address Incrementing Modes With a burst transaction, the address of the initial register is entered once. The data of the targeted register can then be written or read. If the serial clock keeps running, and if CS remains asserted, the device increments the address pointer and writes or reads the next data after the next 16 serial clock periods. This scheme goes on until CS is deasserted. There are two address incrementing modes. In one mode, the address is simply incremented by one (default mode), while in the other, the address is incremented contextually. When writing DAC data registers in a burst fashion using contextual addressing, the host would write the address of the first port that is DAC-configured (starting from the lowest port index). As CS remains asserted and another set of 16 serial clock cycles are received, the next DAC-configured port is written. This scheme continues until the last DAC-configured port is reached. At that point, any additional serial clock cycle results in looping back to the first DAC-configured port. The contextual addressing scheme is only valid for writing DAC data registers, as described above, and reading ADC data registers. Interrupt Operations The MAX11300 issues interrupts to alert the host of various events. All events are recorded by the interrupt register. The assertion of an interrupt register bit results in the assertion of the interrupt port (INT) if that interrupt bit Table 2. Multiple Register SPI Transaction Format B7 1st Byte B6 B5 B4 B3 Address_N[6:0] 2nd Byte Data_N[15:8] 3rd Byte Data_N[7:0] 4th Byte Data_N+1[15:8] 5th Byte Data_N+1[7:0] 6th Byte Data_N+2[15:8] 7th Byte Data_N+2[7:0] 8th Byte Data_N+3[15:8] 9th Byte Data_N+3[7:0] 10th Byte Data_N+4[15:8] 11th Byte Data_N+4[7:0] www.maximintegrated.com B2 B1 B0 R/WB Maxim Integrated 30 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO is not masked. By default, all interrupts are masked upon power-up or reset. The interrupts are listed hereafter. The ADCFLAG (ADC Flag) interrupt indicates that the ADC just completed a conversion or set of conversions. It is asserted either at the end of a conversion when the ADC is in single-conversion mode or at the end of a sweep when the ADC is either in single-sweep mode or continuous-sweep mode. ADCFLAG is cleared when the interrupt register is read. The ADCDR (ADC Data Ready) interrupt is asserted when at least one ADC data register is refreshed. Since one conversion per ADC-configured port is performed per sweep, many sweeps may be required before refreshing the data register of a given ADC-configured port that utilizes the averaging function. See the ADC Averaging Function section. To determine which ADC-configured port received a new data sample, the host must read the ADC status registers. ADCDR is cleared after the interrupt register and both ADC status registers are read subsequently. The ADCDM (ADC Data Missed) interrupt is asserted when any ADC data register is not read by the host before new data is stored in that ADC data register. ADCDM is cleared after the interrupt register is read. The GPIER (GPI Event Received) interrupt indicates that an event has been received on one of the GPI-configured ports. Each GPI port can be configured to generate an interrupt for an event such as detecting a rising edge, a falling edge, or either edge at the corresponding port. If the GPI port is configured to detect no edge, it is equivalent to masking the interrupt related to that port. A GPI status register allows the host to identify which port detected the event. GPIER is cleared after the interrupt register and both GPI status registers are read subsequently. The GPIEM (GPI Event Missed) interrupt informs the host that it did not service the GPI interrupt caused by the occurrence of an event recorded by GPI status registers before another event was received on the same port. The host must read the interrupt register and the GPI status registers whenever a GPI event received interrupt occurs; otherwise, the GPIEM register is asserted upon receiving the next event. This interrupt must be used in conjunction with the GPIER interrupt bit to operate properly. GPIEM is cleared after the interrupt register and both GPI status registers are read subsequently. The DACOI (DAC Overcurrent) interrupt indicates that a DAC-configured port current exceeded approximately 50mA. This limit is not configurable. A DAC overcurrent status register allows the host to identify which DAC- www.maximintegrated.com configured port exceeded the 50mA current limit. DACOI is cleared after the interrupt register is read, and both DAC overcurrent status registers are read subsequently. The TMPINT[2:0] (Internal Temperature Monitor) interrupt has three sources of interrupt, each independently controllable: a new internal temperature value is ready, the internal temperature value exceeds the maximum limit, or the internal temperature value is below the minimum limit. TMPINT is cleared after the interrupt register is read. The TMPEXT1[2:0] (1st External Temperature Monitor) interrupt has three sources of interrupt, each independently controllable: a new first external temperature value is ready, the first external temperature value exceeds the maximum limit, or the first external temperature value is below the minimum limit. TMPEXT1 is cleared after the interrupt register is read. The TMPEXT2[2:0] (2nd External Temperature Monitor) interrupt has three sources of interrupt, each independently controllable: a new second external temperature value is ready, the second external temperature value exceeds the maximum limit, or the second external temperature value is below the minimum limit. TMPEXT2 is cleared after the interrupt register is read. The VMON (High-Voltage Supply Monitor) interrupt is triggered when AVDDIO supply voltage falls below approximately 4V. VMON is cleared after the interrupt register is read. Temperature Sensors Overview The MAX11300 integrates one internal and two external temperature sensors. The external sensors are diodeconnected transistors, typically a low-cost, easily mounted 2N3904 NPN type, that replace conventional thermistors or thermocouples. The external sensors' accuracy is typically 1C over the -40C to +150C temperature range with no calibration necessary. Use of a transistor with a different ideality factor produces a proportionate difference in the absolute measured temperature. Parasitic series resistance results in a temperature reading error of about 0.25C per Ohm of resistance. The MAX11300 features a series resistance cancellation mode (RS_ CANCEL) that eliminates this error for resistances up to 10 Ohms. The external sensors can also measure the die temperature of other ICs, such as microprocessors, that contain a substrate-connected diode available for temperature-sensing purposes. Temperature data can be read from the temperature data registers. The temperature data format is in two's complement, with one LSB representing 0.125C. Maxim Integrated 31 www.maximintegrated.com GPI status; ports 0-15 GPI status; ports 16-19 Internal temperature data 1st external temperature data 2 external temperature data GPI data; ports 15-0 GPI data; ports 19-16 0x05 (R) 0x06 (R) 0x07 (R) 0x08 (R) 0x09 (R) 0x0A (R) 0x0B (R) 0x0C (R) GPIMD_7[1:0] GPIMD_15[1:0] Device control Interrupt mask GPI IRQ mode; ports 0-7 GPI IRQ mode; ports 8-15 GPI IRQ mode; ports 16-19 0x10 (R/W) 0x11 (R/W) 0x12 (R/W) 0x13 (R/W) 0x14 (R/W) RS_CANCEL B12 UNUSED UNUSED DAC preset data #1 DAC preset data #2 Temperature monitor Configuration 0x17 (R/W) 0x18 (R/W) B10 GPIMD_13[1:0] GPIMD_5[1:0] B8 GPIMD_12[1:0] GPIMD_4[1:0] TmPCTL[2:0] UNUSED UNUSED UNUSED UNUSED TMPEXT1 MSK[2:0] UNUSED B9 UNUSED TMPEXT1[2:0] B11 TMPPER UNUSED GPIMD_14[1:0] GPIMD_6[1:0] TMPEXT2 MSK[2:0] 0x16 (R/W) VMON MSK GPO data; ports 19-16 0x0E (R/W) GPO data; ports 0x0D (R/W) 15-0 LPEN Overcurrent status; ports 16-19 0x04 (R) BRST UNUSED Overcurrent status; ports 0-15 Reset UNUSED ADC data status; ports 16-19 0x03 (R) nd UNUSED ADC data status; ports 0-15 TMPEXT2[2:0] 0x02 (R) VMON B13 Interrupt B14 0x01 (R) B15 Device ID 0x00 (R) ADDRESS DESCRIPTION Table 3. Register Table (Read/Write) B6 GPID MMSK GPIMD_18[1:0] GPIMD_10[1:0] GPIMD_2[1:0] DACOI MSK ADCconv[1:0] TMPEXT2DAT[11:0] TMPEXT2MONCFG [1:0] DACPRSTDAT2[11:0] DACPRSTDAT1[11:0] GPIMD_19[1:0] GPIMD_11[1:0] GPIDM B4 TMPINTDAT[11:0] DACOI B5 TMPEXT1DAT[11:0] DACREF GPIMD_3[1:0] TMPINT MSK[2:0] THSHDN GPODAT[15:0] GPIDAT[15:0] GPIST[15:0] DACOIST[15:0] ADCST[15:0] TMPINT[2:0] DEVID[15:0] B7 Register bits that are shown unused do not impact device functionality and read out as "0". Register Description ADCDM MSK TMPEXT1MONCFG [1:0] GPIMD_17[1:0] GPIMD_9[1:0] ADCFLAG B0 ADCFLAG MSK TMPINTMONCFG [1:0] GPIMD_16[1:0] GPIMD_8[1:0] GPIMD_0[1:0] ADCDR MSK ADCCTL[1:0] GPODAT[19:16] GPIDAT[19:16] GPIST[19:16] DACOIST[19:16] GPIMD_1[1:0] GPIDR MSK ADCDR B1 ADCST[19:16] ADCDM B2 DACCtL[1:0] GPIDR B3 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0xFFFF 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0424 DEFAULT MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Maxim Integrated 32 www.maximintegrated.com Internal temperature low threshold 1st external temperature high threshold 1st external temperature low threshold 0x19 (R/W) 0x1A (R/W) 0x1B (R/W) 0x1C (R/W) B13 FUNCID_0[3:0] FUNCID_1[3:0] FUNCID_2[3:0] FUNCID_3[3:0] FUNCID_4[3:0] FUNCID_5[3:0] FUNCID_6[3:0] FUNCID_7[3:0] FUNCID_8[3:0] FUNCID_9[3:0] FUNCID_10[3:0] FUNCID_11[3:0] FUNCID_12[3:0] FUNCID_13[3:0] FUNCID_14[3:0] FUNCID_15[3:0] FUNCID_16[3:0] FUNCID_17[3:0] Port 0 configuration Port 1 configuration Port 2 configuration Port 3 configuration Port 4 configuration Port 5 configuration Port 6 configuration Port 7 configuration Port 8 configuration Port 9 configuration Port 10 configuration Port 11 configuration Port 12 configuration Port 13 configuration Port 14 configuration Port 15 configuration Port 16 configuration Port 17 configuration 0x20 (R/W) 0x21 (R/W) 0x22 (R/W) 0x23 (R/W) 0x24 (R/W) 0x25 (R/W) 0x26 (R/W) 0x27 (R/W) 0x28 (R/W) 0x29 (R/W) 0x2A (R/W) 0x2B (R/W) 0x2C (R/W) 0x2D (R/W) 0x2E (R/W) 0x2F (R/W) 0x30 (R/W) 0x31 (R/W) UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED B14 2nd external temperature low threshold B15 0x1E (R/W) 2nd external 0x1D (R/W) temperature high threshold Internal temperature high threshold ADDRESS DESCRIPTION B12 B11 B10 B9 Table 3. Register Table (Read/Write) (continued) B8 B7 B6 B4 FUNCPRM_17[11:0] FUNCPRM_16[11:0] FUNCPRM_15[11:0] FUNCPRM_14[11:0] FUNCPRM_13[11:0] FUNCPRM_12[11:0] FUNCPRM_11[11:0] FUNCPRM_10[11:0] FUNCPRM_9[11:0] FUNCPRM_8[11:0] FUNCPRM_7[11:0] FUNCPRM_6[11:0] FUNCPRM_5[11:0] FUNCPRM_4[11:0] FUNCPRM_3[11:0] FUNCPRM_2[11:0] FUNCPRM_1[11:0] FUNCPRM_0[11:0] TMPEXT2LO[11:0] TMPEXT2HI[11:0] TMPEXT1LO[11:0] TMPEXT1HI[11:0] TMPINTLO[11:0] TMPINTHI[11:0] B5 B3 B2 B1 B0 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0800 0x07FF 0x0800 0x07FF 0x0800 0x07FF DEFAULT MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Maxim Integrated 33 www.maximintegrated.com Port 1 ADC data Port 2 ADC data Port 3 ADC data Port 4 ADC data Port 5 ADC data Port 6 ADC data Port 7 ADC data Port 8 ADC data Port 9 ADC data Port 10 ADC data Port 11 ADC data Port 12 ADC data Port 13 ADC data Port 14 ADC data Port 15 ADC data Port 16 ADC data Port 17 ADC data Port 18 ADC data Port 19 ADC data 0x41 (R) 0x42 (R) 0x43 (R) 0x44 (R) 0x45 (R) 0x46 (R) 0x47 (R) 0x48 (R) 0x49 (R) 0x4A (R) 0x4B (R) 0x4C (R) 0x4D (R) 0x4E (R) 0x4F (R) 0x50 (R) 0x51 (R) 0x52 (R) 0x53 (R) 0x73 (R/W) Port 19 DAC data 0x72 (R/W) Port 18 DAC data 0x71 (R/W) Port 17 DAC data 0x70 (R/W) Port 16 DAC data 0x6F (R/W) Port 15 DAC data 0x6E (R/W) Port 14 DAC data 0x6D (R/W) Port 13 DAC data 0x6C (R/W) Port 12 DAC data 0x6B (R/W) Port 11 DAC data 0x6A (R/W) Port 10 DAC data 0x69 (R/W) Port 9 DAC data 0x68 (R/W) Port 8 DAC data 0x67 (R/W) Port 7 DAC data 0x66 (R/W) Port 6 DAC data 0x65 (R/W) Port 5 DAC data 0x64 (R/W) Port 4 DAC data 0x63 (R/W) Port 3 DAC data 0x62 (R/W) Port 2 DAC data 0x61 (R/W) Port 1 DAC data 0x60 (R/W) Port 0 DAC data Port 0 ADC data 0x40 (R) UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED UNUSED FUNCID_19[3:0] Port 19 configuration 0x33 (R/W) B13 FUNCID_18[3:0] B14 0x32 (R/W) B15 Port 18 configuration ADDRESS DESCRIPTION B12 B11 B10 B9 Table 3. Register Table (Read/Write) (continued) B8 B7 B6 B4 DACDAT_19[11:0] DACDAT_18[11:0] DACDAT_17[11:0] DACDAT_16[11:0] DACDAT_15[11:0] DACDAT_14[11:0] DACDAT_13[11:0] DACDAT_12[11:0] DACDAT_11[11:0] DACDAT_10[11:0] DACDAT_9[11:0] DACDAT_8[11:0] DACDAT_7[11:0] DACDAT_6[11:0] DACDAT_5[11:0] DACDAT_4[11:0] DACDAT_3[11:0] DACDAT_2[11:0] DACDAT_1[11:0] DACDAT_0[11:0] ADCDAT_19[11:0] ADCDAT_18[11:0] ADCDAT_17[11:0] ADCDAT_16[11:0] ADCDAT_15[11:0] ADCDAT_14[11:0] ADCDAT_13[11:0] ADCDAT_12[11:0] ADCDAT_11[11:0] ADCDAT_10[11:0] ADCDAT_9[11:0] ADCDAT_8[11:0] ADCDAT_7[11:0] ADCDAT_6[11:0] ADCDAT_5[11:0] ADCDAT_4[11:0] ADCDAT_3[11:0] ADCDAT_2[11:0] ADCDAT_1[11:0] ADCDAT_0[11:0] FUNCPRM_19[11:0] FUNCPRM_18[11:0] B5 B3 B2 B1 B0 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 DEFAULT MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Maxim Integrated 34 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Register Detailed Description Device ID Register (Read) BIT FIELD NAME 15:0 DEVID[15:0] DESCRIPTION Device ID * 0000_0100_0010_0100 Interrupt Register (Read) BIT 0 FIELD NAME ADCFLAG 1 ADCDR ADC data ready interrupt * Asserted when any ADC data register receives a new data sample. If a port is configured to average 2N samples, it takes 2N sweeps for that port data register to be refreshed and assert ADCDR. * Data registers are refreshed either at the end of a conversion (ADC set in single-conversion mode) or at the end of a sweep (ADC set in single-sweep or continuous-sweep mode). * Cleared after the interrupt register is read, and after both ADCST[15:0] and ADCST[19:16] registers are read subsequently. 2 ADCDM ADC data missed interrupt * Asserted when the host missed reading a port's ADC data register by the time that port's ADC data register is overwritten by new data. * Cleared after the interrupt register is read. 3 GPIDR GPI event ready interrupt * Asserted when a new event is captured by GPI-configured ports. The type of event is set by the corresponding GPI IRQ mode register. The host can then consult GPIST[15:0] and GPIST[19:16] registers to identify the port that caused the interrupt. * Cleared after the interrupt register is read, and after both GPIST[15:0] and GPIST[19:16] are read subsequently. 4 GPIDM GPI event missed interrupt * Asserted when the host missed reading the GPI status register by the time that register is overwritten. * Must be used in conjunction with GPIDR for proper operation. * Cleared after the interrupt register is read, and after both GPIST[15:0] and GPIST[19:16] are read subsequently. 5 DACOI DAC driver overcurrent interrupt * Asserted when the DAC driver current exceeds approximately 50mA. The host can then read DACOIST[15:0] and DACOIST[19:16] to identify the port that caused the interrupt. * Cleared after the interrupt register is read, and after both DACOIST[15:0] and DACOIST[19:16] registers are read subsequently. www.maximintegrated.com DESCRIPTION ADC flag interrupt * Asserted when the ADC completes a conversion (ADC set in single-conversion mode) or when the ADC completes a sweep (ADC set in single-sweep or continuous-sweep mode). * No interrupt is generated when the ADC is in idle mode. * Cleared after the interrupt register is read. Maxim Integrated 35 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Interrupt Register (Read) (continued) BIT 8:6 FIELD NAME TMPINT[2:0] DESCRIPTION Internal temperature interrupts * TMPINT[2]: Asserted when the internal temperature value is larger than the value stored in TMPINTHI[11:0]. Cleared after the interrupt register is read. * TMPINT[1]: Asserted when the internal temperature value is lower than the value stored in TMPINTLO[11:0]. Cleared after the interrupt register is read. * TMPINT[0]: Asserted when a new temperature value is available. Cleared after the interrupt register is read. 11:9 TMPEXT1[2:0] 1st external temperature interrupts * TMPEXT1[2]: Asserted when the 1st external temperature value is larger than the value stored in TMPEXT1HI[11:0]. Cleared after the interrupt register is read. * TMPEXT1[1]: Asserted when the 1st external temperature value is lower than the value stored in TMPEXT1LO[11:0]. Cleared after the interrupt register is read. * TMPEXT1[0]: Asserted when a new temperature value is available. Cleared after the interrupt register is read. 14:12 TMPEXT2[2:0] 2nd external temperature interrupts * TMPEXT2[2]: Asserted when the 2nd external temperature value is larger than the value stored in TMPEXT2HI[11:0]. Cleared after the interrupt register is read. * TMPEXT2[1]: Asserted when the 2nd external temperature value is lower than the value stored in TMPEXT2LO[11:0]. Cleared after the interrupt register is read. * TMPEXT2[0]: Asserted when a new temperature value is available. Cleared after the interrupt register is read. 15 VMON High-voltage supply monitor interrupt * Asserted when the high voltage supply (AVDDIO) falls below approximately 4V. * Cleared after the interrupt register is read. ADC Status Registers (Read) BIT FIELD NAME 15:0 3:0 ADCST[15:0] ADCST[19:16] DESCRIPTION Status of ADC data received for ports 0 to 19 * Once new data is written in an ADC data register, the corresponding ADCST bit is asserted. The new data is written only after the set of samples to average is collected when the averaging function is enabled. * This register content is not affected by any related interrupt mask. Activity on ADC-configured ports is recorded by this register regardless of the mask interrupt register setting. * Cleared after the interrupt register is read, and after both ADCST[15:0] and ADCST[19:16] registers are read, subsequently. Overcurrent Status Registers (Read) BIT FIELD NAME DESCRIPTION 15:0 3:0 DACOIST[15:0] DACOIST[19:16] Status of DAC drivers overcurrent for ports 0 to 19 * Once a port driver exceeds approximately 50mA, the host can identify which driver caused the interrupt by reading DACOIST[15:0] and DACOIST[19:16]. * This register content is not affected by any related interrupt mask. Activity on overcurrent detection is recorded by these registers regardless of the mask interrupt register setting. * Cleared after the interrupt register is read, and after both DACOIST[15:0] and DACOIST[19:16] registers are read, subsequently.. www.maximintegrated.com Maxim Integrated 36 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Internal Temperature Data Register (Read) BIT FIELD NAME 11:0 TMPINTDAT[11:0] DESCRIPTION Internal temperature measurement data * Temperature measurement produced by the internal temperature sensor. * The data sample is represented in two's complement, and one LSB represents 0.125C. 1st External Temperature Data Register (Read) BIT FIELD NAME 11:0 TMPEXT1DAT[11:0] DESCRIPTION 1st external temperature measurement data * Temperature measurement produced by the first external temperature sensor. * The data sample is represented in two's complement, and one LSB represents 0.125C. 2nd External Temperature Data Register (Read) BIT FIELD NAME 11:0 TMPEXT2DAT[11:0] DESCRIPTION 2nd external temperature measurement data * Temperature measurement produced by the second external temperature sensor. * The data sample is represented in two's complement, and one LSB represents 0.125C. GPI Status Registers (Read) BIT FIELD NAME DESCRIPTION 15:0 3:0 GPIST[15:0] GPIST[19:16] Status of GPI event detection for ports 0 to 19 * Asserted when an event is detected on a GPI-configured port. The type of event to detect is set by the corresponding GPI IRQ register. * Once a GPIDT interrupt is generated, the host can identify which GPI port(s) caused the interrupt by reading GPIST[15:0] and GPIST[19:16] registers. * GPIST content is not affected by any related interrupt mask. Activity on GPI-configured ports is recorded by GPIST regardless of the mask interrupt register setting. * Cleared after the interrupt register is read, and after both GPIST[15:0] and GPIST[19:16] registers are read, subsequently. www.maximintegrated.com Maxim Integrated 37 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Interrupt Mask Register (Read/Write) BIT FIELD NAME 0 ADCFLAGMSK 1 ADCDRMSK 2 ADCDMMSK 3 GPIDRMSK 4 GPIDMMSK GPI event missed interrupt mask * Masks GPIDM interrupt bit when asserted. * Can be deasserted only if GPIDRMSK is deasserted. * 1: Prevents the assertion of GPIDM interrupt bit from pulling INT low. * 0: Allows the assertion of GPIDM interrupt bit to pull INT low. 5 DACOIMSK DAC driver overcurrent interrupt mask * Masks DACOI interrupt bit when asserted. * 1: Prevents the assertion of DACOI interrupt bit from pulling INT low. * 0: Allows the assertion of DACOI interrupt bit to pull INT low. 8:6 TMPINTMSK[2:0] 11:9 TMPEXT1MSK[2:0] 1st external temperature interrupt mask * Masks TMPEXT1[2:0] interrupt bits when asserted on a bit-by-bit basis. * 1: Prevents the assertion of TMPEXT1[i] interrupt bit from pulling INT low (0i2). * 0: Allows the assertion of TMPEXT1[i] interrupt bit to pull INT low (0i2). 14:12 TMPEXT2MSK[2:0] 2nd external temperature interrupt mask * Masks TMPEXT2[2:0] interrupt bits when asserted on a bit-by-bit basis. * 1: Prevents the assertion of TMPEXT2[i] interrupt bit from pulling INT low (0i2). * 0: Allows the assertion of TMPEXT2[i] interrupt bit to pull INT low (0i2). 15 VMONMSK www.maximintegrated.com DESCRIPTION ADC flag interrupt mask * Masks ADCFLAG interrupt bit when asserted. * In ADC continuous-sweep mode, INT is asserted for 100nS at the end of each sweep whether ADCFLAG interrupt is cleared or not. * 1: Prevents the assertion of ADCFLAG interrupt bit from pulling INT low. * 0: Allows the assertion of ADCFLAG interrupt bit to pull INT low. ADC data ready interrupt mask * Masks ADCDR interrupt bit when asserted. * 1: Prevents the assertion of ADCDR interrupt bit from pulling INT low. * 0: Allows the assertion of ADCDR interrupt bit to pull INT low. ADC data missed interrupt mask * Masks ADCDM interrupt bit when asserted. * 1: Prevents the assertion of ADCDM interrupt bit from pulling INT low. * 0: Allows the assertion of ADCDM interrupt bit to pull INT low. GPI event ready interrupt mask * Masks GPIDR interrupt bit when asserted. * Supersedes the settings in the GPI IRQ Mode registers. * 1: Prevents the assertion of GPIDR interrupt bit from pulling INT low. * 0: Allows the assertion of GPIDR interrupt bit to pull INT low. Internal temperature interrupt mask * Masks TMPINT[2:0] interrupt bits when asserted on a bit-by-bit basis. * 1: Prevents the assertion of TMPINT[i] interrupt bit from pulling INT low (0i2). * 0: Allows the assertion of TMPINT[i] interrupt bit to pull INT low (0i2). High-voltage supply monitor mask * Masks VMON interrupt bit when asserted. * 1: Prevents the assertion of VMON interrupt bit from pulling INT low. * 0: Allows the assertion of VMON interrupt bit to pull INT low. Maxim Integrated 38 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO GPI IRQ Mode Registers (Read/Write) BIT 1:0 3:2 5:4 7:6 9:8 11:10 13:12 15:14 1:0 3:2 5:4 7:6 9:8 11:10 13:12 15:14 1:0 3:2 5:4 7:6 FIELD NAME DESCRIPTION GPIMD_0[1:0] GPIMD_1[1:0] GPIMD_2[1:0] GPIMD_3[1:0] GPIMD_4[1:0] GPIMD_5[1:0] GPIMD_6[1:0] GPIMD_7[1:0] GPIMD_8[1:0] GPIMD_9[1:0] GPIMD_10[1:0] GPIMD_11[1:0] GPIMD_12[1:0] GPIMD_13[1:0] GPIMD_14[1:0] GPIMD_15[1:0] GPIMD_16[1:0] GPIMD_17[1:0] GPIMD_18[1:0] GPIMD_19[1:0] GPI interrupt request mode for ports 0 to 19 * Each input port is controlled by GPIMD, a 2-bit code. * For a given port i (0i19): * GPIMD_i[1:0] = 00: GPIST[i] is never asserted * GPIMD_i[1:0] = 01: GPIST[i] is asserted upon detection of a positive edge * GPIMD_i[1:0] = 10: GPIST[i] is asserted upon detection of a negative edge * GPIMD_i[1:0] = 11: GPIST[i] is asserted upon detection of a positive or a negative edge Device Control Register (Read/Write) BIT FIELD NAME 1:0 ADCCTL[1:0] 3:2 DACCTL[1:0] 5:4 ADCCONV[1:0] www.maximintegrated.com DESCRIPTION ADC conversion mode selection * 00: Idle mode - The ADC does not perform any conversion. * 01: Single sweep - The ADC performs one conversion for each of the ADC-configured ports sequentially. The assertion of CNVT triggers the single sweep. The sweep starts with the ADC-configured port of lowest index and stops with the ADC-configured port of highest index. * 10: Single conversion - The ADC performs one conversion for the current port. It starts with the lowest index port that is ADC-configured, and it progresses to higher index ports as CNVT is asserted. * 11: Continuous sweep - This mode is not controlled by CNVT. The ADC continuously sweeps the ADC-configured ports. DAC mode selection * 00: Sequential update mode for DAC-configured ports. * 01: Immediate update mode for DAC-configured ports. The DAC-configured port that received new data is the next port to be updated. After updating that port, the DACconfigured port update sequence continues from that port onward. A minimum of 80s must be observed before requesting another immediate update. * 10: All DAC-configured ports use the same data stored in DACPRSTDAT1[11:0]. * 11: All DAC-configured ports use the same data stored in DACPRSTDAT2[11:0]. ADC conversion rate selection * 00: ADC conversion rate of 200ksps (default) * 01: ADC conversion rate of 250ksps * 10: ADC conversion rate of 333ksps * 11: ADC conversion rate of 400ksps Maxim Integrated 39 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Device Control Register (Read/Write) (continued) BIT FIELD NAME 6 DACREF DESCRIPTION 7 THSHDN 10:8 TMPCTL[2:0] 11 TMPPER 12 RS_CANCEL 13 LPEN Power mode selection * 0: Default power mode for normal operations * 1: Lower power mode. The analog ports are in high-impedance mode. The device can be brought out of the lower power mode by deasserting this bit. The device would then undergo the regular power-on sequence. 14 BRST Serial interface burst-mode selection * 0: Default address incrementing mode. The address is automatically incremented by "1" in burst mode. * 1: Contextual address incrementing mode. In burst mode, the address automatically points to the next ADC- or DAC-configured port data register. Specifically, when reading ADC data (writing DAC data), the serial interface reads (writes to) only the data registers of those ports that are ADC-configured (DAC-configured). This mode applies to ADC data read and DAC data write, not DAC data read. 15 RESET DAC voltage reference selection * 0: External reference voltage * 1: Internal reference voltage Thermal shutdown enable * 0: Thermal shutdown function disabled. * 1: Thermal shutdown function enabled. If the internal temperature monitor is enabled, and if the internal temperature is measured to be larger than 145C, the device is reset, thus bringing all channels to high-impedance mode and setting all registers to their default value. Temperature monitor selection * TMPCTL[0]: Internal temperature monitor (0: disabled; 1: enabled) * TMPCTL[1]: 1st external temperature monitor (0: disabled; 1: enabled) * TMPCTL[2]: 2nd external temperature monitor (0: disabled; 1: enabled) Temperature conversion time control * 0: Default conversion time setting. Selected for junction capacitance filter < 100pF. * 1: Extended conversion time setting. Selected for junction capacitance filter from 100pF to 390pF Temperature sensor series resistor cancellation mode * 0: Temperature sensor series resistance cancellation disabled. * 1: Temperature sensor series resistance cancellation enabled. Soft reset control * Self-clearing soft reset register, equivalent to power-on reset. GPI Data Registers (Read) BIT FIELD NAME 15:0 3:0 GPIDAT[15:0] GPIDAT[19:16] www.maximintegrated.com DESCRIPTION Data received on GPI ports 0 to 19 * The data received on GPI-configured ports can be read by the host. * For a given port i (0i19): * GPIDAT[i] = 0: A logic zero level is received at GPI port i * GPIDAT[i] = 1: A logic one level is received at GPI port i Maxim Integrated 40 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO GPO Data Registers (Read/Write) BIT FIELD NAME 15:0 3:0 GPODAT[15:0] GPODAT[19:16] DESCRIPTION Data transmitted through GPO ports 0 to 19 * Data written by the host to be transmitted through the GPO-configured ports * For a given port i (0i19): * GPIDAT[i] = 0: A logic zero level is transmitted through GPO port i * GPIDAT[i] = 1: A logic one level is transmitted through GPO port i DAC Preset Data Registers (Read/Write) BIT FIELD NAME 11:0 11:0 DACPRSTDAT1[11:0] DACPRSTDAT2[11:0] DESCRIPTION DAC preset data register 1 and 2 * DAC data used by all ports configured in a DAC-related mode (1, 3, 4, 5, 6, and 10) * Writing to these registers does not alter the contents of the DAC data registers Temperature Monitor Configuration Register (Read/Write) BIT FIELD NAME 1:0 TMPINTMONCFG[1:0] DESCRIPTION 3:2 TMPEXT1MONCFG[1:0] Number of samples averaged for calculating the 1st external temperature * 00: 4 samples * 01: 8 samples * 10: 16 samples * 11: 32 samples 5:4 TMPEXT2MONCFG[1:0] Number of samples averaged for calculating the 2nd external temperature * 00: 4 samples * 01: 8 samples * 10: 16 samples * 11: 32 samples Number of samples averaged for calculating the internal temperature * 00: 4 samples * 01: 8 samples * 10: 16 samples * 11: 32 samples Internal Temperature Monitor High Threshold Register (Read/Write) BIT FIELD NAME 11:0 TMPINTHI[11:0] www.maximintegrated.com DESCRIPTION Internal temperature monitor high threshold * Maximum temperature value beyond which TMPINT[2] is asserted. * This value is represented in two's complement; one LSB represents 0.125C. Maxim Integrated 41 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Internal Temperature Monitor Low Threshold Register (Read/Write) BIT FIELD NAME 11:0 TMPINTLO[11:0] DESCRIPTION Internal temperature monitor low threshold * Minimum temperature value below which TMPINT[1] is asserted. * This value is represented in two's complement; one LSB represents 0.125C. 1st External Temperature Monitor High Threshold Register (Read/Write) BIT FIELD NAME 11:0 TMPEXT1HI[11:0] DESCRIPTION 1st external temperature monitor high threshold * Maximum temperature value beyond which TMPEXT1[2] is asserted. * This value is represented in two's complement; one LSB represents 0.125C. 1st External Temperature Monitor Low Threshold Register (Read/Write) BIT FIELD NAME 11:0 TMPEXT1LO[11:0] DESCRIPTION 1st external temperature monitor low threshold * Minimum temperature value below which TMPEXT1[1] is asserted. * This value is represented in two's complement; one LSB represents 0.125C. 2nd External Temperature Monitor High Threshold Register (Read/Write) BIT 11:0 FIELD NAME TMPEXT2HI[11:0] DESCRIPTION 2nd external temperature monitor high threshold * Maximum temperature value beyond which TMPEXT2[2] is asserted. * This value is represented in two's complement; one LSB represents 0.125C. 2nd External Temperature Monitor Low Threshold Register (Read/Write) BIT 11:0 FIELD NAME TMPEXT2LO[11:0] www.maximintegrated.com DESCRIPTION 2nd external temperature monitor low threshold * Minimum temperature value below which TMPEXT2[1] is asserted. * This value is represented in two's complement; one LSB represents 0.125C. Maxim Integrated 42 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Port Configuration Registers (Read/Write) BIT 11:0 FIELD NAME FUNCPRM_0[11:0] FUNCPRM_1[11:0] FUNCPRM_2[11:0] FUNCPRM_3[11:0] FUNCPRM_4[11:0] FUNCPRM_5[11:0] FUNCPRM_6[11:0] FUNCPRM_7[11:0] FUNCPRM_8[11:0] FUNCPRM_9[11:0] FUNCPRM_10[11:0] FUNCPRM_11[11:0] FUNCPRM_12[11:0] FUNCPRM_13[11:0] FUNCPRM_14[11:0] FUNCPRM_15[11:0] FUNCPRM_16[11:0] FUNCPRM_17[11:0] FUNCPRM_18[11:0] FUNCPRM_19[11:0] DESCRIPTION FUNCPRM_i[4:0]: ASSOCIATED PORT * Defines the port to use in conjunction with a port configured in mode 4, 8, or 11. FUNCPRM_i[7:5]: # OF SAMPLES (for ADC-related functional modes only) * Defines the number of samples to be captured and averaged before loading the result in the port's ADC data register. The coding of the number of samples is 2# OF SAMPLES. The number of samples to average can be 1, 2, 4, 8, 16, 32, 64, or 128. FUNCPRM_i[10:8]: RANGE * Determines the input voltage range of ports configured in input modes, or the output voltage range of ports configured in output modes. * In ADC- or DAC-related modes, RANGE cannot be set to 000. VOLTAGE RANGE CODES ADC VOLTAGE RANGE (V) DAC VOLTAGE RANGE (V) 000 No Range Selected No Range Selected 001 0 to +10 0 to +10 010 -5 to +5 -5 to +5 011 -10 to 0 -10 to 0 100 0 to +2.5 -5 to +5 101 Reserved Reserved 110 0 to +2.5 0 to +10 111 Reserved Reserved FUNCPRM_i[11]: AVR (for ADC-related functional modes only) * ADC voltage reference selection * 0: ADC internal voltage reference * 1: ADC external voltage reference (all modes except mode 6) or DAC voltage reference determined by DACREF (mode 6 only) FUNCPRM_i[11]: INV (for GPI-controlled functional modes only) * Asserted to invert the data received by the GPI-configured port. * 0: Data received from GPI-configured port is not inverted * 1: Data received from GPI-configured port is inverted www.maximintegrated.com Maxim Integrated 43 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Port Configuration Registers (Read/Write)(continued) BIT 15:12 FIELD NAME FUNCID_0[3:0] FUNCID_1[3:0] FUNCID_2[3:0] FUNCID_3[3:0] FUNCID_4[3:0] FUNCID_5[3:0] FUNCID_6[3:0] FUNCID_7[3:0] FUNCID_8[3:0] FUNCID_9[3:0] FUNCID_10[3:0] FUNCID_11[3:0] FUNCID_12[3:0] FUNCID_13[3:0] FUNCID_14[3:0] FUNCID_15[3:0] FUNCID_16[3:0] FUNCID_17[3:0] FUNCID_18[3:0] FUNCID_19[3:0] www.maximintegrated.com DESCRIPTION Functional mode for port i (0i19) * When switching from one mode to another, it is recommended to first switch to the highimpedance mode. The duration for which the device may need to stay in the transitional highimpedance mode depends on the application and hardware configuration. * 0000: Mode 0 - High impedance * The port is configured in high-impedance mode. * 0001: Mode 1 - Digital input with programmable threshold, GPI (Figure 8) * The port is configured as a GPI whose threshold is set through the DAC data register. The DAC data register for that port needs to be set to the value corresponding to the intended input threshold voltage. Any input voltage above that programmed threshold is reported as a logic one. The input voltage must be between 0V and 5V. * To avoid false interrupts, the port's GPIERMSK register bit must be asserted. The DAC data register can then be set for the desired threshold voltage. It may take up to 1ms for the threshold voltage to be effective. The port's GPIMD register bit is set next. At that point, GPIERMSK can be deasserted for the port to start detecting events. The data resulting from the comparison between the threshold voltage and the voltage at the port can be read from the corresponding GPIDAT register bit. * 0010: Mode 2 - Bidirectional level translator terminal (Figure 11) * Any pair of adjacent ports can form a bidirectional level translator path. Only the lower index port of the pair needs to be configured to enable this mode. The other port (index + 1) must be set in high-impedance mode. * Port 19 cannot be set in mode 2. * The activity on this port is observable through its GPI path. The GPI-related registers are configured as described for mode 1. Maxim Integrated 44 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Port Configuration Registers (Read/Write)(continued) BIT FIELD NAME DESCRIPTION * * * * * * www.maximintegrated.com 0011: Mode 3 - Register-driven digital output with DAC-controlled level, GPO (Figure 9) * The port is configured as a GPO driven by the corresponding GPODAT register bit. The logic one level is set by the DAC data register of that port. * The port's DAC data register needs to be set first. It may require up to 1ms for the port to be ready to produce the desired logic one level. At that point, the port can be set in mode 3. The logic level at the port is then controlled by the corresponding GPODAT register bit. 0100: Mode 4 - Unidirectional path output with DAC-controlled level, GPO (Figure 10) * The port is configured as a GPO forming the output of a unidirectional level translator path. The input port of that path is specified by the functional parameter, ASSOCIATED PORT, and that port must be separately configured in GPI mode. The port's DAC data register defines the logic one level. The data received by the GPI-configured port is transmitted by this port configured in mode 4. * The data from the associated GPI-configured port can be inverted by asserting the functional parameter INV. * Multiple ports configured in mode 4 can refer to the same GPI-configured port through the functional parameter, ASSOCIATED PORT. Therefore, one GPI-configured port can transmit its data to multiple ports configured in mode 4. * To avoid false interrupts and unexpected activity at the port configured in mode 4, the GPI port must be configured before this port is configured in mode 4. * Functional parameters to be set: INV, ASSOCIATED PORT 0101: Mode 5 - Analog output for DAC (Figure 6) * The port's DAC data register must be set for the desired voltage at the port. It may take up to 1ms for the port to reflect the data written in the DAC data register. * Functional parameters to be set: RANGE (codes 001, 010, and 011 apply to this mode). 0110: Mode 6 - Analog output for DAC with ADC monitoring (Figure 7) * In addition to the functionality of mode 5, the port is sampled by the ADC. The result of the ADC conversion is stored in the port's ADC data register. The host can access that register to monitor the voltage at the port. * When the ADC input voltage range is set from 0V to 2.5V, (RANGE = 100 or 110), the DAC data register value must be limited to the range of values corresponding to 0V to 2.5V at the port. Internally, the DAC data register value is clipped, so that the PIXI port voltage is contained within a range from 0V to 5V to prevent device damage. * Functional parameters to be set: AVR, RANGE 0111: Mode 7 - Positive analog input to single-ended ADC (Figure 3) * The port is configured as a single-ended ADC input. * Functional parameters to be set: AVR, RANGE, # OF SAMPLES 1000: Mode 8 - Positive analog input to differential ADC (Figure 4) * The port is configured as a differential ADC positive input. * Functional parameters to be set: AVR, RANGE, # OF SAMPLES, ASSOCIATED PORT Maxim Integrated 45 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Port Configuration Registers (Read/Write)(continued) BIT FIELD NAME www.maximintegrated.com DESCRIPTION * 1001: Mode 9 - Negative analog input to differential ADC * The port is configured as a differential ADC negative input. * The number of samples to average is defined by the associated positive port. The functional parameters AVR and RANGE must be identical to those used by the corresponding positive port. * A port configured in mode 9 can be associated to more than one port configured in mode 8. * Functional parameters to be set: AVR, RANGE * 1010: Mode 10 - Analog output for DAC and negative analog input to differential ADC (Figure 5) * While this port drives the voltage corresponding to its DAC data register, it also operates as the negative input for the ADC. * The number of samples to average is defined by the associated positive port. The functional parameters AVR and RANGE must be identical to those used by the corresponding positive port. * A port configured in mode 10 can be associated to more than one port configured in mode 8. * When the ADC input voltage range is set from 0V to 2.5V (RANGE = 100 or 110), the DAC data register value must be limited to the range of values corresponding to 0V to 2.5V at the port. Internally, the DAC data register value is clipped, so that the PIXI port voltage is contained within a range from 0V to 5V to prevent device damage. * Functional parameters to be set: AVR, RANGE * 1011: Mode 11 - Terminal to GPI-controlled analog switch (Figure 12) * In this mode, two adjacent ports can be connected together through an analog switch controlled by a GPI-configured port (designated by the functional parameter ASSOCIATED PORT). This function involves three ports. The switch controlling port needs to be separately configured in GPI mode. Only the port with the lower index needs to be configured in mode 11. The port with the higher index can be configured in any other mode, except mode 2. If the port of higher index operates in an ADC-related mode (mode 6, 7, 8, or 9), the signals applied to the port in mode 11 must comply with the input voltage range for which the port of higher index is configured. * Port 19 cannot be configured in mode 11, as there is no switch between ports 0 and 19. * Functional parameters to be set: INV, ASSOCIATED PORT * 1100: Mode 12 - Terminal to register-controlled analog switch * This mode is identical to Mode 11, except that the switch remains closed as long as this port is configured in mode 12. Maxim Integrated 46 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Table 4. Port Functional Modes FUNCID[3:0] MODE DESCRIPTION FUNCPRM[11:0] 15 14 13 12 0 High impedance 0 0 0 0 11 10 9 8 7 6 5 1 Digital input with programmable threshold, GPI 0 0 0 1 2 Bidirectional level translator terminal 0 0 1 0 3 Register-driven digital output with DACcontrolled level, GPO 0 0 1 1 4 Unidirectional path output with DACcontrolled level, GPO 0 1 0 0 5 Analog output for DAC 0 1 0 1 6 Analog output for DAC with ADC monitoring 0 1 1 0 AVR RANGE 7 Positive analog input to single-ended ADC 0 1 1 1 AVR RANGE # OF SAMPLES 8 Positive analog input to differential ADC 1 0 0 0 AVR RANGE # OF SAMPLES 9 Negative analog input to differential ADC 1 0 0 1 AVR RANGE 10 Analog output for DAC and negative analog input to differential ADC (pseudo-differential mode) 1 0 1 0 AVR RANGE 11 Terminal to GPIcontrolled analog switch 1 0 1 1 INV 12 Terminal to registercontrolled analog switch 1 1 0 0 INV 4 3 2 1 0 ASSOCIATED PORT* RANGE ASSOCIATED PORT* ASSOCIATED PORT* *Port must be configured separately to a compatible mode. www.maximintegrated.com Maxim Integrated 47 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO ADC Data Registers (Read) BIT 11:0 FIELD NAME ADCDAT_0[11:0] ADCDAT_1[11:0] ADCDAT_2[11:0] ADCDAT_3[11:0] ADCDAT_4[11:0] ADCDAT_5[11:0] ADCDAT_6[11:0] ADCDAT_7[11:0] ADCDAT_8[11:0] ADCDAT_9[11:0] ADCDAT_10[11:0] ADCDAT_11[11:0] ADCDAT_12[11:0] ADCDAT_13[11:0] ADCDAT_14[11:0] ADCDAT_15[11:0] ADCDAT_16[11:0] ADCDAT_17[11:0] ADCDAT_18[11:0] ADCDAT_19[11:0] DESCRIPTION ADC data for port i (0i19) * 12-bit data produced by the ADC when converting the analog input signal on port i. * The conversion result is represented in straight binary for ports configured in singleended mode (modes 6, 7), and in two's complement for ports configured as an ADC positive input (mode 8) in differential or pseudo-differential mode (mode 9). The ADC data register of the port configured as an ADC negative input in differential (mode 9) or pseudo-differential mode (mode 10) contains 0x0000. DAC Data Registers (Read/Write) BIT FIELD NAME 11:0 DACDAT_0[11:0] DACDAT_1[11:0] DACDAT_2[11:0] DACDAT_3[11:0] DACDAT_4[11:0] DACDAT_5[11:0] DACDAT_6[11:0] DACDAT_7[11:0] DACDAT_8[11:0] DACDAT_9[11:0] DACDAT_10[11:0] DACDAT_11[11:0] DACDAT_12[11:0] DACDAT_13[11:0] DACDAT_14[11:0] DACDAT_15[11:0] DACDAT_16[11:0] DACDAT_17[11:0] DACDAT_18[11:0] DACDAT_19[11:0] www.maximintegrated.com DESCRIPTION DAC data for port i (0i19) * 12-bit DAC data for port i. * The data is represented in straight binary. Maxim Integrated 48 www.maximintegrated.com N N Configure FUNCID[i], FUNCPRM[i] for selected port Select first port in mode 3,4,5,6, or 10 Configure GPODAT[i] for ports in mode 3 Wait 200s times the number of ports in mode 1 Configure FUNCID[i], FUNCPRM[i] for ports in mode 1 Configure GPIMD[i] for ports in mode 1 Y Are all ports in mode 3,4,5,6, or 10 configured? Wait 1ms Y N Enter DACPRSTDAT1 or DACPRSTDAT2 Is DACCTL = 2 or 3? Wait 200s Configure DACREF, DACCTL Y Is mode 1,3,4,5,6,or 10 used? Enter DACDAT[i] for ports in mode 1,3,4,5,6, or 10* Select next port in mode 3,4,5,6, or 10 Start of configuration Configure BRST, THSHDN,ADCCONV Select next port in mode 7 or 8 Select next port in mode 9 N N Configure ADCCTL Y Are all ports in mode 7 or 8 configured? Wait 100s Configure FUNCID[i], FUNCPRM[i] for selected port Select first port in mode 7 or 8 Y Are all ports in mode 9 configured? Wait 100s Configure FUNCID[i], FUNCPRM[i] for selected port Select first port in mode 9 Y Is mode 7,8, or 9 used? N N End of configuration Configure Interrupt Masks (...MSK) Configure TMPCTL Configure TMP...HI and TMP...LO Configure TMPPER, RSCANCEL, TMP...MONCFG Y Are Temperature sensors used? Configure FUNCID[i], FUNCPRM[i] for ports in mode 2,11, or 12 Y Is mode 2,11, or 12 used? N MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Applications Information Configuration Flow Chart Figure 14. PIXI Port Configuration Flow Chart Maxim Integrated 49 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Configuration Software (GUI) To simplify use of the MAX11300, Maxim has created a GUI for users to easily configure the device for unique application needs with a simple drag and drop. The soft- ware generates register addresses and corresponding register values. Figure 15 shows an example of this software with a few functional connections. Figure 15. Example of GUI to Develop Configuration File www.maximintegrated.com Maxim Integrated 50 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Configuration Software Output File Generated on SUPPLY dd/mm/yyyy hr:min VOLTAGE VDDIO 12.5 VSSIO -2.5 AVDD 5 DVDD 3.3 ADC_EXT_REF 2.5 DAC_REF 2.5 NAME ADDRESS VALUE DESCRIPTION gpo_data_15_to_0 0x0D 0x0000 GPO data for PIXI ports 15 to 0 gpo_data_19_to_16 0x0E 0x0000 GPO data for PIXI ports 19 to 16 device_control 0x10 0x00c0 Device main control register interrupt_mask 0x11 0xffff gpi_irqmode_7_to_0 0x12 0x0000 GPI port 0 to 7 mode register gpi_irqmode_15_to_8 0x13 0x0000 GPI port 8 to 15 mode register gpi_irqmode_19_to_16 0x14 0x0000 GPI port 16 to 19 mode register dac_preset_data_1 0x16 0x0000 DAC preset data #1 dac_preset_data_2 0x17 0x0000 DAC preset data #2 tmp_mon_cfg 0x18 0x0000 Temperature monitor configuration Interrupt mask register tmp_mon_int_hi_thresh 0x19 0x07ff Internal temperature monitor high threshold tmp_mon_int_lo_thresh 0x1A 0x0800 Internal temperature monitor low threshold tmp_mon_ext1_hi_thresh 0x1B 0x07ff 1st external temperature monitor high threshold tmp_mon_ext1_lo_thresh 0x1C 0x0800 1st external temperature monitor low threshold tmp_mon_ext2_hi_thresh 0x1D 0x07ff 2nd external temperature monitor high threshold tmp_mon_ext2_lo_thresh 0x1E 0x0800 2nd external temperature monitor low threshold port_cfg_00 0x20 0x7100 Configuration register for PIXI port 0 port_cfg_01 0x21 0x5100 Configuration register for PIXI port 1 port_cfg_02 0x22 0x8103 Configuration register for PIXI port 2 port_cfg_03 0x23 0x9100 Configuration register for PIXI port 3 port_cfg_04 0x24 0x5100 Configuration register for PIXI port 4 port_cfg_05 0x25 0x0000 Configuration register for PIXI port 5 port_cfg_06 0x26 0x6100 Configuration register for PIXI port 6 port_cfg_07 0x27 0x0000 Configuration register for PIXI port 7 port_cfg_08 0x28 0x1000 Configuration register for PIXI port 8 port_cfg_09 0x29 0x3000 Configuration register for PIXI port 9 port_cfg_10 0x2A 0x0000 Configuration register for PIXI port 10 www.maximintegrated.com Maxim Integrated 51 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Configuration Software Output File (continued) NAME ADDRESS VALUE DESCRIPTION port_cfg_11 0x2B 0xc000 Configuration register for PIXI port 11 port_cfg_12 0x2C 0x0000 Configuration register for PIXI port 12 port_cfg_13 0x2D 0x1000 Configuration register for PIXI port 13 port_cfg_14 0x2E 0x400d Configuration register for PIXI port 14 port_cfg_15 0x2F 0x2000 Configuration register for PIXI port 15 port_cfg_16 0x30 0x0000 Configuration register for PIXI port 16 port_cfg_17 0x31 0x1000 Configuration register for PIXI port 17 port_cfg_18 0x32 0xb011 Configuration register for PIXI port 18 port_cfg_19 0x33 0x0000 Configuration register for PIXI port 19 dac_data_port_00 0x60 0x0000 DAC data register for PIXI port 0 dac_data_port_01 0x61 0x0000 DAC data register for PIXI port 1 dac_data_port_02 0x62 0x0000 DAC data register for PIXI port 2 dac_data_port_03 0x63 0x0000 DAC data register for PIXI port 3 dac_data_port_04 0x64 0x0000 DAC data register for PIXI port 4 dac_data_port_05 0x65 0x0000 DAC data register for PIXI port 5 dac_data_port_06 0x66 0x0000 DAC data register for PIXI port 6 dac_data_port_07 0x67 0x0000 DAC data register for PIXI port 7 dac_data_port_08 0x68 0x0666 DAC data register for PIXI port 8 dac_data_port_09 0x69 0x0666 DAC data register for PIXI port 9 dac_data_port_10 0x6A 0x0000 DAC data register for PIXI port 10 dac_data_port_11 0x6B 0x0000 DAC data register for PIXI port 11 dac_data_port_12 0x6C 0x0000 DAC data register for PIXI port 12 dac_data_port_13 0x6D 0x0666 DAC data register for PIXI port 13 dac_data_port_14 0x6E 0x0666 DAC data register for PIXI port 14 dac_data_port_15 0x6F 0x0000 DAC data register for PIXI port 15 dac_data_port_16 0x70 0x0000 DAC data register for PIXI port 16 dac_data_port_17 0x71 0x0666 DAC data register for PIXI port 17 dac_data_port_18 0x72 0x0000 DAC data register for PIXI port 18 dac_data_port_19 0x73 0x0000 DAC data register for PIXI port 19 Layout, Grounding, Bypassing For best performance, use PCBs with a solid ground plane. Ensure that digital and analog signal lines are separated from each other. Do not run analog and digital (especially clock) lines parallel to one another or digital lines underneath the MAX11300 package. Noise in AVDD, AGND, AVDDIO, AVSSIO, ADC_REF_INT, ADC_EXT_ INT, and DAC_REF affects the device performance. Bypass AVDD, DVDD, AVDDIO, and AVSSIO to ground www.maximintegrated.com with 0.1F and 10F bypass capacitors. Bypass ADC_ INT_REF and DAC_REF to ground with capacitors whose values are shown in the REF Electrical Specifications table. Bypass ADC_EXT_REF to ground with a 4.7F capacitor. Place the bypass capacitors as close as possible to the respective pins and minimize capacitor lead and trace lengths for best supply-noise rejection. For optimum heat dissipation, connect the exposed pad (EP) to a large copper area, such as a ground plane. Maxim Integrated 52 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Package Information Ordering Information PART TEMP RANGE PIN-PACKAGE MAX11300GCM+ -40C to +105C 48 TQFP-EP* MAX11300GCM+T -40C to +105C 48 TQFP-EP* MAX11300GTL+ -40C to +105C 40 TQFN-EP* MAX11300GTL+T -40C to +105C 40 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. T = Tape and reel For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 40 TQFN-EP T4066+3 21-0141 90-0054 48 TQFP-EP C48E+8 21-0065 90-0138 Chip Information PROCESS: BiCMOS www.maximintegrated.com Maxim Integrated 53 MAX11300 PIXI, 20-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO Revision History REVISION NUMBER REVISION DATE PAGES CHANGED 0 3/14 Initial release 1 10/14 Revised General Description, Features, Electrical Characteristics, Typical Operating Characteristics, Recommended VDDIO/VSSIO Supply Selection, Typical Application Circuits, Table 3, Ordering Information, Device Control Register (Read/Write), ADC Data Registers, Figure 15, Configuration Software Output File 2 12/14 Revised Benefits and Features section 3 4/16 Updated Benefits and Features, Electrical Characteristics, and Typical Operating Characteristics sections DESCRIPTION -- 1, 3-7, 10, 11, 12, 22, 23, 32-36, 42, 50, 52-55 1 1, 3, 6, 9, 11, 16, 32, 35, 53 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated's website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. (c) 2016 Maxim Integrated Products, Inc. 54