QT1080-ISG - Quantum Research Group

lQQT1080

8 K

OUCH

™ S

ENSOR

APPLICATIONS

!Pointing devices

!Remote controls

!PC peripherals

!Television controls

!MP3 players

!Mobile phones

QT1080 charge-transfer (’QT’) QTouch IC is a self-contained digital controller capable of detecting near-proximity or touch on

up to eight electrodes. It allows electrodes to project independent sense fields through any dielectric such as glass or

plastic. This capability coupled with its continuous self-calibration feature can lead to entirely new product concepts, adding

high value to product designs. The devices are designed specifically for human interfaces, like control panels, appliances,

gaming devices, lighting controls, or anywhere a mechanical switch or button may be found; they may also be used for some

material sensing and control applications.

Each of the channels operates independently of the others, and each can be tuned for a unique sensitivity level by simply

changing a corresponding external Cs capacitor.

AKS™ Adjacent Key Suppression (patent pending) suppresses touch from weaker responding keys and only allows a

dominant key to detect; for example to solve the problem of large fingers on tightly spaced keys.

Spread-spectrum burst technology provides superior noise rejection. These devices also have a SYNC/LP pin which allows for

synchronization with additional similar parts and/or to an external source to suppress interference, or, a Low Power (LP) mode

which conserves power.

By using the charge-transfer principle, this device delivers a level of performance clearly superior to older technologies yet is

highly cost-effective.

This part is available in both 32-QFN and 48-SSOP RoHS compliant packages.

QT1080 R11.06/0806

"Eight completely independent QT touch sensing fields

"Designed for low-power portable applications

"100% autocal for life - no adjustments required

"Direct outputs - either encoded or ‘per key’

"Fully debounced results

"2.8V to 5.0V single supply operation

"45µA current typ @ 3V in 360ms LP mode

"AKS™ Adjacent Key Suppression

"Spread spectrum bursts for superior noise rejection

"Sync pin for excellent LF noise rejection

"10ms ‘Fast mode’ for use in slider applications

"RoHS compliant packages: 32-QFN and 48-SSOP

QT1080-IS48GQT1080-ISG-40ºC to +85ºC

48-SSOP32-QFNT

AVAILABLE OPTIONS

12345678

24 23 22 21 20 19 18 17

/RST

VDD

OSC

N.C.

SNS0

SNS0K

SNS1

SYNC/LP

DETECT

VSS

SNS7K

SNS7

SNS6K

SNS6

SNS5K

SN1K

SNS2

SNS2K

SNS3

SNS3K

SNS4

SNS4K

SNS5

OUT_6

OUT_5

OUT_4

OUT_3

OUT_2

OUT_1

OUT_0

QT1080

32-QFN

OUT_7

3.1 Oscillator Frequency

..................................

3 Design Notes

........................................

2.11 Unused Keys

......................................

2.10 Simplified Mode

....................................

2.9 Fast Detect Mode

....................................

2.8 MOD_0, MOD_1 Inputs

................................

2.7 AKS Function Pins

...................................

2.6 SYNC/LP Pin

.......................................

2.5 DETECT Pin

.......................................

2.4 OUT Pins - Binary Coded Mode

..........................

2.3 OUT Pins - Direct Mode

...............................

2.2 Option Resistors

....................................

2.1 Start-up Time

.......................................

2 Device Operation

.....................................

1.2 Wiring

............................................

1.1 Parameters

........................................

1 Overview

...........................................

4.10 Part Marking

.....................................

4.9 Mechanical - 48-SSOP Package

........................

4.8 Mechanical - 32-QFN Package

.........................

4.7 LP Mode Typical Response Times

......................

4.6 Idd Curves (Average)

................................

4.5 Signal Processing

..................................

4.4 DC Specifications

...................................

4.3 AC Specifications

...................................

4.2 Recommended Operating Conditions

.....................

4.1 Absolute Maximum Specifications

.......................

4 Specifications

......................................

3.5 PCB Layout and Construction

...........................

3.4 Power Supply

.......................................

3.3 Cs Sample Capacitors - Sensitivity

........................

3.2 Spread-spectrum Circuit

...............................

Contents

2 QT1080 R11.06/0806

1 Overvie

1.1

Parameters

The QT1080 is an easy to use, eight-touch-key sensor IC

based on Quantum’s patented charge-transfer principles for

robust operation and ease of design. This device has many

advanced features which provide for reliable, trouble-free

operation over the life of the product.

Burst operation: The device operates in ‘burst mode’. Each

key is acquired using a burst of charge-transfer sensing

pulses whose count varies depending on the value of the

reference capacitor Cs and the load capacitance Cx. In LP

mode, the device sleeps in an ultra-low current state

between bursts to conserve power. The keys’ signals are

acquired using two successive bursts of pulses:

Burst A: Keys 0, 1, 4, 5

Burst B: Keys 2, 3, 6, 7

Bursts always operate in A-B sequence.

Self-calibration: On power-up, all eight keys are

self-calibrated within 350 milliseconds (typical) to provide

reliable operation under almost any conditions.

Autorecalibration: The device can time out and recalibrate

each key independently after a fixed interval of continuous

touch detection, so that the keys can never become ‘stuck

on’ due to foreign objects or other sudden influences. After

recalibration the key will continue to function normally. The

delay is selectable to be either 10s, 60s, or infinite

(disabled).

The device also autorecalibrates a key when its signal

reflects a sufficient decrease in capacitance. In this case the

device recalibrates after ~2 seconds so as to recover normal

operation quickly.

Drift compensation operates to correct the reference level

of each key slowly but automatically over time, to suppress

false detections caused by changes in temperature,

humidity, dirt and other environmental effects.

The drift compensation is asymmetric; in the increasing

capacitive load direction the device drifts more slowly than in

the decreasing direction. In the increasing direction, the rate

of compensation is one count of signal per 2 seconds; in the

opposing direction, it is one count every 500ms.

Detection Integrator (DI) confirmation reduces the effects

of noise on the QT1080. The ‘detect integrator’ mechanism

requires consecutive detections over a number of

measurement bursts for a touch to be confirmed and

indicated on the outputs. In a like manner, the end of a touch

(loss of signal) has to be confirmed over a number of

measurement bursts. This process acts as a type of

‘debounce’ against noise.

A per-key counter is incremented each time the key has

exceeded its threshold and stayed there for a number of

measurement bursts. When this counter reaches a preset

limit the key is finally declared to be touched.

For example, if the limit value is six, then the device has to

exceed its threshold and stay there for six measurement

bursts in succession without going below the threshold level,

before the key is declared to be touched. If on any

measurement burst the signal is not seen to exceed the

threshold level, the counter is cleared and the process has to

start from the beginning.

In normal operation, both the start and end of a touch must

be confirmed for six measurement bursts. In a special ‘Fast

Detect‘ mode (available via jumper resistors), confirmation of

the start of a touch requires only two sequential detections,

but confirmation of the end of a touch is still six bursts.

Fast detect is only available when AKS is disabled.

Spread-spectrum operation: The bursts operate over a

spread of frequencies, so that external fields will have

minimal effect on key operation and emissions are very

weak. Spread-spectrum operation works with the DI

mechanism to dramatically reduce the probability of false

detection due to noise.

Sync Mode: The QT1080 features a Sync mode to allow the

device to slave to an external signal source, such as a mains

signal (50/60Hz), to limit interference effects. This is

performed using the SYNC/LP pin. Sync mode operates by

triggering two sequential acquire bursts, in sequence A-B

from the Sync signal. Thus, each Sync pulse causes all eight

keys to be acquired.

Low Power (LP) Mode: The device features an LP mode for

microamp levels of current drain with a slower response

time, to allow use in battery operated devices. On touch

detection, the device automatically reverts to its normal

mode and asserts the DETECT pin active to wake up a host

controller. The device remains in normal, full acquire speed

mode until another pulse is seen on its SYNC/LP pin, upon

which it goes back to LP mode.

AKS™ Adjacent Key Suppression is a patent-pending

feature that can be enabled via jumper resistors. AKS works

to prevent multiple keys from responding to a single touch, a

common complaint about capacitive touch panels. This can

happen with closely spaced keys, or with control surfaces

that have water films on them.

AKS operates by comparing signal strengths from keys

within a group of keys to suppress touch detections from

those that have a weaker signal change than the dominant

one.

The QT1080 has two different AKS groupings of keys,

selectable via option resistors. These groupings are:

#AKS operates in two groups of four keys.

#AKS operates over all eight keys.

These two modes allow the designer to provide AKS while

also providing for shift or function operations.

If AKS is disabled, all keys can operate simultaneously.

Outputs: There are two output modes: one per key, and

binary coded.

One per key output: In this mode there is one output pin per

key. This mode has two output drive options, push-pull and

open-drain. The outputs can also be made either active-high

or active-low. These options are set via external

configuration resistors.

Binary coded output: In this mode, three output lines encode

for one possible key in detect. If more than one key is

detecting, only the first one touched will be indicated.

Simplified Mode: To reduce the need for option resistors,

the simplified operating mode places the part into fixed

settings with only the AKS feature being selectable. LP

mode is also possible in this configuration. Simplified mode

is suitable for most applications.

3 QT1080 R11.06/0806

1.2 Wiring

Table 1.1 Pinlist

OpenOut 7O/ODOUT_73232 OpenOut 6O/ODOUT_63131 OpenOut 5O/ODOUT_53030 OpenOut 4O/ODOUT_42929 Open

In binary coded mode, these

pins are clamped internally to

Vss

Out 3O/ODOUT_32828 Open

Also, binary coded output 2

Out 2O/ODOUT_22727 OpenAlso, binary coded output 1Out 1O/ODOUT_12626 OpenAlso, binary coded output 0Out 0O/ODOUT_02525 -Leave open--n/c23, 24 - OpenActive = any key in detectDetect StatusO/ODDETECT2224 Vdd or VssRising edge sync or LP pulseSync In or LP InISYNC/LP

‡

2123 -Leave open--n/c18, 19, 20 - -0VGroundPwrVss1722

-Leave open--n/c

11, 12, 13,

14, 15, 16

OpenTo Cs7 + KeySense pinI/OSN7K1021

Open or mode

resistor

†

or option

resistor*

To Cs7 and/or mode resistor

†

or option resistor*

Sense pin and mode

or option select

I/OSNS7920

Open or

mode resistor

†

To Cs6 + Key and/or

mode resistor

†

Sense pin and

mode select

I/OSNS6K819

Open or

option resistor*

To Cs6 and/or

option resistor*

Sense pin and

option select

I/OSNS6718

OpenTo Cs5 + KeySense pinI/OSNS5K617

Open or

option resistor*

To Cs5 and/or

option resistor*

Sense pin and

option select

I/OSNS5516

OpenTo Cs4 + KeySense pinI/OSNS4K415

Open or

option resistor*

To Cs4 and/or

option resistor*

Sense pin and

option select

I/OSNS4314

OpenTo Cs3 + KeySense pinI/OSNS3K213

Open or

option resistor*

To Cs3 and/or

option resistor*

Sense pin and

option select

I/OSNS3112

OpenTo Cs2 + KeySense pinI/OSNS2K4811

Open or

option resistor*

To Cs2 and/or

option resistor*

Sense pin and

option select

I/OSNS24710

OpenTo Cs1 + KeySense pinI/OSNS1K469

Open or

option resistor*

To Cs1 and/or

option resistor*

Sense pin and

option select

I/OSNS1458

OpenTo Cs0 + KeySense pinI/OSNS0K447

Option resistor

To Cs0 and/or

option resistor

Sense pin and

option select

I/OSNS0436

-Leave open--n/c

38, 39, 40,

41, 42

Resistor to Vdd and optional

spread spectrum RC network

OscillatorIOSC374

-+2.8 ~ +5.0VPowerPwrVdd363 VddActive low resetReset inputI/RST352 -Leave open--n/c34 - 100K resistor to VssSpread spectrum driveSpread spectrumODSS331

If UnusedNotesFunctionTypeName

48-SSOP

32-QFN

Pin Type

I CMOS input only

I/O CMOS I/O

O CMOS push-pull output

OD CMOS open drain output

O/OD CMOS push pull or open-drain output (option selected)

Pwr Power / ground

Notes

†

Mode resistor is required only in Simplified mode (see Figure 1.2)

* Option resistor is required only in Full Options mode (see Figure 1.1)

‡

Pin is either Sync or LP depending on options selected (functions SL_0, SL_1, see Figure 1.1)

4 QT1080 R11.06/0806

Figure 1.1 Connection Diagram - Full Options; Shown for 32-QFN Package

Table 1.2

AKS / Fast-Detect Options

Table 1.3

Max On-Duration

Table 1.4

Polarity and Output

Table 1.5

SYNC/LP Function

5 QT1080 R11.06/0806

SNS3

SNS3K

SNS4

SNS4K

SNS5

SNS5K

SNS6

SNS6K

SNS7

SNS7K

VSS

DETECT

SYNC/LP

SNS2K

SNS2

SNS1K

SNS1

SNS0K

SNS0

/RST

OUT_7

OUT_6

OUT_5

OUT_4

OUT_3

OUT_2

OUT_1

OUT_0

2.2K

10K

4.7nF

10K

4.7nF

2.2K

KEY 2

10K

4.7nF

2.2K

OUT_1

OUT_0

DETECT OUT

SYNC or LP IN

OUT_2

OUT_3

OUT_4

OUT_5

OUT_6

OUT_7

2.2K

QT1080

32-QFN

4.7nF

Vdd / Vss

1M Vdd / Vss

POL

MOD_1

OUT_D

SL_0

SL_1

MOD_0

AKS_1

AKS_0

OUT_0

VDD

Vunreg

*4.7uF *4.7uF *100nF

+2.8 ~ +5V

Voltage Reg VDD

KEY 1

KEY 0

KEY 3

KEY 4

KEY 5

KEY 6

KEY 7

SNS3

SNS4

SNS5

SNS6

SNS7

SNS2

SNS1

SNS0

Vdd Range Rb1 Rb2

3.6 ~ 5V

2.8 ~ 3.59V 12K 22K

15K 27K

Recommended Rb 1, Rb2 Values

OSC

Rb1

Rb2

VDD

The required valu e of spread-spectrum capa ci tor C

will vary according to the lengths of the acquire bursts,

see Section 3.2. A typical value of C is 100nF.

OffOn, globalVddVdd OffOn, in 2 groupsVssVdd EnabledOffVddVss OffOffVssVss FAST-DETECTAKS MODEAKS_0AKS_1

(reserved)VddVdd Infinite (disabled)VssVdd 60 seconds (nom) to recalibrateVddVss 10 seconds (nom) to recalibrateVssVss MAX ON-DURATION MODEMOD_0MOD_1

Direct, active low, push-pullVddVdd Direct, active high, push-pullVssVdd Direct, active low, open-drainVddVss Binary coded, active high, push-pullVssVss OUT_n, DETECT PIN MODEPOLOUT_D

LP mode: 360ms nom response timeVddVdd LP mode: 200ms nom response timeVssVdd LP mode: 110ms nom response timeVddVss SyncVssVss SYNC/LP PIN MODESL_0SL_1

Figure 1.2 Connection Diagram - Simplified Mode; Shown for 32-QFN

SMR resistor installed between SNS6K and SNS7.

Table 1.6

AKS Resistor Options

Table 1.7

Functions in Simplified Mode

Active high on any detect

Detect Pin 60 seconds (nom)Max on-duration delay 200ms nom LP function; sync not available

SYNC/LP pin Direct outputs, push-pull, active high

Output Drive, Polarity

6 QT1080 R11.06/0806

SNS3

SNS3K

SNS4

SNS4K

SNS5

SNS5K

SNS6

SNS6K

SNS7

SNS7K

VSS

DETECT

SYNC/LP

SNS2K

SNS2

SNS1K

SNS1

SNS0K

SNS0

OSC

/RST

OUT_7

OUT_6

OUT_5

OUT_4

OUT_3

OUT_2

OUT_1

OUT_0

2.2K

10K

4.7nF

10K

4.7nF

2.2K

10K

4.7nF

2.2K

Rb1

Rb2

VDD

OUT_1

OUT_0

DETECT OUT

LP IN

OUT_2

OUT_3

OUT_4

OUT_5

OUT_6

OUT_7

2.2K

4.7nF

1M Vdd / Vss

AKS_0

SMR

OUT_0

VDD

Vunreg

*4.7uF *4.7uF

+2.8 ~ +5V

Voltage Reg VDD

*100nF

KEY 3

KEY 4

KEY 5

KEY 6

KEY 7

KEY 2

KEY 1

KEY 0

SNS3

SNS4

SNS5

SNS6

SNS7

SNS2

SNS1

SNS0

QT1080

32-QFN

Vdd Range Rb1 Rb2

3.6 ~ 5V

2.8 ~ 3.59V 12K 22K

15K 27K

Recommended Rb1, Rb2 Values

The required va lu e of spr ead-spectrum capacitor C

will vary accordi ng to the le ngths of the acquire bursts,

see Section 3.2. A typi cal val ue of C is 100nF.

OffOn, globalVdd EnabledOffVss FAST-DETECTAKS MODEAKS_0

2 Device Operation

2.1 Start-up Time

After a reset or power-up event, the device requires 350ms

to initialize, calibrate, and start operating normally. Keys will

work properly once all keys have been calibrated after reset.

2.2 Option Resistors

The option resistors are read on power-up only. There are

two primary option mode configurations: full, and simplified.

In full options mode, eight 1M✡ option resistors are required

as shown in Figure 1.1. All eight resistors are mandatory.

To obtain simplified mode, a 1M✡ resistor should be

connected from SNS6K to SNS7. In simplified mode, only

one additional 1M✡ option resistor is required for the AKS

feature (Figure 1.2).

Note that the presence and connection of option resistors

will affect the required values of Cs; this effect will be

especially noticeable if the Cs values are under 22nF. Cs

values should be adjusted for optimal sensitivity after the

option resistors are connected.

2.3 OUT Pins - Direct Mode

Direct output mode is selected via option resistors, as shown

in Table 1.4.

In this mode, there is one output for each key; each is active

when a touch is confirmed on the corresponding electrode.

Unused OUT pins should be left open.

If AKS is off, it is possible for all OUT pins to be active at the

same time.

Circuit of Figure 1.1: OUT polarity and drive are governed

by the resistor connections to Vdd or Vss according to

Table 1.4. The drive can be either push-pull or open-drain,

active low or high.

Circuit of Figure 1.2: In this simplified circuit, the OUT pins

are active high, push-pull only.

2.4 OUT Pins - Binary Coded Mode

Binary code mode is selected via option resistors, as shown

in Table 1.4.

In this mode, a key detection is registered as a binary code

on pins OUT_2, OUT_1 and OUT_0, with possible values

from 000 to 111. In practice, four lines are required to read

the code, unless key 0 is not implemented; the output code

000 can mean either ‘nothing detecting’ or ‘key 0 is

detecting’. The fourth required line (if all eight keys are

implemented) is the DETECT signal, which is active-high

when any key is active.

The first key touched always wins and shows its output.

Keys that come afterwards are hidden until the currently

reported key has stopped detecting, in which case the code

will change to the latent key.

This mode is useful to reduce the number of connections to

a host controller, at the expense of being able to only report

one active key at a time. Note that in global AKS mode

(Section 2.7), only one key can report active at a time

anyway.

Circuit of Figure 1.1: OUT polarity and drive can only be

push-pull and active high.

Circuit of Figure 1.2: Binary coded not available.

2.5 DETECT Pin

DETECT represents the functional logical-OR of all eight

keys. DETECT can be used to wake up a battery-operated

product upon human touch.

DETECT is also required to indicate to a host when the

binary coded output pins (in that mode) are showing an

active key. While DETECT is active, the binary coded

outputs should be read at least twice along with DETECT to

make sure that the code was not transitioning between

states, to prevent a false reading.

The output polarity and drive of DETECT are governed

according to Table 1.4.

2.6 SYNC/LP Pin

The SYNC / LP pin function is configured according to the

SL_0 and SL_1 resistor connections to either Vdd or Vss,

according to Table 1.5.

Sync mode: Sync allows the designer to synchronize

acquire bursts to an external signal source, such as mains

frequency (50/60 Hz) to suppress interference. It can also be

used to synchronize two QT parts which operate near each

other, so that they will not cross-interfere if two or more of

the keys (or associated wiring) of the two parts are near

each other.

The SYNC input of the QT1080 is positive pulse triggered. If

the SYNC input does not change, the device will free-run at

its own rate after ~150ms.

A trigger pulse on SYNC will cause the device to fire two

acquire bursts in A-B sequence:

Burst A: Keys 0, 1, 4, 5

Burst B: Keys 2, 3, 6, 7

Low Power LP Mode: This allows the device to enter a Low

Power mode with very low power consumption, in one of

three response time settings: 110ms, 200ms, and 360ms

nominal.

LP mode is entered by a positive >150µs trigger pulse on the

SYNC/LP pin. Once the LP pulse is detected, the device will

enter and remain in this microamp mode until it senses and

confirms a touch. Then it will switch back to normal (full

speed) mode on its own, with a response time of 30ms

typical (burst length dependent). The device will go back to

LP mode again if SYNC/LP is held high, or after another LP

pulse is received.

The response time setting is determined by option resistors

SL_1 and SL_0; see Table 1.5. Slower response times result

in lower power drain.

The SYNC/LP pulse should be >150µs in duration.

If the SYNC/LP pin is held high permanently, the device will

go into normal mode during a key touch, and return to

low-current mode when the detection ceases.

If the SYNC/LP pin is held low constantly, the device will

remain in normal mode (25ms typical response time)

continuously.

7 QT1080 R11.06/0806

2.7 AKS Function Pins

The QT1080 features an adjacent key suppression (AKS)

function with two modes. Option resistors act to set this

feature according to Tables 1.2 and 1.6. AKS can also be

disabled, allowing any combination of keys to become active

at the same time. When operating, the modes are:

Global: AKS functions operates across all eight keys. This

means that only one key can be active at any one time.

Groups: AKS functions among two groups of four keys:

0-1-4-5 and 2-3-6-7. This means that up to two keys can

be active at any one time.

In Group mode, keys in one group have no AKS interaction

with keys in the other group.

Note that in Fast Detect mode, AKS can only be off.

2.8 MOD_0, MOD_1 Inputs

In full option mode, MOD_0 and MOD_1 resistors are used

to set the ‘Max On-Duration’ recalibration timeouts. If a key

becomes stuck on for a lengthy duration of time, this feature

will cause an automatic recalibration event of that specific

key only once the specified on-time has been exceeded.

Settings of 10s, 60s, and infinite are available.

The Max On-Duration feature operates on a key-by-key

basis; when one key is stuck on, its recalibration has no

effect on other keys.

The logic combination on the MOD option pins sets the

timeout delay (see Table 1.3).

Simplified mode MOD timing: In simplified mode, the max

on-duration is fixed at 60 seconds.

2.9 Fast Detect Mode

In many applications, it is desirable to sense touch at high

speed. Examples include scrolling ‘slider’ strips or ‘Off’

buttons. It is possible to place the device into a ‘Fast Detect’

mode that usually requires under 10ms to respond. This is

accomplished internally by setting the Detect Integrator to

only two counts, i.e. only two successive detections are

required to detect touch.

In LP mode, ‘Fast’ detection will not speed up the initial

delay (which could be up to 360ms nominal depending on

the option setting). However, once a key is detected the

device is forced back into normal speed mode. It will remain

in this faster mode until another LP pulse is received.

When used in a ‘slider’ application, it is normally desirable to

run the keys without AKS.

In both normal and ‘Fast’ modes, the time required to

process a key release is the same. It takes six sequential

confirmations of non-detection to turn a key off.

Fast Detect mode can be enabled as shown in Tables 1.2

and 1.6.

2.10 Simplified Mode

A simplified operating mode which does not require the

majority of option resistors is available. This mode is set by

connecting a resistor labelled SMR between pins SNS6K

and SNS7 (see Figure 1.2).

In this mode there is only one option possible - AKS enable

or disable. When AKS is disabled, Fast Detect mode is

enabled; when AKS is enabled, Fast Detect mode is off.

AKS in this mode is Global only (i.e. operates across all

functioning keys).

The other option features are fixed as follows:

OUT_n, DETECT Pins: Push-pull, active high, direct

outputs

SYNC/LP Function: LP mode, ~200ms response time

Max On-Duration: 60 seconds

See Tables 1.6 and 1.7.

2.11 Unused Keys

Unused keys should be disabled by removing the

corresponding Cs, Rs, and Rsns components and

connecting SNS pins as shown in the ‘Unused’ column of

Table 1.1. Unused keys are ignored and do not factor into

the AKS function (Section 2.7).

3 Design Notes

3.1 Oscillator Frequency

The QT1080’s internal oscillator runs from an external

resistor network connected to the OSC and SS pins as

shown in Figures 1.1 and 1.2 to achieve spread spectrum

operation. If spread spectrum mode is not required, the OSC

pin should be connected to Vdd with an 18KΩ 1% resistor.

Under different Vdd voltage conditions the resistor network

(or the solitary 18KΩ resistor) might require minor

adjustment to obtain the specified burst center frequency.

The network should be adjusted slightly so that the positive

pulses on any key are approximately 2µs wide in the ‘solitary

18KΩ resistor’ mode, or 2.15µs wide at the beginning of a

burst with the recommended spread-spectrum circuit (see

next section).

In practice, the pulse width has little effect on circuit

performance if it varies in the range from 1.5µs to 2.5µs. The

only effects will be seen in non-LP mode, as proportional

variations in Max On-Duration times and response times.

3.2 Spread-spectrum Circuit

The QT1080 offers the ability to spectrally spread its

frequency of operation to heavily reduce susceptibility to

external noise sources and to limit RF emissions. The SS pin

is used to modulate an external passive RC network that

modulates the OSC pin. OSC is the main oscillator current

input. The circuit is shown in both Figures 1.1 and 1.2.

The resistors Rb1 and Rb2 should be changed depending

on Vdd. As shown in Figures 1.1 and 1.2, two sets of values

are recommended for these resistors depending on Vdd.

The power curves in Section 4.6 also show the effect of

these resistors.

The circuit can be eliminated, if it is not desired, by using an

18KΩ resistor from OSC to Vdd to drive the oscillator, and

connecting SS to Vss with a 100KΩ resistor. This mode

consumes significantly less current than spread spectrum

mode.

The spread-spectrum RC network might need to be modified

slightly if the burst lengths are particularly long. Vdd

variations can shift the center frequency and spread slightly.

8 QT1080 R11.06/0806

The sawtooth waveform observed on SS should reach a

crest height as follows:

Vdd >= 3.6V:17% of Vdd

Vdd < 3.6V: 20% of Vdd

The 100nF capacitor connected to SS (Figures 1.1 and 1.2)

should be adjusted so that the waveform approximates the

above amplitude, ±10%, during normal operation in the

target circuit. If this is done, the circuit will give a spectral

modulation of 12-15%.

3.3 Cs Sample Capacitors - Sensitivity

The Cs sample capacitors accumulate the charge from the

key electrodes and determine sensitivity. Higher values of

Cs make the corresponding sensing channel more sensitive.

The values of Cs can differ for each channel, permitting

differences in sensitivity from key to key or to balance

unequal sensitivities. Unequal sensitivities can occur due to

key size and placement differences and stray wiring

capacitances. More stray capacitance on a sense trace will

desensitize the corresponding key; increasing the Cs for that

key will compensate for the loss of sensitivity.

The Cs capacitors can be virtually any plastic film or low to

medium-K ceramic capacitor. The normal Cs range is 2.2nF

to 50nF depending on the sensitivity required; larger values

of Cs require better quality to ensure reliable sensing. In

certain circumstances the normal Cs range may be

exceeded, hence the different values in Section 4.2.

Acceptable capacitor types for most uses include PPS film,

polypropylene film, and NP0 and X7R ceramics. Lower

grades than X7R are not advised.

The required values of Cs can be noticeably affected by the

presence and connection of the option resistors (see

Section 2.2).

3.4 Power Supply

The power supply can range from 2.8 to 5.0 volts. If this

fluctuates slowly with temperature, the device will track and

compensate for these changes automatically with only minor

changes in sensitivity. If the supply voltage drifts or shifts

quickly, the drift compensation mechanism will not be able to

keep up, causing sensitivity anomalies or false detections.

The power supply should be locally regulated, using a

three-terminal device, to between 2.8V and 5.0V. If the

supply is shared with another electronic system, care should

be taken to ensure that the supply is free of digital spikes,

sags and surges which can cause adverse effects.

For proper operation a 0.1µF or greater bypass capacitor

must be used between Vdd and Vss; the bypass capacitor

should be routed with very short tracks to the device’s Vss

and Vdd pins.

3.5 PCB Layout and Construction

Refer to Quantum application note AN-KD02 for information

related to layout and construction matters.

9 QT1080 R11.06/0806

4 Specifications

4.1 Absolute Maximum Specifications

Operating temperature, Ta.............................................................................................. -40 ~ +85ºC

Storage temp, Ts................................................................................................... -50ºC ~ +125ºC

Vdd...................................................................................................................-0.3 ~ +6.0V

Max continuous pin current, any control or drive pin............................................................................ ±20mA

Short circuit duration to ground or Vdd, any pin.................................................................................infinite

Voltage forced onto any pin..................................................................................-0.3V ~ (Vdd + 0.3) Volts

4.2 Recommended Operating Conditions

Operating temperature, Ta.............................................................................................. -40 ~ +85ºC

...................................................................................................................+2.8 ~ +5.0V

Short-term supply ripple+noise...............................................................................................±5mV/s

Long-term supply stability...................................................................................................±100mV

Cs range............................................................................................................ 2.2nF ~ 100nF

Cx range................................................................................................................. 0 ~ 50pF

4.3 AC Specifications

Vdd = 5.0, Ta = recommended, Cx = 5pF, Cs = 4.7nF; circuit of Figure 1.1

End of touchms25Release time - all modesTdr

200ms LP settingms200Response time - LP modeTdl

ms25Response time - Normal modeTdn

ms10Response time - Fast modeTdf

Both bursts togetherms3.4Burst durationTbd

ms350Start-up time from cold startTsu

µs2Sample pulse durationTpc

Total deviation%15Burst modulation, percentFm

kHz132Burst center frequencyFc

ms150Recalibration timeTrc

NotesUnitsMaxTypMinDescriptionParameter

4.4 DC Specifications

Vdd = 5.0, Ta = recommended, Cx = 5pF, Cs = 4.7nF; circuit of Figure 1.1 unless noted

bits8Acquisition resolutionA

µA±1Input leakage currentI

2.5mA sourceVVdd-0.5High output voltageV

7mA sinkV0.5Low output voltageV

V3.5High input logic levelV

V0.7Low input logic levelV

Required for start-up, w/o external reset

circuit

V/s100Average supply turn-on slopeV

DDS

@ Vdd = 3.0; 360ms LP modeµA45Average supply current, LP mode*I

DDL

@ Vdd = 5.0

@ Vdd = 4.0

@ Vdd = 3.6

@ Vdd = 3.3

@ Vdd = 3.0

@ Vdd = 2.8

mA84.5

2.7

2.2

1.8

1.5

1.3

Average supply current,

normal mode*

DDN

NotesUnitsMaxTypMinDescriptionParameter

*No spread spectrum circuit; Rosc = 18KΩ

ΩΩ

Ω

4.5 Signal Processing

Vdd = 5.0, Ta = recommended, Cx = 5pF, Cs = 4.7nF

Towards decreasing Cx loadms/level500Anti-drift compensation rate

Towards increasing Cx loadms/level2,000Normal drift compensation rate

Option pin selectedsecs10, 60, ∞Max On-Duration

Must be consecutive or detection failssamples2Detect Integrator filter, ‘fast’ mode

Must be consecutive or detection failssamples6Detect Integrator filter, normal mode

Time to recalibrate if Cx load has exceeded anti-detection thresholdsecs2Anti-detection recalibration delay

Threshold for decrease of Cx loadcounts6Anti-detection threshold

counts2Detection hysteresis

Threshold for increase in Cx loadcounts10Detection threshold

NotesUnitsValueDescription

10 QT1080 R11.06/0806

4.6 Idd Curves (Average)

Cx = 5pF, Cs = 4.7nF, Ta = 20

C, Spread spectrum circuit of Fig. 1.1.

QT1080 Idd (360ms response) µA

100

150

200

250

300

2.533.544.555.5

Vdd(V)

Idd(µA)

Rb1=15K

Rb2=27K

Rb1=12K

Rb2=22K

QT1080 Idd (200ms response) µA

100

200

300

400

2.533.544.555.5

Vdd(V)

Idd(µA)

Rb1=15K

Rb2=27K

Rb1=12K

Rb2=22K

QT1080 Idd (110ms response) µA

100

200

300

400

500

2.533.544.555.5

Vdd(V)

Idd(µA)

Rb1=15K

Rb2=27K

Rb1=12K

Rb2=22K

QT1080 Idd (normal mode) mA

0.0

1.0

2.0

3.0

4.0

5.0

2.5 3 3.5 4 4.5 5 5.5

Vdd(V)

Idd(mA)

Rb1=15K

Rb2=27K

Rb1=12K

Rb2=22K

Cx = 5pF, Cs = 4.7nF, Ta = 20

C, Rosc = 18KΩ; no spread spectrum circuit

QT1080 Idd (360ms response) µA

100

125

2.533.544.555.5

Vdd(V)

Idd(µA)

QT1080 Idd (200ms response) µA

100

150

200

250

2.5 3 3.5 4 4.5 5 5.5

Vdd(V)

Idd(µA)

QT1080 Idd (110ms response) µA

100

200

300

400

2.5 3 3.5 4 4.5 5 5.5

Vdd(V)

Idd(µA)

QT1080 Idd (normal mode) mA

0.0

1.0

2.0

3.0

4.0

5.0

2.5 3 3.5 4 4.5 5 5.5

Vdd(V)

Idd(mA)

11 QT1080 R11.06/0806

4.7 LP Mode Typical Response Times

Response Tim e vs Vdd - 360m s Set t i ng

290

310

330

350

370

390

410

430

2.5 3 3.5 4 4.5 5 5.5

Vdd

Actual Response Time, ms

Response Tim e vs Vdd - 200m s Set t i ng

160

170

180

190

200

210

220

230

240

2.5 3 3.5 4 4.5 5 5.5

Vdd

Actual Response Time, ms

Response Tim e vs Vdd - 110m s Set t i ng

100

105

110

115

120

125

130

2.5 3 3.5 4 4.5 5 5.5

Vdd

Actual Response Time, ms

12 QT1080 R11.06/0806

4.8 Mechanical - 32-QFN Package

Symbol Minimum Nominal Maximum

A 0.70 - 0.95

A1 0.00 0.02 0.05

b0.180.250.32

C - 0.20 REF -

D4.905.005.10

D2 3.05 - 3.65

E4.905.005.10

E2 3.05 - 3.65

e-0.50-

L0.300.400.50

y0.00-0.075

Dimensions In Millimeters

Note that there is no functional requirement for the large pad on the underside of this package to be

soldered. If the final application requires this area to be soldered for mechanical reasons, the pad to

which it is soldered must be isolated and contained under the footprint only.

4.9 Mechanical - 48-SSOP Package

EFa

All dimensions in millimeters

0.890.3016.180.252.510.307.5910.67

Max 0

0.640.1015.570.10

0.635

Typ

2.160.207.3910.03Min aJHGFEDCBA

13 QT1080 R11.06/0806

4.10 Part Marking

32-QFN 48-SSOP

14 QT1080 R11.06/0806

YYWWG

run nr. 'YY' = Year of manufacture:

'WW' = Week of manufacture:

'G' = Gre en/RoHS Com pl iant.

Pin 1

Identification

QRG

Revision

Code

QT1080

©QRG 11

QRG Part

No.

'run nr.' = 6 Digit Run Number

QT1080-IS48G

QProx

DIMPLE

Pin 1

Pin 48

NOTES:

15 QT1080 R11.06/0806

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This devic e is covered under one or more United S tates and corresponding i nternational patent s. QRG patent numbers can be found online

at www.qprox.com. Numerous further patents are pending, which may apply to this device or the applications thereof.

The speci fic ati ons s et out in thi s doc um ent are s ubject to c hange without not ic e. Al l product s sold and s ervic es s upplied by QRG are subjec t

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acknowledgem ent. QRG tradem arks can be found online at www.q pr ox. c om . Q RG produc ts are not suitabl e for medi cal (inc luding lifes aving

equipment ), saf ety or miss ion crit ical applicat ions or other si milar purpos es. E xcept as expressly set out in QRG's Term s and Conditions , no

licenses to patents or other intellectual property of QRG (express or implied) are granted by QRG in connection with the sale of QRG

products or provision of QRG services. QRG will not be liable for customer product design and custom ers are entirely responsible for their

products and applications which incorporate QRG's products.

Development Team: John Dubery, Alan Bowens, Matthew Trend