Data sheet AS1374 200mA, Ultra-Low-Noise, High-PSRR, Dual Low Dropout Regulators 1 General Description 2 Key Features The AS1374 is a ultra-low-noise, low-dropout linear regulator with two seperated outputs. Specifically designed to deliver 200mA continuous output current at each output pin. The LDOs can achieve a low 120mV dropout for 200mA load current and are designed and optimized to work with low-cost, small-capacitance ceramic capacitors. Preset Output Voltages: 1.2 to 3.6V (in 50mV steps) An integrated P-channel MOSFET pass transistor allows the devices to maintain extremely low quiescent current (30A). Stable with 1F Ceramic Capacitor for any Load The AS1374 uses an advanced architecture to achieve ultra-low output voltage noise of 20VRMS and a power-supply rejection-ratio of better than 85dB (@ 1kHz). Guaranteed 200mA Output Two active-High enable pins allows to switch on or off each output independently from each other. Extremely-Low Quiescent Current: 30A Output Noise: 20VRMS @ 100Hz to 100kHz Power-Supply Rejection Ratio: 85dB @ 1kHz Low Dropout: 120mV @ 200mA Load Pull-Down Option in Shutdown (factory set) Excellent Load/Line Transient The AS1374 requires only 1F output capacitor for stability at any load. Overcurrent and Thermal Protection The device is available in a 6-bump WLP package. 6-bump WLP Package 3 Applications The devices are ideal for mobile phones, wireless phones, PDAs, handheld computers, mobile phone base stations, Bluetooth portable radios and accessories, wireless LANs, digital cameras, personal audio devices, and any other portable, battery-powered application. Figure 1. AS1374 - Typical Application Circuit Input 2V to 5.5V Output1 1.2V to 3.6V 3 2 OUT 1 VDD CIN 1F COUT1 1F 6 EN 1 AS1374 Output2 1.2V to 3.6V 1 OUT 2 COUT2 1F 4 EN 2 www.austriamicrosystems.com/LDOs/AS1374 5 GND Revision 1.05 1 - 14 AS1374 Datasheet - P i n o u t 4 Pinout Pin Assignments Figure 2. Pin Assignments (Top View) 1 2 3 AS1374 4 5 6 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name 1 OUT 2 2 VDD 3 OUT 1 Regulated Output Voltage 1. Bypass this pin with a capacitor to GND. See Capacitor Selection and Regulator Stability on page 11 for more details. 4 EN 2 Enable 2. Pull this pin to logic low to disable Regulated Output 2 voltage. 5 GND Ground 6 EN 1 Enable 1. Pull this pin to logic low to disable Regulated Output 1 voltage. www.austriamicrosystems.com/LDOs/AS1374 Description Regulated Output Voltage 2. Bypass this pin with a capacitor to GND. See Capacitor Selection and Regulator Stability on page 11 for more details. Input Supply Revision 1.05 2 - 14 AS1374 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Min Max Units Comments Electrical Parameters VDD to GND -0.3 7 V All other pins to GND -0.3 VDD + 0.3 V Output Short-Circuit Duration Input Current (latch-up immunity) Infinite -100 100 mA Norm: JEDEC 78 kV Norm: MIL 883 E method 3015 on PCB Electrostatic Discharge Electrostatic Discharge HBM 2 Temperature Ranges and Storage Conditions Thermal Resistance JA 201.7 C/W Junction Temperature +125 C +125 C Storage Temperature Range -55 Package Body Temperature Humidity non-condensing Moisture Sensitive Level www.austriamicrosystems.com/LDOs/AS1374 5 +260 C 85 % 1 The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/ JEDEC J-STD-020"Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices". Represents a max. floor life time of unlimited Revision 1.05 3 - 14 AS1374 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VIN = VOUT + 0.5V, VOUT = 2.85V, CIN = COUT = 1F, Typ values are at TAMB = +25C (unless otherwise specified). All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Table 3. Electrical Characteristics Symbol Parameter Max Unit TAMB Operating Temperature Range -40 +85 C VIN Input Voltage Range 2 5.5 V IOUT = 1mA, TAMB = +25C -1 +1 IOUT = 100A to 200mA, TAMB = +25C -1.5 +1.5 IOUT = 100A to 200mA -2.5 +2.5 each channel 200 VOUT Condition Output Voltage Accuracy IOUT Maximum Output Current IGND Ground Current ILIMIT Current Limit Dropout Voltage IQ Min one channel on, IOUT = 50A % mA 25 one channel on, IOUT = 200mA 50 A 30 55 A 300 400 mA 2.5V VOUT < 3V, IOUT = 100mA 60 120 mV 90 OUT = short 1 Typ 210 both channels on, IOUT = 0.05mA 30 Quiescent Current both channels on, VIN = VOUTNOM - 0.1V, IOUT = 0mA 50 A VLNR Line Regulation VIN = (VOUT +0.5V) to 5.5V, IOUT = 1mA 0.02 %/V VLDR Load Regulation IOUT = 1 to 200mA 0.0005 %/mA ISHDN Shutdown Current OUT 1 and OUT 2 disable 0.01 f = 1kHz, IOUT = 10mA 85 PSRR Ripple Rejection Output Noise Voltage (RMS) 2 A f = 10kHz, IOUT = 10mA 65 f = 100kHz, IOUT = 10mA 50 f = 100Hz to 100kHz, ILOAD = 20mA 20 V 0.01 A dB Enable Enable Input Bias Current Enable Exit Delay 2 both channels initially off 150 one channel initially off 200 Enable Logic Low Level s 0.4 Enable Logic High Level 1.4 V V Thermal Protection TSHDN Thermal Shutdown Temperature 160 C TSHDN Thermal Shutdown Hysteresis 15 C 1. Dropout is defined as VIN - VOUT when VOUT is 100mV below the value of VOUT for VIN = VOUT + 0.5V. 2. Time needed for VOUT to reach 90% of final value. www.austriamicrosystems.com/LDOs/AS1374 Revision 1.05 4 - 14 AS1374 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics VIN = VOUT + 0.5V, VOUT = 2.85V, CIN = COUT = 1F, TAMB = 25C (unless otherwise specified). Figure 4. Output Voltage vs. Input Voltage 2.88 2.88 2.87 2.87 Output Voltage (V) Output Voltage (V) Figure 3. Output Voltage vs. Temperature 2.86 2.85 2.84 2.86 2.85 2.84 Iload = 1mA CH1 2.83 Iload = 10mA 2.83 Iload = 100mA CH2 Iload = 200mA 2.82 -45 -30 -15 0 15 30 45 60 75 2.82 3.35 90 3.85 Temperature (C) 4.35 4.85 5.35 Input Voltage (V) Figure 5. Output Voltage vs. Load Current Figure 6. Output Voltage vs. Input Voltage - Dropout 2.88 2.86 -40C 2.87 +25C 2.84 2.86 Output Voltage (V) Output voltage (V) +85C 2.85 2.84 2.83 2.82 2.82 2.8 2.78 2.76 Iload = 100mA 2.74 2.81 2.8 0 25 50 75 2.72 2.75 100 125 150 175 200 Load Current (mA) 2.8 2.85 2.9 2.95 3 3.05 Input Voltage (V) Figure 7. Dropout Voltage vs. Load Current Figure 8. PSRR vs. Frequency 100 150 90 125 80 100 PSRR (dB) Dropout Voltage (V) Iload = 200mA 75 50 60 50 40 -40C 25 70 +25C 30 +85C 0 25 50 75 100 125 150 175 200 20 100 Load Current (mA) www.austriamicrosystems.com/LDOs/AS1374 1000 10000 100000 Frequency (Hz) Revision 1.05 5 - 14 AS1374 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 9. Ground Pin Current vs. Load Current Figure 10. Ground Pin Current vs. Temperature 33 30 Ground Pin Current (A) Ground Pin Current (A) 32 31 30 29 28 27 26 25 -40C 29 28 27 26 +25C 24 +85C 23 0 25 50 75 100 125 150 175 25 -45 -30 -15 200 Load Current (mA) Figure 11. Ground Pin Current vs. Input Voltage; on, no Load one Channel 15 30 45 Figure 12. Ground Pin Current vs. Input Voltage; on, ILOAD = 200mA 60 60 50 50 40 30 20 -40C 10 Ground Pin Current (A) Ground Pin Current (A) 0 +25C 2 3 4 20 -40C 10 0 3.35 5 +25C 3.85 90 90 80 70 60 50 40 30 20 -40C +25C 10 +85C 0 4 5 Ground Pin Current (A) Ground Pin Current (A) 100 3 5.35 80 70 60 50 40 30 20 -40C +25C 10 0 3.35 Input Voltage (V) www.austriamicrosystems.com/LDOs/AS1374 4.85 Figure 14. Ground Pin Current vs. Input Voltage; both Channels on, ILOAD = 200mA 100 2 4.35 Input Voltage (V) Figure 13. Ground Pin Current vs. Input Voltage; both Channels on, no Load 1 one Channel 30 Input Voltage (V) 0 90 +85C 0 1 75 40 +85C 0 60 Temperature (C) +85C 3.85 4.35 4.85 5.35 Input Voltage (V) Revision 1.05 6 - 14 AS1374 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 15. Shutdown Current vs. Input Voltage Figure 16. Load Regulation vs. Temperature 60 0 +25C 50 Load Regulation (% / mA) Shutdown Current (nA) -40C +85C 40 30 20 10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 -0.0002 -0.0004 -0.0006 -0.0008 0 15 30 45 0.15 0.15 0.1 0.05 0 -0.05 -40C Line Regulation (% / V) 0.2 0.05 0 -0.05 Iload = 1mA -0.1 Iload = 10mA -0.2 -0.2 -45 -30 -15 100 125 150 175 200 Load Current (mA) 15 30 45 60 75 90 Figure 20. Load Transient Response near Dropout, IOUT = 200mA IOUT1 IOUT1 100mA/Div VOUT2 10mV/Div VOUT1 10mV/Div Figure 19. Load Transient Response, Crosstalk, between CH1 and CH2, IOUT = 200mA VOUT1 0 Temperature (C) 20mV/Div 75 Iload = 200mA 20s/Div www.austriamicrosystems.com/LDOs/AS1374 100mA/Div 50 Iload = 100mA -0.15 +85C 25 90 0.1 +25C 0 75 Figure 18. Line Regulation vs. Temperature 0.2 -0.15 60 Temperature (C) Figure 17. Line Regulation vs. Load Current Line Regulation (% / V) CH2 -0.0012 -45 -30 -15 5.5 Input Voltage (V) -0.1 CH1 -0.001 20s/Div Revision 1.05 7 - 14 AS1374 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s EN1 IOUT1 50mA/Div 1V/Div VOUT1 500mV/Div VOUT1 VIN 2V/Div Figure 22. Shutdown 10mV/Div Figure 21. Line Transient Response 100s/Div 100s/Div 1V/Div 100mA/Div VOUT1 IIN EN1 1V/Div EN1 VOUT1 IIN 100mA/Div 20s/Div 20s/Div www.austriamicrosystems.com/LDOs/AS1374 2V/Div Figure 24. Startup of CH1 when CH2 is On 2V/Div Figure 23. Startup of CH1 when CH2 is Off Revision 1.05 8 - 14 AS1374 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description The AS1374 is an ultra-low-noise, low-dropout, low-quiescent current linear-regulator with two seperated outputs specifically designed for spacelimited applications. These device can supply loads up to 200mA. As shown in Figure 25, the AS1374 consist of an integrated bandgap core, error amplifier, P-channel MOSFET pass transistor, and internal feedback voltage-divider. The output voltage is fed back through an internal resistor voltage-divider connected to pin OUT. Additional blocks include a current limiter, thermal sensor, and enable logic. Internal Voltage Reference The bandgap reference is connected to the error amplifier's inverting input. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the output. Internal P-Channel Pass Transistor The AS1374 feature a 0.6 (typ) P-channel MOSFET pass transistor, which provides several advantages over similar designs using a PNP pass transistor, including prolonged battery life. The P-channel MOSFET does not require a base driver, thus quiescent current is dramatically reduced. The AS1374 do not exhibit problems associated with typical PNP-based LDOs, and consume only 30A of quiescent current in light load and 50A in dropout (see Typical Operating Characteristics on page 5). Output Voltage The AS1374 deliver preset output voltages from 1.2V to 3.6V, in 50mV increments (see Ordering Information on page 13). Enable The AS1374 feature an actice high enable mode to shutdown each output indepentend. Driving EN 1 low disables Output 1, driving EN 2 low disables Output 2. The disabled Output enters a high-impedance state. Figure 25. AS1374 - Block Diagram - EN 1 + Enable Logic CH1 OUT 1 Overcurrent Protection CH1 VDD EN 2 Thermal Protection Common Logic Trimmable Reference Bandgap Enable Logic CH2 GND Overcurrent Protection CH2 + AS1374 OUT 2 - Current Limit The AS1374 include a current limiting circuitry to monitor and control the P-channel MOSFET pass transistor's gate voltage, thus limiting the device output current to 300mA. Note: See Table 3 on page 4 for the recommended min and max current limits. The output can be shorted to ground indefinitely without causing damage to the device. www.austriamicrosystems.com/LDOs/AS1374 Revision 1.05 9 - 14 AS1374 Datasheet - D e t a i l e d D e s c r i p t i o n Thermal Protection Integrated thermal protection circuitry limits total power dissipation in the AS1374. When the junction temperature (TJ) exceeds +160C, the thermal sensor signals the shutdown logic, turning off the P-channel MOSFET pass transistor and allowing the device to cool down. The thermal sensor turns the pass transistor on again after the device's junction temperature drops by 15C, resulting in a pulsed output during continuous thermal-overload conditions. Note: Thermal protection is designed to protect the devices in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature rating of +150C. Operating Region and Power Dissipation The AS1374 maximum power dissipation is dependant on the thermal resistance of the case and PCB, the temperature difference between the die junction and TAMB, and airflow rate. Power dissipation across the device is calculated as: PD = IOUT (VIN - VOUT) (EQ 1) PDMAX = (TJ - TAMB)/JA (EQ 2) The maximum power dissipation is calculated: Where: TJ - TAMB is the temperature difference between the AS1374 die junction and the surrounding air; JA is the thermal resistance through the circuit board, copper traces, and other materials to the surrounding. www.austriamicrosystems.com/LDOs/AS1374 Revision 1.05 10 - 14 AS1374 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9 Application Information Capacitor Selection and Regulator Stability For normal operation, use a 1F capacitor at pin VDD and a 1F capacitor at pin OUT. Larger input capacitor values and lower ESR provide better noise rejection and line-transient response. Reduce output noise and improve load-transient response, stability, and power-supply rejection by using large output capacitors. Note: Some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such as Z5U and Y5V, it may be necessary to use a 2.2F or larger output capacitor to ensure stability at temperatures below -10C. With X7R or X5R dielectrics, 1F is sufficient at all operating temperatures. Noise, PSRR, and Transient Response The AS1374 is designed to deliver ultra-low noise and high PSRR, as well as low dropout and low quiescent currents in battery-powered systems. The power-supply rejection is 85dB at 1kHz and 50dB at 100kHz. (see Figure 8 on page 5). When operating from sources other than batteries, improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output capacitors, and through passive filtering techniques. The Figure 19, Figure 20 on page 7 and Figure 21 on page 8 show the AS1374 Load- and Line- Transient Responses. Dropout Voltage The AS1374 minimum dropout voltage determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage. Since the AS1374 use a P-channel MOSFET pass transistor, the dropout voltage is a function of drain-to-source on-resistance (RDS(ON)) multiplied by ILOAD (see Figure 7 on page 5). www.austriamicrosystems.com/LDOs/AS1374 Revision 1.05 11 - 14 AS1374 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 10 Package Drawings and Markings Figure 26. 6-bump WLP Marking Package Code: XXXX - encoded Datecode Figure 27. 6-bump WLP Package www.austriamicrosystems.com/LDOs/AS1374 Revision 1.05 12 - 14 AS1374 Datasheet - O r d e r i n g I n f o r m a t i o n 11 Ordering Information The devices are available as the standard products shown in Table 4. Table 4. Ordering Information Ordering Code Marking Output Voltage 1 Output Voltage 2 Delivery Form Package AS1374-BWLT-285 ASSH 2.85V 2.85V Tape and Reel 6-bump WLP AS1374-BWLT1833 ASSJ 1.8V 3.3V Tape and Reel 6-bump WLP AS1374-BWLT1818 ASSP 1.8V 1.8V Tape and Reel 6-bump WLP AS1374-BWLT1218 ASSK 1.2V 1.8V Tape and Reel 6-bump WLP AS1374-BWLT1214 ASSY 1.2V 1.4V Tape and Reel 6-bump WLP AS1374-BWLT18285 ASSZ 1.8V 2.85V Tape and Reel 6-bump WLP AS1374-BWLT1212 ASSW 1.2V 1.2V Tape and Reel 6-bump WLP AS1374-BWLT1827 ASTB 1.8V 2.7V Tape and Reel 6-bump WLP 1 ASTF 1.5V 3.3V Tape and Reel 6-bump WLP 1 ASTG 1.8V 2.0V Tape and Reel 6-bump WLP 1 ASTH 1.8V 2.1V Tape and Reel 6-bump WLP 1 ASTI 2.5V 3.3V Tape and Reel 6-bump WLP ____ tbd tbd Tape and Reel 6-bump WLP AS1374-BWLT1533 AS1374-BWLT1820 AS1374-BWLT1821 AS1374-BWLT2533 AS1374-BWLT 2 1. on request 2. Non-standard devices from 1.2V to 3.6V are available in 50mV steps. For more information and inquiries contact http://www.austriamicrosystems.com/contact Note: All products are RoHS compliant and austriamicrosystems green. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect Technical Support is found at http://www.austriamicrosystems.com/Technical-Support For further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.austriamicrosystems.com/distributor www.austriamicrosystems.com/LDOs/AS1374 Revision 1.05 13 - 14 AS1374 Datasheet Copyrights Copyright (c) 1997-2011, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered (R). All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. 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No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com/LDOs/AS1374 Revision 1.05 14 - 14