LT3012
1
3012fd
FEATURES
APPLICATIONS
DESCRIPTION
250mA, 4V to 80V
Low Dropout
Micropower Linear Regulator
The LT
®
3012 is a high voltage, micropower low dropout
linear regulator. The device is capable of supplying 250mA of
output current with a dropout voltage of 400mV. Designed
for use in battery-powered or high voltage systems, the low
quiescent current (40μA operating and 1μA in shutdown)
makes the LT3012 an ideal choice. Quiescent current is
also well controlled in dropout.
Other features of the LT3012 include the ability to operate
with very small output capacitors. The regulator is stable
with only 3.3μF on the output while most older devices
require between 10μF and 100μF for stability. Small ce-
ramic capacitors can be used without any need for series
resistance (ESR) as is common with other regulators.
Internal protection circuitry includes reverse-battery
protection, current limiting, thermal limiting and reverse
current protection.
The device is available with an adjustable output with a
1.24V reference voltage. The LT3012 regulator is available
in the 16-lead TSSOP and 12 pin low profi le (0.75mm)
(4mm × 3mm) DFN packages with an exposed pad for
enhanced thermal handling capability.
Dropout Voltage
n Wide Input Voltage Range: 4V to 80V
n Low Quiescent Current: 40μA
n Low Dropout Voltage: 400mV
n Output Current: 250mA
n No Protection Diodes Needed
n Adjustable Output from 1.24V to 60V
n 1μA Quiescent Current in Shutdown
n Stable with 3.3μF Output Capacitor
n Stable with Aluminum, Tantalum or Ceramic
Capacitors
n Reverse-Battery Protection
n No Reverse Current Flow from Output to Input
n Thermal Limiting
n Thermally Enhanced 16-Lead TSSOP and
12-Pin (4mm × 3mm) DFN Packages
n Low Current High Voltage Regulators
n Regulator for Battery-Powered Systems
n Telecom Applications
n Automotive Applications
5V Supply with Shutdown
TYPICAL APPLICATION
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
1μF
VIN
5.4V TO
80V
3012 TA01
VOUT
5V
250mA
VSHDN
<0.3V
>2.0V
OUTPUT
OFF
ON
3.3μF
750k
249k
IN
LT3012
SHDN
OUT
ADJ
GND
OUTPUT CURRENT (mA)
0
250
300
400
350
200
3012 TA02
200
150
50 100 150 250
100
50
0
DROPOUT VOLTAGE (mV)
LT3012
2
3012fd
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3012EDE#PBF LT3012EDE#TRPBF 3012 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C
LT3012EFE#PBF LT3012EFE#TRPBF 3012EFE 16-Lead Plastic TSSOP –40°C to 125°C
LT3012HFE#PBF LT3012HFE#TRPBF 3012HFE 16-Lead Plastic TSSOP –40°C to 140°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3012EDE LT3012EDE#TR 3012 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C
LT3012EFE LT3012EFE#TR 3012EFE 16-Lead Plastic TSSOP –40°C to 125°C
LT3012HFE LT3012HFE#TR 3012HFE 16-Lead Plastic TSSOP –40°C to 140°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
12
11
10
9
8
7
13
1
2
3
4
5
6
NC
IN
IN
NC
SHDN
NC
NC
OUT
OUT
ADJ
GND
NC
TOP VIEW
DE PACKAGE
12-LEAD (4mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 40°C/W, θJC = 16°C/W
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
FE PACKAGE
16-LEAD PLASTIC TSSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
17
GND
NC
OUT
OUT
ADJ
GND
NC
GND
GND
NC
IN
IN
NC
SHDN
NC
GND
TJMAX = 140°C, θJA = 40°C/W, θJC = 16°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
IN Pin Voltage .........................................................±80V
OUT Pin Voltage ......................................................±60V
IN to OUT Differential Voltage .................................±80V
ADJ Pin Voltage ........................................................±7V
SHDN Pin Input Voltage ..........................................±80V
Output Short-Circuit Duration .......................... Indefi nite
Storage Temperature Range
TSSOP Package .................................–65°C to 150°C
DFN Package ......................................–65°C to 125°C
Operating Junction Temperature Range
(Notes 3, 10, 11)
LT3012E ............................................. –40°C to 125°C
LT3012HFE .........................................–40°C to 140°C
Lead Temperature (FE16 Soldering, 10 sec) ......... 300°C
LT3012
3
3012fd
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage ILOAD = 250mA l4 4.75 V
ADJ Pin Voltage (Notes 2, 3) VIN = 4V, ILOAD = 1mA
4.75V < VIN < 80V, 1mA < ILOAD < 250mA l
1.225
1.2
1.24
1.24
1.255
1.28
V
V
Line Regulation ΔVIN = 4V to 80V, ILOAD = 1mA (Note 2) l0.1 5 mV
Load Regulation (Note 2) VIN = 4.75V, ΔILOAD = 1mA to 250mA
VIN = 4.75V, ΔILOAD = 1mA to 250mA l
712
25
mV
mV
Dropout Voltage
VIN = VOUT(NOMINAL) (Notes 4, 5)
ILOAD = 10mA
ILOAD = 10mA l
160 230
300
mV
mV
ILOAD = 50mA
ILOAD = 50mA l
250 340
420
mV
mV
ILOAD = 250mA
ILOAD = 250mA l
400 490
620
mV
mV
GND Pin Current
VIN = 4.75V (Notes 4, 6)
ILOAD = 0mA
ILOAD = 100mA
ILOAD = 250mA
l
l
40
3
10
100
18
μA
mA
mA
Output Voltage Noise COUT = 10μF, ILOAD = 250mA, BW = 10Hz to 100kHz 100 μVRMS
ADJ Pin Bias Current (Note 7) 30 100 nA
Shutdown Threshold VOUT = Off to On
VOUT = On to Off
l
l0.3
1.3
0.8
2V
V
SHDN Pin Current (Note 8) VSHDN = 0V
VSHDN = 6V
0.3
0.1
2
1
μA
μA
Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V 1 5 μA
Ripple Rejection VIN = 7V(Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 250mA 65 75 dB
Current Limit VIN = 7V, VOUT = 0V
VIN = 4.75V, ΔVOUT = –0.1V (Note 2) l250
400 mA
mA
Reverse Output Current (Note 9) VOUT = 1.24V, VIN < 1.24V (Note 2) 12 25 μA
The l
denotes the specifi cations which apply over the –40°C to 125°C operating temperature range, otherwise specifi cations are at TJ = 25°C.
(LT3012E)
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage ILOAD = 200mA l4 4.75 V
ADJ Pin Voltage (Notes 2, 3) VIN = 4V, ILOAD = 1mA
4.75V < VIN < 80V, 1mA < ILOAD < 200mA l
1.225
1.2
1.24
1.24
1.255
1.28
V
V
Line Regulation ΔVIN = 4V to 80V, ILOAD = 1mA (Note 2) l0.1 5 mV
Load Regulation (Note 2) VIN = 4.75V, ΔILOAD = 1mA to 200mA
VIN = 4.75V, ΔILOAD = 1mA to 200mA l
612
30
mV
mV
Dropout Voltage
VIN = VOUT(NOMINAL) (Notes 4, 5)
ILOAD = 10mA
ILOAD = 10mA l
160 230
320
mV
mV
ILOAD = 50mA
ILOAD = 50mA l
250 340
450
mV
mV
ILOAD = 200mA
ILOAD = 200mA l
360 490
630
mV
mV
GND Pin Current
VIN = 4.75V (Notes 4, 6)
ILOAD = 0mA
ILOAD = 100mA
ILOAD = 200mA
l
l
40
3
7
110
18
μA
mA
mA
The l
denotes the specifi cations which apply over the –40°C to 140°C operating temperature range, otherwise specifi cations are at TJ = 25°C.
(LT3012H)
LT3012
4
3012fd
PARAMETER CONDITIONS MIN TYP MAX UNITS
Output Voltage Noise COUT = 10μF, ILOAD = 200mA, BW = 10Hz to 100kHz 100 μVRMS
ADJ Pin Bias Current (Note 7) 30 100 nA
Shutdown Threshold VOUT = Off to On
VOUT = On to Off
l
l0.3
1.3
0.8
2V
V
SHDN Pin Current (Note 8) VSHDN = 0V
VSHDN = 6V
0.3
0.1
2
1
μA
μA
Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V 1 5 μA
Ripple Rejection VIN = 7V(Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 200mA 65 75 dB
Current Limit VIN = 7V, VOUT = 0V
VIN = 4.75V, ΔVOUT = –0.1V (Note 2) l200
400 mA
mA
Reverse Output Current (Note 9) VOUT = 1.24V, VIN < 1.24V (Note 2) 12 25 μA
ELECTRICAL CHARACTERISTICS
The l
denotes the specifi cations which apply over the –40°C to 140°C operating temperature range, otherwise specifi cations are at TJ = 25°C.
(LT3012H)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3012 is tested and specifi ed for these conditions with the
ADJ pin connected to the OUT pin.
Note 3: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specifi cation will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 4: To satisfy requirements for minimum input voltage, the LT3012
is tested and specifi ed for these conditions with an external resistor
divider (249k bottom, 649k top) for an output voltage of 4.5V. The external
resistor divider will add a 5μA DC load on the output.
Note 5: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specifi ed output current. In dropout, the
output voltage will be equal to (VIN – VDROPOUT).
Note 6: GND pin current is tested with VIN = 4.75V and a current source
load. This means the device is tested while operating close to its dropout
region. This is the worst-case GND pin current. The GND pin current will
decrease slightly at higher input voltages.
Note 7: ADJ pin bias current fl ows into the ADJ pin.
Note 8: SHDN pin current fl ows out of the SHDN pin.
Note 9: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current fl ows into the OUT
pin and out the GND pin.
Note 10: The LT3012E is guaranteed to meet performance specifi cations
from 0°C to 125°C operating junction temperature. Specifi cations over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LT3012H is tested to the LT3012H Electrical Characteristics table at
140°C operating junction temperature. High junction temperatures degrade
operating lifetimes. Operating lifetime is derated at junction temperatures
greater than 125°C.
Note 11: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C (LT3012E) or 140°C (LT3012H) when
overtemperature protection is active. Continuous operation above the
specifi ed maximum operating junction temperature may impair device
reliability.
LT3012
5
3012fd
TYPICAL PERFORMANCE CHARACTERISTICS
Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage
Quiescent Current ADJ Pin Voltage Quiescent Current
Quiescent Current GND Pin Current GND Pin Current
OUTPUT CURRENT (mA)
0
DROPOUT VOLTAGE (mV)
300
400
600
500
3012 G01
200
100
010050 200150 250
TJ = 125°C
TJ = 25°C
OUTPUT CURRENT (mA)
0
GUARANTEED DROPOUT VOLTAGE (mV)
200
400
600
100
300
500
100 200
3012 G02
250500 150
= TEST POINTS TJ ≤ 125°C
TJ ≤ 25°C
TEMPERATURE (°C)
–50
0
DROPOUT VOLTAGE (mV)
200
600
500
050 75
3012 G03
100
400
300
–25 25 100 150125
IL = 50mA
IL = 10mA
IL = 250mA
IL = 100mA
IL = 1mA
0
40
100
20
80
60
10
50
30
90
70
–50 0 50 75
–25 25 100 150125
TEMPERATURE (°C)
QUIESCENT CURRENT (μA)
3012 G04
VSHDN = VIN
VSHDN = GND
VIN = 6V
RL = ∞
IL = 0
TEMPERATURE (°C)
ADJ PIN VOLTAGE (V)
1.255
3012 G05
1.240
1.230
1.225
1.220
1.260
1.250
1.245
1.235
IL = 1mA
–50 0 50 75
–25 25 100 150125
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (μA)
40
60
80
8
3012 G06
20
10
30
50
70
021 43 67 9
510
TJ = 25°C
RL = ∞
VOUT = 1.24V
VSHDN = VIN
VSHDN = GND
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT(μA)
150
200
250
80
3012 G07
100
50
125
175
225
75
25
02010 4030 60 70
50
TJ = 25°C
RL = ∞
VOUT = 1.24V
VSHDN = VIN
VSHDN = GND
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
1.2
8
3012 G08
0.8
0.4
1.0
0.6
0.2
021 43 67 9
510
TJ = 25°C
*FOR VOUT = 1.24V
RL = 49.6Ω
IL = 25mA*
RL = 124Ω
IL = 10mA*
RL = 1.24k
IL = 1mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
6
8
10
8
3012 G09
4
2
5
7
9
3
1
021 43 67 9
510
TJ = 25°C, *FOR VOUT = 1.24V
RL = 4.96Ω
IL = 250mA*
RL = 12.4Ω
IL = 100mA*
RL = 24.8Ω, IL = 50mA*
LT3012
6
3012fd
TYPICAL PERFORMANCE CHARACTERISTICS
GND Pin Current vs ILOAD SHDN Pin Threshold SHDN Pin Current
SHDN Pin Current ADJ Pin Bias Current Current Limit
Current Limit Reverse Output Current Reverse Output Current
LOAD CURRENT (mA)
0
GND PIN CURRENT (mA)
6
8
10
3012 G10
4
2
5
7
9
3
1
010050 200150 250
VIN = 4.75V
TJ = 25°C
VOUT = 1.24V
TEMPERATURE (°C)
SHDN PIN THRESHOLD (V)
1.4
3012 G11
0.8
0.4
0.2
0
2.0
1.8
1.6
1.2
1.0
0.6
–50 0 50 75
–25 25 100 150125
OFF-TO-ON
ON-TO-OFF
SHDN PIN VOLTAGE (V)
0
SHDN PIN CURRENT (μA)
0.2
0.4
0.6
0.1
0.3
0.5
1.0 2.0
3012 G12
3.00.50 1.5 2.5
TJ = 25°C
CURRENT FLOWS
OUT OF SHDN PIN
TEMPERATURE (°C)
SHDN PIN CURRENT (μA)
3012 G13
0.4
0.2
0.1
0
0.6
0.5
0.3
–50 0 50 75
–25 25 100 150125
VIN = 6V
VSHDN = 0V
CURRENT FLOWS
OUT OF SHDN PIN
TEMPERATURE (°C)
ADJ PIN BIAS CURRENT (nA)
3012 G14
100
80
20
40
60
0
120
–50 0 50 75
–25 25 100 150125
INPUT VOLTAGE (V)
0
CURRENT LIMIT (mA)
600
800
1000
3012 G15
400
200
500
700
900
300
100
02010 4030 60 70
50 80
TJ = 25°C
TJ = 125°C
VOUT = 0V
TEMPERATURE (°C)
0
CURRENT LIMIT (mA)
3012 G16
600
400
200
500
700
300
100
–50 0 50 75
–25 25 100 150125
VIN = 7V
VOUT = 0V
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (μA)
120
160
200
8
3012 G17
80
40
100
140
180
60
20
021 43 67 9
510
TJ = 25°C
VIN = 0V
VOUT = VADJ
CURRENT FLOWS
INTO OUTPUT PIN
ADJ
PIN CLAMP
(SEE APPLICATIONS
INFORMATION)
TEMPERATURE (°C)
REVERSE OUTPUT CURRENT (μA)
3012 G18
–50 0 50 75
–25 25 100 150125
VIN = 0V
VOUT = VADJ = 1.24V
100
80
20
40
60
0
120
LT3012
7
3012fd
TYPICAL PERFORMANCE CHARACTERISTICS
Input Ripple Rejection Input Ripple Rejection Minimum Input Voltage
Output Noise Spectral Density
10Hz to 100kHz Output Noise Transient Response
Load Regulation
TEMPERATURE (°C)
60
RIPPLE REJECTION (dB)
68
92
80
84
88
3012 G19
64
76
72
–50 0 50 75
–25 25 100 150125
VIN = 4.75V + 0.5VP-P RIPPLE AT f = 120Hz
IL = 250mA
VOUT = 1.24V
TEMPERATURE (°C)
MINIMUM INPUT VOLTAGE (V)
4.0
3012 G21
2.0
1.0
0.5
0
5.0
3.5
4.5
3.0
2.5
1.5
–50 0 50 75
–25 25 100 150125
ILOAD = 250mA
FREQUENCY (Hz)
10
40
RIPPLE REJECTION (dB)
50
60
70
80
100 1k 10k 100k 1M
3012 G20
30
20
10
0
90
100 VIN = 4.75V + 50mVRMS RIPPLE
ILOAD = 250mA
COUT = 10μF
COUT = 3.3μF
TEMPERATURE (°C)
LOAD REGULATION (mV)
–4
–2
3012 G22
–12
–16
–18
–20
0
–8
–6
–10
–14
–50 0 50 75
–25 25 100 150125
ΔIL = 1mA TO 250mA
FREQUENCY (Hz)
0.1
OUTPUT NOISE SPECTRAL DENSITY (μV/√Hz)
1
10 1k 10k 100k
3012 G23
0.01 100
10 COUT = 3.3μF
ILOAD = 250mA
VOUT
100μV/DIV
COUT = 10μF
IL = 250mA
VOUT = 1.24V
1ms/DIV 3012 G24
TIME (μs)
0
OUTPUT VOLTAGE
DEVIATION (V)LOAD CURRENT (mA)
–0.05
0.05
400
3012 G25
100
–0.10
–0.15
0
0.10
0.15
200
300
0100 200 300 500
VIN = 6V
VOUT = 5V
CIN = 3.3μF CERAMIC
COUT = 3.3μF CERAMIC
ΔILOAD = 100mA TO 200mA
LT3012
8
3012fd
PIN FUNCTIONS
NC (Pins 1, 6, 7, 9, 12)/(Pins 2, 7, 10, 12, 15): No Con-
nect. These pins have no internal connection; connecting
NC pins to a copper area for heat dissipation provides a
small improvement in thermal performance.
OUT (Pins 2, 3)/(Pins 3, 4): Output.The output supplies
power to the load. A minimum output capacitor of 3.3μF
is required to prevent oscillations. Larger output capaci-
tors will be required for applications with large transient
loads to limit peak voltage transients. See the Applications
Information section for more information on output ca-
pacitance and reverse output characteristics.
ADJ (Pin 4)/(Pin 5): Adjust. This is the input to the error
amplifi er. This pin is internally clamped to ±7V. It has a
bias current of 30nA which fl ows into the pin (see curve
of ADJ Pin Bias Current vs Temperature in the Typical
Performance Characteristics). The ADJ pin voltage is
1.24V referenced to ground, and the output voltage range
is 1.24V to 60V.
GND (Pins 5, 13)/(Pins 1, 6, 8, 9, 16, 17): Ground. The
exposed backside of the package is an electrical connection
for GND. As such, to ensure optimum device operation and
thermal performance, the exposed pad must be connected
directly to pin 5/pin 6 on the PC board.
SHDN (Pin 8)/(Pin 11): Shutdown. The SHDN pin is used
to put the LT3012 into a low power shutdown state. The
output will be off when the
⎯
SHDN pin is pulled low. The
SHDN pin can be driven either by 5V logic or open-collector
logic with a pull-up resistor. The pull-up resistor is only
required to supply the pull-up current of the open-collec-
tor gate, normally several microamperes. If unused, the
SHDN pin must be tied to a logic high or to VIN.
IN (Pins 10, 11)/(Pins 13,14): Input. Power is supplied
to the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input fi lter capacitor. In general, the
output impedance of a battery rises with frequency, so it is
advisable to include a bypass capacitor in battery-powered
circuits. A bypass capacitor in the range of 1μF to 10μF is
suffi cient. The LT3012 is designed to withstand reverse
voltages on the IN pin with respect to ground and the OUT
pin. In the case of a reversed input, which can happen if
a battery is plugged in backwards, the LT3012 will act as
if there is a diode in series with its input. There will be no
reverse current fl ow into the LT3012 and no reverse volt-
age will appear at the load. The device will protect both
itself and the load.
(DFN Package/TSSOP Package)
The LT3012 is a 250mA high voltage low dropout regula-
tor with micropower quiescent current and shutdown.
The device is capable of supplying 250mA at a dropout
voltage of 400mV. The low operating quiescent current
(40μA) drops to 1μA in shutdown. In addition to the
low quiescent current, the LT3012 incorporates several
protection features which make it ideal for use in bat-
tery-powered systems. The device is protected against
both reverse input and reverse output voltages. In battery
backup applications where the output can be held up by
a backup battery when the input is pulled to ground, the
LT3012 acts like it has a diode in series with its output
and prevents reverse current fl ow.
Adjustable Operation
The LT3012 has an output voltage range of 1.24V to 60V.
The output voltage is set by the ratio of two external resis-
tors as shown in Figure 1. The device servos the output to
maintain the voltage at the adjust pin at 1.24V referenced
to ground. The current in R1 is then equal to 1.24V/R1
and the current in R2 is the current in R1 plus the ADJ
pin bias current. The ADJ pin bias current, 30nA at 25°C,
fl ows through R2 into the ADJ pin. The output voltage
can be calculated using the formula in Figure 1. The value
of R1 should be less than 250k to minimize errors in the
output voltage caused by the ADJ pin bias current. Note
that in shutdown the output is turned off and the divider
current will be zero.
APPLICATIONS INFORMATION
LT3012
9
3012fd
APPLICATIONS INFORMATION
The adjustable device is tested and specifi ed with the
ADJ pin tied to the OUT pin and a 5μA DC load (unless
otherwise specifi ed) for an output voltage of 1.24V. Speci-
fi cations for output voltages greater than 1.24V will be
proportional to the ratio of the desired output voltage to
1.24V; (VOUT/1.24V). For example, load regulation for an
output current change of 1mA to 250mA is –7mV typical at
VOUT = 1.24V. At VOUT = 12V, load regulation is:
(12V/1.24V) • (–7mV) = –68mV
Output Capacitance and Transient Response
The LT3012 is designed to be stable with a wide range of
output capacitors. The ESR of the output capacitor affects
stability, most notably with small capacitors. A minimum
output capacitor of 3.3μF with an ESR of 3Ω or less is
recommended to prevent oscillations. The LT3012 is a
micropower device and output transient response will be
a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
Figure 1. Adjustable Operation
improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3012, will increase the
effective output capacitor value.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
dielectrics used are specifi ed with EIA temperature char-
acteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but they tend to have strong voltage
and temperature coeffi cients as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10μF Y5V capacitor
can exhibit an effective value as low as 1μF to 2μF for the
DC bias voltage applied and over the operating tempera-
ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is avail-
able in higher values. Care still must be exercised when
using X5R and X7R capacitors; the X5R and X7R codes
only specify operating temperature range and maximum
capacitance change over temperature. Capacitance change
due to DC bias with X5R and X7R capacitors is better than
Y5V and Z5U capacitors, but can still be signifi cant enough
to drop capacitor values below appropriate levels. Capaci-
tor DC bias characteristics tend to improve as component
case size increases, but expected capacitance at operating
voltage should be verifi ed.
Figure 2. Ceramic Capacitor DC Bias Characteristics Figure 3. Ceramic Capacitor Temperature Characteristics
VIN
3012 F01
VOUT
R2
R1
+
R2
R1
VOUT = 1.24V
VADJ = 1.24V
IADJ = 30nA AT 25°C
OUTPUT RANGE = 1.24V TO 60V
+ (IADJ)(R2)1 +
IN
LT3012
OUT
ADJ
GND
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
3012 F02
20
0
–20
–40
–60
–80
–100 04810
26 12 14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100 25 75
3012 F03
–25 0 50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
LT3012
10
3012fd
APPLICATIONS INFORMATION
Voltage and temperature coeffi cients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, simi-
lar to the way a piezoelectric accelerometer or microphone
works. For a ceramic capacitor the stress can be induced
by vibrations in the system or thermal transients.
Current Limit and Safe Operating Area Protection
Like many IC power regulators, the LT3012 has safe oper-
ating area protection. The safe operating area protection
decreases the current limit as the input voltage increases
and keeps the power transistor in a safe operating region.
The protection is designed to provide some output current
at all values of input voltage up to the device breakdown
(see curve of Current Limit vs Input Voltage in the Typical
Performance Characteristics).
The LT3012 is limited for operating conditions by maximum
junction temperature. While operating at maximum input
voltage, the output current range must be limited; when
operating at maximum output current, the input voltage
range must be limited. Device specifi cations will not apply
for all possible combinations of input voltage and output
current. Operating the LT3012 beyond the maximum junc-
tion temperature rating may impair the life of the device.
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature of (125°C for
LT3012E, or 140°C for LT3012HFE). The power dissipated
by the device will be made up of two components:
1. Output current multiplied by the input/output voltage
differential: IOUT • (VIN – VOUT) and,
2. GND pin current multiplied by the input voltage:
I
GND • VIN.
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the
two components listed above.
The LT3012 has internal thermal limiting designed to pro-
tect the device during overload conditions. For continuous
normal conditions the maximum junction temperature
rating of 125°C (E-Grade) or 140°C (H-Grade)must not
be exceeded. It is important to give careful consideration
to all sources of thermal resistance from junction to ambi-
ent. Additional heat sources mounted nearby must also
be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. DFN Measured Thermal Resistance
COPPER AREA
TOPSIDE BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 62°C/W
Table 2. TSSOP Measured Thermal Resistance
COPPER AREA
TOPSIDE BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 62°C/W
The thermal resistance junction-to-case (θJC), measured
at the exposed pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage dif-
ferentials and maximum load current is not practical
due to thermal limitations. Transient operation at high
input/output differentials is possible. The approximate
thermal time constant for a 2500sq mm 3/32" FR-4 board
with maximum topside and backside area for one ounce
copper is 3 seconds. This time constant will increase as
more thermal mass is added (i.e., vias, larger board, and
other components).
LT3012
11
3012fd
For an application with transient high power peaks, average
power dissipation can be used for junction temperature
calculations as long as the pulse period is signifi cantly less
than the thermal time constant of the device and board.
Calculating Junction Temperature
Example 1: Given an output voltage of 5V, an input volt-
age range of 24V to 30V, an output current range of 0mA
to 50mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX) • (VIN(MAX) – VOUT) + (IGND • VIN(MAX))
where:
I
OUT(MAX) = 50mA
V
IN(MAX) = 30V
I
GND at (IOUT = 50mA, VIN = 30V) = 1mA
So:
P = 50mA • (30V – 5V) + (1mA • 30V) = 1.28W
The thermal resistance will be in the range of 40°C/W to
62°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
1.31W • 50°C/W = 65.5°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX = 50°C + 65.5°C = 115.5°C
Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms(max) out of every 100ms,
and a 5mA load that steps to 50mA for 50ms out of every
250ms, what is the junction temperature rise above ambi-
ent? Using a 500ms period (well under the time constant
of the board), power dissipation is as follows:
P1(48V in, 5mA load) = 5mA • (48V – 5V)
+ (200μA • 48V) = 0.23W
P2(48V in, 50mA load) = 50mA • (48V – 5V)
+ (1mA • 48V) = 2.20W
APPLICATIONS INFORMATION
P3(72V in, 5mA load) = 5mA • (72V – 5V)
+ (200μA • 72V) = 0.35W
P4(72V in, 50mA load) = 50mA • (72V – 5V)
+ (1mA • 72V) = 3.42W
Operation at the different power levels is as follows:
76% operation at P1, 19% for P2, 4% for P3, and
1% for P4.
P
EFF = 76%(0.23W) + 19%(2.20W) + 4%(0.35W)
+ 1%(3.42W) = 0.64W
With a thermal resistance in the range of 40°C/W to
62°C/W, this translates to a junction temperature rise
above ambient of 26°C to 38°C.
High Temperature Operation
Care must be taken when designing LT3012 applications to
operate at high ambient temperatures. The LT3012 works
at elevated temperatures but erratic operation can occur
due to unforeseen variations in external components. Some
tantalum capacitors are available for high temperature
operation, but ESR is often several ohms; capacitor ESR
above 3Ω is unsuitable for use with the LT3012. Ceramic
capacitor manufacturers (Murata, AVX, TDK, and Vishay
Vitramon at this writing) now offer ceramic capacitors that
are rated to 150°C using an X8R dielectric. Device instability
will occur if output capacitor value and ESR are outside
design limits at elevated temperature and operating DC
voltage bias (see information on capacitor characteristics
under Output Capacitance and Transient Response). Check
each passive component for absolute value and voltage
ratings over the operating temperature range.
Leakages in capacitors or from solder fl ux left after
insuficient board cleaning adversely affects low
quiescent current operation. The output voltage resistor
divider should use a maximum bottom resistor value of
124k to compensate for high temperature leakage, setting
divider current to 10μA. Consider junction temperature
increase due to power dissipation in both the junction and
nearby components to ensure maximum specifi cations are
not violated for the device or external components.
LT3012
12
3012fd
APPLICATIONS INFORMATION
Protection Features
The LT3012 incorporates several protection features which
make it ideal for use in battery-powered circuits. In ad-
dition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device is protected against reverse-input volt-
ages, and reverse voltages from output to input.
Like many IC power regulators, the LT3012 has safe operat-
ing area protection. The safe area protection decreases the
current limit as input voltage increases and keeps the power
transistor inside a safe operating region for all values of
input voltage. The protection is designed to provide some
output current at all values of input voltage up to the device
breakdown. The SOA protection circuitry for the LT3012
uses a current generated when the input voltage exceeds
25V to decrease current limit. This current shows up as
additional quiescent current for input voltages above 25V.
This increase in quiescent current occurs both in normal
operation and in shutdown (see curve of Quiescent Current
in the Typical Performance Characteristics).
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C
(LT3012E) or 140°C (LT3012HFE).
The input of the device will withstand reverse voltages of
80V. No negative voltage will appear at the output. The
device will protect both itself and the load. This provides
protection against batteries which can be plugged in
backward.
The ADJ pin of the device can be pulled above or below
ground by as much as 7V without damaging the device.
If the input is left open circuit or grounded, the ADJ pin
will act like an open circuit when pulled below ground,
and like a large resistor (typically 100k) in series with a
diode when pulled above ground. If the input is powered
by a voltage source, pulling the ADJ pin below the refer-
ence voltage will cause the device to current limit. This
will cause the output to go to a unregulated high voltage.
Pulling the ADJ pin above the reference voltage will turn
off all output current.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp volt-
age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
1.24V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open circuit. Current fl ow back into the output will follow
the curve shown in Figure 4. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the
regulator output, this current will be reduced depending
on the size of the resistor divider.
Figure 4. Reverse Output Current
When the IN pin of the LT3012 is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input cur-
rent will typically drop to less than 2μA. This can happen
if the input of the LT3012 is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit. The state
of the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (μA)
120
160
200
8
3012 F04
80
40
100
140
180
60
20
021 43 67 9
510
ADJ
PIN CLAMP
(SEE ABOVE)
TJ = 25°C
VIN = 0V
VOUT = VADJ
CURRENT FLOWS
INTO OUTPUT PIN
LT3012
13
3012fd
5V Buck Converter with Low Current Keep Alive Backup
TYPICAL APPLICATIONS
Buck Converter
Effi ciency vs Load Current
BOOST
VIN
6
2
10
12
D1
10MQ060N
R1
15.4k
VOUT
5V
1A/250mA
4
1
14
11
3
5
15
14
11
CC
1nF
FOR INPUT VOLTAGES BELOW 7.5V,
SOME RESTRICTIONS MAY APPLY
INCREASE L1 TO 30μH FOR LOAD
CURRENTS ABOVE 0.6A AND TO
60μH ABOVE 1A
1, 8, 9, 16
LT1766
SHDN
SYNC
SW
BIAS
FB
VC
GND
C2
0.33μF
C1
100μF 10V
SOLID
TANTALUM
L1†
15μH
D2
D1N914
R2
4.99k
3012 TA03
750k
249k
C3
4.7μF
100V
CERAMIC
VIN
5.5V*
TO 60V
+
ADJ
OUTIN
SHDN
LT3012
GND
OPERATING
CURRENT
HIGH
LOW
*
†
LOAD CURRENT (A)
0
EFFICIENCY (%)
80
90
100
1.00
3012 TA04
70
60
50 0.25 0.50 0.75 1.25
VIN = 10V
VIN = 42V
VOUT = 5V
L = 68μH
LT3012
14
3012fd
LT3012 Automotive Application
TYPICAL APPLICATIONS
LT3012 Telecom Application
Constant Brightness for Indicator LED over Wide Input Voltage Range
+
ADJ
OUTIN
SHDN
LT3012
GND
ON
OFF
1μF 3.3μF
750k
VIN
12V
(LATER 42V) LOAD: CLOCK,
SECURITY SYSTEM
ETC
+
–
ADJ
OUTIN
SHDN
LT3012
GND
ON
OFF
1μF 3.3μF
VIN
48V
(72V TRANSIENT)
LOAD:
SYSTEM MONITOR
ETC
NO PROTECTION
DIODE NEEDED!
NO PROTECTION
DIODE NEEDED!
3012 TA05
BACKUP
BATTERY
249k
750k
249k
IN
LT3012
SHDN
1μF
RETURN
OFF ON
–48V
OUT
ADJ
GND
3012 TA06
3.3μF
RSET
ILED = 1.24V/RSET
–48V CAN VARY FROM –4V TO –80V
LT3012
15
3012fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
DE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695)
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
FE16 (BB) TSSOP 0204
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
134
5678
10 9
4.90 – 5.10*
(.193 – .201)
16 1514 13 12 11
1.10
(.0433)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC
2.94
(.116)
0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
2.94
(.116)
3.58
(.141)
3.58
(.141)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
4.00 ±0.10
(2 SIDES)
3.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.70 ± 0.10
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
2.50 REF
16
127
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(UE12/DE12) DFN 0806 REV D
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
2.20 ±0.05
0.70 ±0.05
3.60 ±0.05
PACKAGE
OUTLINE
3.30 ±0.10
0.25 ± 0.05
0.50 BSC
1.70 ± 0.05
3.30 ±0.05
0.50 BSC
0.25 ± 0.05
LT3012
16
3012fd
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
LT 0508 REV D • PRINTED IN USA
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1020 125mA, Micropower Regulator and Comparator VIN: 4.5V to 36V, VOUT(MIN) = 2.5V, VDO = 0.4V, IQ = 40μA, ISD = 40μA, Comparator
and Reference, Class B Outputs, S16, PDIP14 Packages
LT1120/LT1120A 125mA, Micropower Regulator and Comparator VIN: 4.5V to 36V, VOUT(MIN) = 2.5V, VDO = 0.4V, IQ = 40μA, ISD = 10μA,
Comparator and Reference, Logic Shutdown, Ref Sources and Sinks 2/4mA,
S8, N8 Packages
LT1121/LT1121HV 150mA, Micropower, LDO VIN: 4.2V to 30/36V, VOUT(MIN) = 3.75V, VDO = 0.42V, IQ = 30μA, ISD = 16μA,
Reverse Battery Protection, SOT-223, S8, Z Packages
LT1129 700mA, Micropower, LDO VIN: 4.2V to 30V, VOUT(MIN) = 3.75V, VDO = 0.4V, IQ = 50μA, ISD = 16μA,
DD, S0T-223, S8,TO220-5, TSSOP20 Packages
LT1676 60V, 440mA (IOUT), 100kHz, High Effi ciency
Step-Down DC/DC Converter
VIN: 7.4V to 60V, VOUT(MIN) = 1.24V, IQ = 3.2mA, ISD = 2.5μA, S8 Package
LT1761 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 20μA, ISD = <1μA,
Low Noise < 20μVRMS, Stable with 1μF Ceramic Capacitors, ThinSOT™ Package
LT1762 150mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 25μA, ISD = <1μA,
Low Noise < 20μVRMS, MS8 Package
LT1763 500mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 30μA, ISD = <1μA,
Low Noise < 20μVRMS, S8 Package
LT1764/LT1764A 3A, Low Noise, Fast Transient Response, LDO VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = <1μA,
Low Noise < 40μVRMS, “A” Version Stable with Ceramic Capacitors,
DD, TO220-5 Packages
LT1766 60V, 1.2A (IOUT), 200kHz, High Effi ciency
Step-Down DC/DC Converter
VIN: 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP16/E Package
LT1776 40V, 550mA (IOUT), 200kHz, High Effi ciency
Step-Down DC/DC Converter
VIN: 7.4V to 40V, VOUT(MIN) = 1.24V, IQ = 3.2mA, ISD = 30μA, N8, S8 Packages
LT1934/LT1934-1 300mA/60mA, (IOUT), Constant Off-Time, High
Effi ciency Step-Down DC/DC Converter
90% Effi ciency, VIN: 3.2V to 34V, VOUT(MIN) = 1.25V, IQ = 14μA, ISD = <1μA,
ThinSOT Package
LT1956 60V, 1.2A (IOUT), 500kHz, High Effi ciency
Step-Down DC/DC Converter
VIN: 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP16/E Package
LT1962 300mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30μA, ISD = <1μA,
Low Noise < 20μVRMS, MS8 Package
LT1963/LT1963A 1.5A, Low Noise, Fast Transient Response, LDO VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = <1μA,
Low Noise < 40μVRMS, “A” Version Stable with Ceramic Capacitors,
DD, TO220-5, S0T-223, S8 Packages
LT1964 200mA, Low Noise Micropower, Negative LDO VIN: –1.9V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30μA, ISD = 3μA,
Low Noise < 30μVRMS, Stable with Ceramic Capacitors, ThinSOT Package
LT3010/LT3010H 50mA, 3V to 80V, Low Noise Micropower LDO VIN: 3V to 8V, VOUT(MIN) = 1.275V, VDO = 0.3V, IQ = 30μA, ISD = 1μA,
Low Noise < 100μVRMS, MS8E Package, H Grade = +140°C TJMAX.
LT3013/LT3013H 250mA, 4V to 80V, Low Dropout Micropower
Linear Regulator with PWRGD
VIN: 4V to 80V, VOUT: 1.24V to 60V, VDO = 0.4V, IQ = 65μA, ISD = <1μA,
Power Good Feature; TSSOP-16E and 4mm × 3mm DFN-12 Packages,
H Grade = +140°C TJMAX.
LT3014/HV 20mA, 3V to 80V, Low Dropout Micropower
Linear Regulator
VIN: 3V to 80V (100V for 2ms, HV version), VOUT: 1.22V to 60V, VDO = 0.35V,
IQ = 7μA, ISD = <1μA, ThinSOT and 3mm × 3mm DFN-8 Packages.
ThinSOT is a trademark of Linear Technology Corporation.
