+3 V/+5 V/±5 V, CMOS, 8-Channel
Analog Multiplexer
Enhanced Product
ADG658-EP
Rev. 0 Document Feedback
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FEATURES
±2 V to ±6 V dual supply
2 V to 12 V single supply
<0.1 nA leakage currents (typical)
45 Ω typical on resistance over full signal range
Rail-to-rail switching operation
Single, 8 to 1 multiplexer
16-lead TSSOP package
0.01 μA typical supply current
TTL/CMOS compatible inputs
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC
standard)
Military temperature range: −55°C to +125°C
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Communication systems
Audio and video signal routing
Relay replacement
Sample-and-hold systems
Industrial control systems
FUNCTIONAL BLOCK DIAGRAM
S1
S8
D
A0 A1 A2
1 OF 8
DECODER
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
EN
ADG658-EP
15981-001
Figure 1.
GENERAL DESCRIPTION
The ADG658-EP is a low voltage, CMOS analog multiplexer
comprised of eight single channels. The ADG658-EP switches one
of eight inputs (S1 to S8) to a common output, D, as determined by
the 3-bit binary address lines A0, A1, and A2. An EN input enables
or disables the device. When disabled, all channels are switched off.
The ADG658-EP is designed on an enhanced process that provides
lower power dissipation yet gives high switching speeds. It can
operate equally well as either a multiplexer or a demultiplexer, and
has an input range that extends to the supplies. All channels exhibit
break-before-make switching action, preventing momentary
shorting when switching channels. All digital inputs have +0.8 V
to +2.4 V logic thresholds, ensuring TTL/CMOS logic compatibi-
lity when using single +5 V or dual ±5 V supplies.
The ADG658-EP is available in a 16-lead TSSOP package.
Additional application and technical information can be found
in the ADG658 data sheet.
PRODUCT HIGHLIGHTS
1. Single-supply and dual-supply operation. The ADG658-EP
offers high performance and is fully specified and guaranteed
wit h ± 5 V, + 5 V, a n d +3 V supply rails.
2. Military temperature range −55°C to +125°C.
3. Low supply current, typically 0.01 µA.
4. 16-lead TSSOP package.
ADG658-EP Enhanced Product
Rev. 0 | Page 2 of 10
TABLE OF CONTENTS
Features .............................................................................................. 1
Enhanced Product Features ............................................................ 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Dual Supply ................................................................................... 3
5 V Single Supply ...........................................................................3
2.7 V to 3.6 V Single Supply .........................................................5
Absolute Maximum Ratings ............................................................6
ESD Caution...................................................................................6
Pin Configurations and Function Descriptions ............................7
Typical Performance Characteristics ..............................................8
Outline Dimensions ....................................................................... 10
Ordering Guide .......................................................................... 10
REVISION HISTORY
8/2017—Revision 0: Initial Version
Enhanced Product ADG658-EP
Rev. 0 | Page 3 of 10
SPECIFICATIONS
DUAL SUPPLY
VDD = 5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C
−55°C to
+125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = −4.5 V
On Resistance, RON 45 Ω typ Source voltage (VS) = ±4.5 V, source current (IS) = 1 mA
75 100 Ω max
On Resistance Match Between 1.3 Ω typ
Channels, ∆RON 3 3.5 Ω max VS = 3.5 V, IS = 1 mA
On Resistance Flatness, RFL AT (O N) 10 Ω typ VDD = +5 V, VSS = −5 V
16 18 Ω max VS = ±3 V, IS = 1 mA
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V
Source Off Leakage, I
S
(OFF)
±0.005
nA typ
Drain voltage (VD) = ±4.5 V, VS =
4.5 V
±0.2 ±5 nA max
Drain Off Leakage, ID (OFF) ±0.005 nA typ VD = ±4.5 V, VS =
4.5 V
±0.2 ±5 nA max
Channel On Leakage ID, IS (ON) ±0.005 nA typ VD = VS = ±4.5 V
±0.2 ±5 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.4 V min
Input Low Voltage, VINL 0.8 V max
Input Current
I
INL
or I
INH
0.005
µA typ
IN
INL
INH
±1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS
1
Transition Time, tTRANSITION 80 ns typ Load resistance (RL) = 300 Ω, load capacitance (CL) = 35 pF
115 165 ns max VS = 3 V
EN On Time, tON (EN) 80 ns typ RL = 300 Ω, CL = 35 pF
115 165 ns max VS = 3 V
EN Off Time, tOFF (EN) 30 ns typ RL = 300 Ω, CL = 35 pF
45 55 ns max VS = 3 V
Break-Before-Make Time Delay, tBBM 50 ns typ RL = 300 Ω, CL = 35 pF
10 ns min Source 1 voltage (VS1) = 3 V, source 2 voltage (VS2) = 3 V
Charge Injection 2 pC typ VS = 0 V, RS = 0 Ω
4 pC max CL = 1 nF
Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz
Total Harmonic Distortion Plus Noise, THD + N 0.025 % typ RL = 600 Ω, 2 V p-p, f = 20 Hz to 20 kHz
−3 dB Bandwidth 210 MHz
typ
RL = 50 Ω, CL = 5 pF
Source Capacitance, CS (OFF) 4 pF typ f = 1 MHz
Drain Capacitance, CD (OFF) 23 pF typ f = 1 MHz
CD, CS (ON) 28 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V
Positive Power Supply Current, IDD 0.01 µA typ Digital inputs = 0 V or 5.5 V
1 µA max
Negative Power Supply Current, ISS 0.01 µA typ Digital inputs = 0 V or 5.5 V
1 µA max
1 Guaranteed by design; not subject to production test.
ADG658-EP Enhanced Product
Rev. 0 | Page 4 of 10
5 V SINGLE SUPPLY
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter +25°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V VDD = 4.5 V, VSS = 0 V
On Resistance, RON 85 Ω typ VS = 0 V to 4.5 V, IS = 1 mA
150 200 Ω max
On Resistance Match Between 4.5 Ω typ VS = 3.5 V, IS = 1 mA
Channels, ∆RON 8 10 Ω max
On Resistance Flatness, RFLAT (O N) 13 16 Ω typ VDD = 5 V, VSS = 0 V, VS = 1.5 V to 4 V, IS = 1 mA
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, I
S
(OFF)
±0.005
nA typ
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V
±0.2 ±5 nA max
Drain Off Leakage, ID (OFF) ±0.005 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V
±0.2 ±5 nA max
Channel On Leakage ID, IS (ON) ±0.005 nA typ VS = VD = 1 V or 4.5 V
±0.2 ±5 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.4 V min
Input Low Voltage, VINL 0.8 V max
Input Current
IINL or IINH 0.005 µA typ VIN = VINL or VINH
±1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 120 ns typ RL = 300 Ω, CL = 35 pF
200 300 ns max VS = 3 V
EN On Time, tON (EN) 120 ns typ RL = 300 Ω, CL = 35 pF
190 280 ns max VS = 3 V
EN Off Time, tOFF (EN) 35 ns typ RL = 300 Ω, CL = 35 pF
50 70 ns max VS = 3 V
Break-Before-Make Time Delay, tBBM 100 ns typ RL = 300 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 3 V
Charge Injection
0.5
pC typ
V
S
= 2.5 V, R
S
= 0 Ω, C
L
= 1 nF
1 pC max
Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz
−3 dB Bandwidth 180 MHz typ RL = 50 Ω, CL = 5 pF
Source Capacitance, CS (OFF) 5 pF typ f = 1 MHz
Drain Capacitance, CD (OFF) 29 pF typ f = 1 MHz
CD, CS (ON) 30 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V
Positive Power Supply Current, IDD 0.01 µA typ Digital inputs = 0 V or 5.5 V
1 µA max
1 Guaranteed by design; not subject to production test.
Enhanced Product ADG658-EP
Rev. 0 | Page 5 of 10
2.7 V TO 3.6 V SINGLE SUPPLY
VDD = 2.7 to 3.6 V, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter +25°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V VDD = 2.7 V, VSS = 0 V
On Resistance, RON 185 Ω typ VS = 0 V to 2.7 V, IS = 0.1 mA
300 400 Ω max
On Resistance Match Between 2 Ω typ VS = 1.5 V, IS = 0.1 mA
Channels, ∆RON 4.5 7 Ω max
LEAKAGE CURRENTS VDD = 3.3 V
Source Off Leakage, IS (OFF) ±0.005 nA typ VS = 1 V/3 V, VD = 3 V/1 V
±0.2
±5
nA max
Drain Off Leakage, ID (OFF) ±0.005 nA typ VS = 1 V/3 V, VD = 3 V/1 V
±0.2 ±5 nA max
Channel On Leakage ID, IS (ON) ±0.005 nA typ VS = VD = 1 V or 3 V
±0.2 ±5 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.5 V max
Input Current
IINL or IINH 0.005 µA typ VIN = VINL or VINH
±1 µA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 200 ns typ RL = 300 Ω, CL = 35 pF
370 490 ns max VS = 1.5 V
EN On Time, tON (EN) 230 ns typ RL = 300 Ω, CL = 35 pF
370 490 ns max VS = 1.5 V
EN Off Time, tOFF (EN) 50 ns typ RL = 300 Ω, CL = 35 pF
80 110 ns max VS = 1.5 V
Break-Before-Make Time Delay, tBBM 200 ns typ RL = 300 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 1.5 V
Charge Injection 1 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF
2
pC max
Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz
−3 dB Bandwidth 160 MHz typ RL = 50 Ω, CL = 5 pF
Source Capacitance, CS (OFF) 5 pF typ f = 1 MHz
Drain Capacitance, CD (OFF) 29 pF typ f = 1 MHz
CD, CS (ON) 30 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 3.6 V
Positive Power Supply Current, IDD 0.01 µA typ Digital inputs = 0 V or 3.6 V
1 µA max
1 Guaranteed by design; not subject to production test.
ADG658-EP Enhanced Product
Rev. 0 | Page 6 of 10
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter Rating
VDD to VSS 13 V
VDD to GND −0.3 V to +13 V
VSS to GND +0.3 V to −6.5 V
Analog Inputs1 VSS − 0.3 V to VDD + 0.3 V
Digital Inputs1 GND − 0.3 V to VDD + 0.3 V
or 10 mA, whichever
occurs first
Peak Current, Sx or D 40 mA
(Pulsed at 1 ms, 10% duty cycle
max)
Continuous Current, Sx or D 20 mA
Operating Temperature Range −55°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
θJA Thermal Impedance
16-Lead TSSOP 150.4°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
ESD (Human Body Model) 4.0 kV
1 Overvoltages at AX, EN, Sx, or D are clamped by internal diodes. Current must
be limited to the maximum ratings.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Table 5. Truth Table
A2 A1 A0 EN Switch Condition
X1 X1 X1 1 None
0 0 0 0 1
0 0 1 0 2
0 1 0 0 3
0 1 1 0 4
1 0 0 0 5
1 0 1 0 6
1 1 0 0 7
1 1 1 0 8
1 X means don’t care
Enhanced Product ADG658-EP
Rev. 0 | Page 7 of 10
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
DD
S3
S2
S1
S4
A0
A1
A2
S5
S7
D
S8
S6
V
SS
GND
EN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ADG658-EP
TOP VIEW
(No t t o Scal e)
15981-002
Figure 2. 16-Lead TSSOP Pin Configuration
Table 6. 16-Lead TSSOP Pin Function Descriptions
Pin No. Mnemonic Description
1, 2, 4, 5, 12, 13,
14, 15
S1 to S8
Source Terminals. Can be an input or output.
3 D Drain Terminal. Can be an input or output.
6 EN Active Low Digital Input. When high, device is disabled and all switches are off. When low, Ax logic
inputs determine on switch.
7 VSS Most Negative Power Supply Potential.
8 GND Ground (0 V) Reference.
9, 10, 11 A0 to A2 Logic Control Inputs.
16 VDD Most Positive Power Supply Potential.
ADG658-EP Enhanced Product
Rev. 0 | Page 8 of 10
TYPICAL PERFORMANCE CHARACTERISTICS
100
90
80
70
60
50
40
30
20
10
0–5 –4 –3 –2 –1 0 1 2 3 4 5
ON RESISTANCE (Ω)
V
D
, V
S
(V)
–55°C
–40°C
+25°C
+85°C
+125°C
15981-003
Figure 3. On Resistance vs. VD (VS) for Different Temperatures (Dual Supply)
140
120
100
80
60
40
20
000.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
ON RESISTANCE (Ω)
VD, VS (V)
–55°C
–40°C
+25°C
+85°C
+125°C
15981-004
Figure 4. On Resistance vs. VD (VS) for Different Temperatures (Single Supply)
300
250
200
150
100
50
000.5 1.0 1.5 2.0 2.5 3.0
ON RESISTANCE (Ω)
VD, VS (V)
–55°C
–40°C
+25°C
+85°C
+125°C
15981-005
Figure 5. On Resistance vs. VD (VS) for Different Temperatures (Single Supply)
1.5
–2.5
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
020 40 60 80 100 120
LE AKAG E CURRE NT (nA)
TEMPERATURE (°C)
V
DD
= +5V
V
SS
= –5V
V
D
= ±4V
V
S
= ±4V
I
S
(OFF)
I
D
(OFF)
I
D
(ON), I
S
(O N)
15981-006
Figure 6. Leakage Current vs. Temperature (Dual Supply)
1.5
–2.5
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
020 40 60 80 100 120
LE AKAG E CURRE NT (nA)
TEMPERATURE (°C)
I
S
(OFF)
I
D
(OFF)
I
D
(ON), I
S
(O N)
V
DD
= +5V
V
SS
= 0V
V
D
= ±4V
V
S
= 1V
±
15981-007
Figure 7. Leakage Current vs. Temperature (Single Supply)
Enhanced Product ADG658-EP
Rev. 0 | Page 9 of 10
140
0
20
40
60
80
100
120
–55 125105856545255–15–35
TIME (n s)
TEMPERATURE (°C)
V
DD
= +5V
V
SS
= –5V
t
ON
t
OFF
15981-008
Figure 8. tON/tOFF Time vs. Temperature (Dual Supply)
350
0
50
100
150
200
250
300
–55 125105856545255–15–35
TIME (n s)
TEMPERATURE (°C)
V
SS
= 0V
V
DD
= 3V
V
DD
= 3V
V
DD
= 5V
V
DD
= 5V
t
ON
t
OFF
15981-009
Figure 9. tON/tOFF Time vs. Temperature (Single Supply)
ADG658-EP Enhanced Product
Rev. 0 | Page 10 of 10
OUTLINE DIMENSIONS
16 9
81
PIN 1
SEATING
PLANE
8°
0°
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX 0.20
0.09 0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COM P LIANT TO JEDE C S TANDARDS MO-153- AB
Figure 10. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model1Temperature Range Package Description Package Option
ADG658TRUZ-EP −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADG658TRUZ-EP-RL7 −55°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
1 Z = RoHS Compliant Part.
©2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D15981-0-8/17(0)