1
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
1
7
tab
D²-PAK7pin
Drain
Pin 4, tab
Gate
Pin 1
Source
Pin 2,3,5,6,7
MOSFET
OptiMOSª3Power-Transistor,30V
Features
•MOSFETforORingandUninterruptiblePowerSupply
•QualifiedaccordingtoJEDEC1)fortargetapplications
•N-channel
•Logiclevel
•Ultra-lowon-resistanceRDS(on)
•100%Avalanchetested
•Pb-freeplating;RoHScompliant
Table1KeyPerformanceParameters
Parameter Value Unit
VDS 30 V
RDS(on),max 0.95 mΩ
ID180 A
Type/OrderingCode Package Marking RelatedLinks
IPB009N03L G PG-TO263-7 009N03L -
1) J-STD20 and JESD22
2
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Continuous drain current ID
-
-
-
-
-
-
-
-
180
180
180
180
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=4.5V,TC=25°C
VGS=4.5V,TC=100°C
Pulsed drain current1) ID,pulse - - 1260 A TC=25°C
Avalanche current, single pulse2) IAS - - 100 A TC=25°C
Avalanche energy, single pulse EAS - - 610 mJ ID=100A,RGS=25Ω
Reversediodedv/dtdv/dt- - 6 kV/µs ID=180A,VDS=24V,di/dt=200A/µs,
Tj,max=175°C
Gate source voltage VGS -20 - 20 V -
Power dissipation Ptot - - 250 W TC=25°C
Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category;
DIN IEC 68-1: 55/175/56
2Thermalcharacteristics
Table3Thermalcharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Thermal resistance, junction - case RthJC - - 0.6 K/W -
SMD version, device on PCB,
minimal footprint RthJA - - 62 K/W -
SMD version, device on PCB,
6 cm² cooling area3) RthJA - - 40 K/W -
1) See Diagram 3 for more detailed information
2) See Diagram 13 for more detailed information
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
4
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
3Electricalcharacteristics
Table4Staticcharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Drain-source breakdown voltage V(BR)DSS 30 - - V VGS=0V,ID=1mA
Gate threshold voltage VGS(th) 1 - 2.2 V VDS=VGS,ID=250µA
Zero gate voltage drain current IDSS -
-
0.1
20
2
200 µA VDS=30V,VGS=0V,Tj=25°C
VDS=30V,VGS=0V,Tj=125°C
Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V
Drain-source on-state resistance RDS(on) -
-
0.95
0.7
1.3
0.95 mΩVGS=4.5V,ID=100A
VGS=10V,ID=100A
Gate resistance RG- 1.5 - Ω-
Transconductance gfs 180 370 - S |VDS|>2|ID|RDS(on)max,ID=100A
Table5Dynamiccharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Input capacitance Ciss - 19000 25000 pF VGS=0V,VDS=15V,f=1MHz
Output capacitance Coss - 5700 7600 pF VGS=0V,VDS=15V,f=1MHz
Reverse transfer capacitance Crss - 360 - pF VGS=0V,VDS=15V,f=1MHz
Turn-on delay time td(on) - 26 - ns VDD=15V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Rise time tr- 14 - ns VDD=15V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Turn-off delay time td(off) - 103 - ns VDD=15V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Fall time tf- 22 - ns VDD=15V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Table6Gatechargecharacteristics1)
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Gate to source charge Qgs - 50 - nC VDD=15V,ID=100A,VGS=0to4.5V
Gate charge at threshold Qg(th) - 28 - nC VDD=15V,ID=100A,VGS=0to4.5V
Gate to drain charge Qgd - 24 - nC VDD=15V,ID=100A,VGS=0to4.5V
Switching charge Qsw - 46 - nC VDD=15V,ID=100A,VGS=0to4.5V
Gate charge total Qg- 110 146 nC VDD=15V,ID=100A,VGS=0to4.5V
Gate plateau voltage Vplateau - 2.9 - V VDD=15V,ID=100A,VGS=0to4.5V
Gate charge total Qg- 227 - nC VDD=15V,ID=100A,VGS=0to10V
Gate charge total, sync. FET Qg(sync) - 95 - nC VDS=0.1V,VGS=0to4.5V
Output charge Qoss - 148 - nC VDD=15V,VGS=0V
1) See ″Gate charge waveforms″ for parameter definition
5
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
Table7Reversediode
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Diode continuous forward current IS- - 180 A TC=25°C
Diode pulse current IS,pulse - - 1260 A TC=25°C
Diode forward voltage VSD - 0.82 1 V VGS=0V,IF=100A,Tj=25°C
Reverse recovery charge Qrr - 135 - nC VR=15V,IF=IS,diF/dt=400A/µs
6
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
TC[°C]
Ptot[W]
0 50 100 150 200
0
50
100
150
200
250
300
Ptot=f(TC)
Diagram2:Draincurrent
TC[°C]
ID[A]
0 50 100 150 200
0
40
80
120
160
200
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
VDS[V]
ID[A]
10-1 100101102
100
101
102
103
104
1 µs
10 µs
100 µs
1 ms
10 ms
DC
ID=f(VDS);TC=25°C;D=0;parameter:tp
Diagram4:Max.transientthermalimpedance
tp[s]
ZthJC[K/W]
10-6 10-5 10-4 10-3 10-2 10-1 100
10-3
10-2
10-1
100
0.5
0.2
0.1
0.05
0.02
0.01
single pulse
ZthJC=f(tp);parameter:D=tp/T
7
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
Diagram5:Typ.outputcharacteristics
VDS[V]
ID[A]
0123
0
200
400
600
800
1000
4.5 V
5 V
10 V
4 V
3.5 V
3.2 V
3 V
2.8 V
ID=f(VDS);Tj=25°C;parameter:VGS
Diagram6:Typ.drain-sourceonresistance
ID[A]
RDS(on)[mΩ]
0 40 80 120 160 200
0.0
0.4
0.8
1.2
1.6
2.0
3.2 V
3.5 V
4 V
4.5 V
5 V
6 V
10 V
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
VGS[V]
ID[A]
012345
0
200
400
600
800
1000
175 °C
25 °C
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Diagram8:Typ.forwardtransconductance
ID[A]
gfs[S]
0 40 80 120 160 200
0
100
200
300
400
500
gfs=f(ID);Tj=25°C
8
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
Diagram9:Drain-sourceon-stateresistance
Tj[°C]
RDS(on)[mΩ]
-60 -20 20 60 100 140 180
0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
1.60
1.80
98 %
typ
RDS(on)=f(Tj);ID=100A;VGS=10V
Diagram10:Typ.gatethresholdvoltage
Tj[°C]
VGS(th)[V]
-60 -20 20 60 100 140 180
0.0
0.5
1.0
1.5
2.0
2.5
VGS(th)=f(Tj);VGS=VDS;ID=1mA
Diagram11:Typ.capacitances
VDS[V]
C[pF]
0 10 20 30
102
103
104
105
Ciss
Coss
Crss
C=f(VDS);VGS=0V;f=1MHz
Diagram12:Forwardcharacteristicsofreversediode
VSD[V]
IF[A]
0.0 0.5 1.0 1.5 2.0
100
101
102
103
104
25 °C
175 °C
25 °C, 98%
175 °C, 98%
IF=f(VSD);parameter:Tj
9
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
Diagram13:Avalanchecharacteristics
tAV[µs]
IAV[A]
100101102103
100
101
102
103
25 °C
100 °C
150 °C
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
Diagram14:Typ.gatecharge
Qgate[nC]
VGS[V]
0 50 100 150 200 250
0
2
4
6
8
10
12
24 V
15 V
6 V
VGS=f(Qgate);ID=100Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Tj[°C]
VBR(DSS)[V]
-60 -20 20 60 100 140 180
28
29
30
31
32
33
34
VBR(DSS)=f(Tj);ID=1mA
Gate charge waveforms
10
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
5PackageOutlines
Figure1OutlinePG-TO263-7,dimensionsinmm/inches
11
OptiMOSª3Power-Transistor,30V
IPB009N03LG
Rev.2.0,2016-04-21Final Data Sheet
RevisionHistory
IPB009N03L G
Revision:2016-04-21,Rev.2.0
Previous Revision
Revision Date Subjects (major changes since last revision)
2.0 2016-04-21 Release of final version
TrademarksofInfineonTechnologiesAG
AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™,
EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™,
ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™,
PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™,
SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™.
TrademarksupdatedAugust2015
OtherTrademarks
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