1
FEATURES APPLICATIONS
1
2
3
45
6
7
8
PW PACKAGE
(TOP VIEW)
STAT
D0
D1
ILIM GND
IN2
OUT
IN1
DESCRIPTION/ORDERING INFORMATION
STAT
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A 0.1 µF
C2
0.1 µF
CLRL
IN1
2.8 V to 5.5 V
IN2
2.8 V to 5.5 V
RILIM
NC
Switch Status
R1
TPS2115A-Q1
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........................................................................................................................................................................................... SBVS124 NOVEMBER 2008
AUTO-SWITCHING POWER MULTIPLEXER
PCsQualified for Automotive Applications
PDAsTwo-Input One-Output Power Multiplexer With
Digital CamerasLow r
DS(on)
Switch...84 m (Typ)
ModemsReverse and Cross-Conduction Blocking
Cell PhonesWide Operating Voltage Range...2.8 V to 5.5 V
Digital RadiosLow Standby Current...0.5 µA (Typ)
MP3 PlayersLow Operating Current...55 µA (Typ)Adjustable Current LimitControlled Output Voltage Transition TimesLimit Inrush Current and Minimize OutputVoltage Hold-Up CapacitanceCMOS- and TTL-Compatible Control InputsManual and Auto-Switching Operating ModesThermal ShutdownAvailable in TSSOP-8 (PW) Package
The TPS2115A power multiplexer enables seamless transition between two power supplies, such as a batteryand a wall adapter, each operating at 2.8 V to 5.5 V and delivering up to 1 A. The TPS2115A includes extensiveprotection circuitry including user-programmable current limiting, thermal protection, inrush current control,seamless supply transition, cross-conduction blocking, and reverse-conduction blocking. These features greatlysimplify designing power multiplexer applications.
Figure 1. Typical Application
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
TRUTH TABLE
TPS2115A-Q1
SBVS124 NOVEMBER 2008 ...........................................................................................................................................................................................
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ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
40 ° C to 85 ° C TSSOP PW Reel of 2000 TPS2115AIPWRQ1 2115AQ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
D0 D1 V
I(IN2)
> V
I(IN1)
(1)
STAT OUT
(2)
0 0 X Hi-Z IN20 1 No 0 IN10 1 Yes Hi-Z IN21 0 X 0 IN11 1 X 0 Hi-Z
(1) X = don t care(2) The undervoltage lockout circuit causes the output OUT to go Hi-Z ifthe selected power supply does not exceed the IN1/IN2 UVLO, or ifneither of the supplies exceeds the internal V
DD
UVLO.
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTIONNAME NO.
D0 2 I
TTL- and CMOS-compatible input pins. Each pin has a 1- µA pullup. The Truth Table shows the functionalityof D0 and D1.D1 3 IGND 5 I Ground
Primary power switch input. The IN1 switch can be enabled only if the IN1 supply is above the UVLOIN1 8 I
threshold and at least one supply exceeds the internal V
DD
UVLO.Secondary power switch input. The IN2 switch can be enabled only if the IN2 supply is above the UVLOIN2 6 I
threshold and at least one supply exceeds the internal V
DD
UVLO.ILIM 4 I A resistor R
ILIM
from ILIM to GND sets the current limit I
L
to 500/R
ILIM
.OUT 7 O Power switch outputOpen-drain output that is Hi-Z if the IN2 switch is ON. STAT pulls low if the IN1 switch is ON or if OUT is Hi-ZSTAT 1 O
(i.e., EN is equal to logic 0).
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Q2 is ON
1STAT
Control
Logic
D1
D0
UVLO (IN1)
UVLO (IN2)
UVLO (VDD)
Q2 is ON Q1 is ON
_
+
_
++
0.6 V
EN2 EN1
Cross-Conduction
Detector
_
+
Q2
Q1
Charge
Pump
0.5 V
TPS2114A: k = 0.2%
TPS2115A: k = 0.1%
k* IO(OUT)
_
+
VO(OUT) > VI(INx) +
100 mV
_
+
IO(OUT)
Vf= 0 V
EN1
IN2
IN1
7
4
OUT
ILIM
Internal VDD
Vf= 0 V
VDD
ULVO
Thermal
Sense
1 µA
IN2
ULVO
1 µA
IN1
ULVO
8
6
2
3
5
IN1
IN2
D0
D1
GND
TPS2115A-Q1
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FUNCTIONAL BLOCK DIAGRAM
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ABSOLUTE MAXIMUM RATINGS
(1) (2)
ELECTROSTATIC DISCHARGE (ESD) PROTECTION
DISSIPATION RATINGS
RECOMMENDED OPERATING CONDITIONS
TPS2115A-Q1
SBVS124 NOVEMBER 2008 ...........................................................................................................................................................................................
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over operating free-air temperature range unless otherwise noted
V
I
Input voltage range IN1, IN2, D0, D1, ILIM 0.3 V to 6 VV
O
Output voltage range OUT, STAT 0.3 V to 6 VI
O(sink)
Output sink current STAT 5 mAI
O
Continuous output current 1.5 mAP
D
Continuous total power dissipation See Dissipation RatingsT
A
Operating free-air temperature range 40 ° C to 85 ° CT
J
Operating virtual-junction temperature range 40 ° C to 125 ° CT
stg
Storage temperature range 65 ° C to 150 ° CT
lead
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260 ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltages are with respect to GND.
MAX UNIT
Human-Body Model (HBM) 2000ESD Electrostatic discharge protection VCharged-Device Model (CDM) 500
DERATING FACTOR T
A
25 ° C T
A
= 70 ° C T
A
= 85 ° CPACKAGE
ABOVE T
A
= 25 ° C POWER RATING POWER RATING POWER RATING
TSSOP (PW) 3.9 mW/ ° C 387 mW 213 mW 155 mW
MIN MAX UNIT
V
I(IN2)
2.8 V 1.5 5.5IN1
V
I(IN2)
< 2.8 V 2.8 5.5V
I
Input voltage V
I(IN1)
2.8 V 1.5 5.5 VIN2
V
I(IN1)
< 2.8 V 2.8 5.5D0, D1 0 5.5V
IH
High-level input voltage D0, D1 2 VV
IL
Low-level input voltage D0, D1 0.7 VI
O
Current limit adjustment range OUT 0.63 1.25 AT
A
Operating free-air temperature 40 85 ° CT
J
Operating virtual-junction temperature range 40 125 ° C
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ELECTRICAL CHARACTERISTICS
TPS2115A-Q1
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........................................................................................................................................................................................... SBVS124 NOVEMBER 2008
over operating free-air temperature range, V
I(IN1)
= V
I(IN2)
= 5.5 V, R
ILIM
= 400 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Power Switch
(1)
V
I(IN1)
= V
I(IN2)
= 5.0 V 84 110
T
A
= 25 ° C, I
L
= 500 mA V
I(IN1)
= V
I(IN2)
= 3.3 V 84 110
V
I(IN1)
= V
I(IN2)
= 2.8 V 84 110Drain-source on-stater
DS(on)
mresistance (INx to OUT)
V
I(IN1)
= V
I(IN2)
= 5.0 V 150
T
A
= 85 ° C, I
L
= 500 mA V
I(IN1)
= V
I(IN2)
= 3.3 V 150
V
I(IN1)
= V
I(IN2)
= 2.8 V 150
Logic Inputs (D0 and D1)
D0 or D1 = high, sink current 1I
I
Input current at D0 or D1 µAD0 or D1 = low, source current 0.5 1.4 5
Supply and Leakage Currents
D1 = high, D0 = low (IN1 active), V
I(IN1)
= 5.5 V, V
I(IN2)
= 3.3 V, I
O(OUT)
= 0 A 55 90
D1 = high, D0 = low (IN1 active), V
I(IN1)
= 3.3 V, V
I(IN2)
= 5.5 V, I
O(OUT)
= 0 A 1 12Supply current from IN1 (operating) µAD0 = D1 = low (IN2 active), V
I(IN1)
= 5.5 V, V
I(IN2)
= 3.3 V, I
O(OUT)
= 0 A 75
D0 = D1 = low (IN2 active), V
I(IN1)
= 3.3 V, V
I(IN2)
= 5.5 V, I
O(OUT)
= 0 A 1
D1 = high, D0 = low (IN1 active), V
I(IN1)
= 5.5 V, V
I(IN2)
= 3.3 V, I
O(OUT)
= 0 A 1
D1 = high, D0 = low (IN1 active), V
I(IN1)
= 3.3 V, V
I(IN2)
= 5.5 V, I
O(OUT)
= 0 A 75Supply current from IN2 (operating) µAD0 = D1 = low (IN2 active), V
I(IN1)
= 5.5 V, V
I(IN2)
= 3.3 V, I
O(OUT)
= 0 A 1 12
D0 = D1 = low (IN2 active), V
I(IN1)
= 3.3 V, V
I(IN2)
= 5.5 V, I
O(OUT)
= 0 A 55 90
V
I(IN1)
= 5.5 V, V
I(IN2)
= 3.3 V 0.5 2Quiescent current from IN1 (standby) D0 = D1 = high (inactive), I
O(OUT)
= 0 A µAV
I(IN1)
= 3.3 V, V
I(IN2)
= 5.5 V 1
V
I(IN1)
= 5.5 V, V
I(IN2)
= 3.3 V 1Quiescent current from IN2 (standby) D0 = D1 = high (inactive), I
O(OUT)
= 0 A µAV
I(IN1)
= 3.3 V, V
I(IN2)
= 5.5 V 0.5 2
Forward leakage current from IN1 D0 = D1 = high (inactive), V
I(IN1)
= 5.5 V, IN2 open, V
O(OUT)
= 0 V (shorted),
0.1 5 µA(measured from OUT to GND) T
A
= 25 ° C
Forward leakage current from IN2 D0 = D1= high (inactive), V
I(IN2)
= 5.5 V, IN1 open, V
O(OUT)
= 0 V (shorted),
0.1 5 µA(measured from OUT to GND) T
A
= 25 ° C
Reverse leakage current to INx
D0 = D1 = high (inactive), V
I(INx)
= 0 V, V
O(OUT)
= 5.5 V, T
A
= 25 ° C 0.3 5 µA(measured from INx to GND)
Current Limit Circuit
R
ILIM
= 400 0.95 1.25 1.56Current limit accuracy AR
ILIM
= 700 0.47 0.71 0.99
t
d
Current limit settling time Time for short-circuit output current to settle within 10% of its steady state value 1 ms
I
I
Input current at ILIM V
I(ILIM)
= 0 V, I
O(OUT)
= 0 A 15 0 µA
UVLO
Falling edge 1.15 1.25IN1 and IN2 UVLO VRising edge 1.30 1.35
IN1 and IN2 UVLO hysteresis 30 57 65 mV
Falling edge 2.4 2.53Internal VDD UVLO (the higher of IN1
Vand IN2)
Rising edge 2.58 2.8
Internal VDD UVLO hysteresis 30 50 75 mV
UVLO deglitch for IN1, IN2 Falling edge 110 µs
Reverse Conduction Blocking
Minimum input-to-output D0 = D1 = high, V
I(INx)
= 3.3 V. Connect OUT to a 5-V supply through a seriesΔV
IO(blk)
voltage difference to block 1-k resistor. Set D0 = low. Slowly decrease the supply voltage until OUT 80 100 120 mVswitching connects to IN1.
(1) The TPS2115A can switch a voltage as low as 1.5 V as long as there is a minimum of 2.8 V at one of the input power pins. In thisspecific case, the lower supply voltage has no effect on the IN1 and IN2 switch on-resistances.
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SWITCHING CHARACTERISTICS
TPS2115A-Q1
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ELECTRICAL CHARACTERISTICS (continued)over operating free-air temperature range, V
I(IN1)
= V
I(IN2)
= 5.5 V, R
ILIM
= 400 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Thermal Shutdown
Thermal shutdown threshold TPS2115A is in current limit. 135 ° C
Recovery from thermal shutdown TPS2115A is in current limit. 125 ° C
Hysteresis 10 ° C
IN2-IN1 Comparators
Hysteresis of IN2-IN1 comparator 0.1 0.2 V
Deglitch of IN2-IN1 comparator
10 20 50 µs(both ↑↓)
STAT Output
I
leak
Leakage current V
O(STAT)
= 5.5 V 0.01 1 µA
V
sat
Saturation voltage I
I(STAT)
= 2 mA, IN1 switch is on 0.13 0.4 V
Deglitch timet
d
150 µs(falling edge only)
over operating free-air temperature range, V
I(IN1)
= V
I(IN2)
= 5.5 V, R
ILIM
= 400 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Power Switch
Output rise time from an T
A
= 25 ° C, C
L
= 1 µF, I
L
= 500 mA,t
r
V
I(IN1)
= V
I(IN2)
= 5 V 1 1.8 3 msenable See Figure 2 (a)
Output fall time from a T
A
= 25 ° C, C
L
= 1 µF, I
L
= 500 mA,t
f
V
I(IN1)
= V
I(IN2)
= 5 V 0.5 1 2 msdisable See Figure 2 (a)
IN1 to IN2 transition, V
I(IN1)
= 3.3 V,
T
A
= 85 ° C, C
L
= 10 µF, I
L
= 500 mA
40 60V
I(IN2)
= 5 V
[Measure transition time ast
t
Transition time µs10%-90% rise time or from 3.4 V toIN2 to IN1 transition, V
I(IN1)
= 5 V,
40 604.8 V on V
O(OUT)
], See Figure 2 (b)V
I(IN2)
= 3.3 V
Turn-on propagation delay V
I(IN1)
= V
I(IN2)
= 5 V, Measured from T
A
= 25 ° C, C
L
= 10 µF, I
L
= 500 mA,t
PLH1
1 msfrom enable enable to 10% of V
O(OUT)
See Figure 2 (a)
Turn-off propagation delay V
I(IN1)
= V
I(IN2)
= 5 V, Measured from T
A
= 25 ° C, C
L
= 10 µF, I
L
= 500 mA,t
PHL1
5 msfrom a disable disable to 90% of V
O(OUT)
See Figure 2 (a)
Logic 1 to Logic 0 transition on D1,Switch-over rising T
A
= 25 ° C, C
L
= 10 µF, I
L
= 500 mA,t
PLH2
V
I(IN1)
= 1.5 V, V
I(IN2)
= 5 V, V
I(D0)
= 0 V, 40 100 µspropagation delay See Figure 2 (c)Measured from D1 to 10% of V
O(OUT)
Logic 0 to Logic 1 transition on D1,Switch-over falling T
A
= 25 ° C, C
L
= 10 µF, I
L
= 500 mA,t
PHL2
V
I(IN1)
= 1.5 V, V
I(IN2)
= 5 V, V
I(D0)
= 0 V, 2 5 10 mspropagation delay See Figure 2 (c)Measured from D1 to 90% of V
O(OUT)
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PARAMETER MEASUREMENT INFORMATION
0 V 10%
90%
Switch Enabled
Switch Off Switch Off
90%
10%
3.3 V
5 V
Switch #1 Enabled Switch #2 Enabled
4.8 V
3.4 V
DO-D1
1.5 V 1.85 V
4.65 V
Switch #2 EnabledSwitch #1 Enabled Switch #1 Enabled
5 V
trtf
tPLH1 tPHL1
VO(OUT)
tt
VO(OUT)
VO(OUT)
DO-D1
tPLH2 tPHL2
(a)
(b)
(c)
DO-D1
TPS2115A-Q1
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Figure 2. Propagation Delays and Transition Timing Waveforms
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TYPICAL CHARACTERISTICS
V
2 V/div
I(D0)
t - Time - 1 ms/div
STAT
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A 0.1 µF
0.1 µF
50 W
5 V
3.3 V
400 W
f = 28 Hz
78% Duty Cycle
Output Switchover Response Test Circuit
OUTPUT SWITCHOVER RESPONSE
NC
1 µF
V
2 V/div
I(D1)
V
2 V/div
O(OUT)
t - Time - 2 ms/div
STAT
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A
5 V
3.3 V
f = 28 Hz
78% Duty Cycle
OUTPUT TURN-ON RESPONSE
Output Turn-On Response Test Circuit
NC
V
2 V/div
I(D0)
0.1 µF
0.1 µF
50 W
400 W
1 µF
V
2 V/div
I(D1)
V
2 V/div
O(OUT)
TPS2115A-Q1
SBVS124 NOVEMBER 2008 ...........................................................................................................................................................................................
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Figure 3.
Figure 4.
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Product Folder Link(s): TPS2115A-Q1
t - Time - 40 µs/div
VO(OUT)
2 V/div
VI(D1)
2 V/div
VI(DO)
2 V/div
Output Switchover Voltage Droop Test Circuit
OUTPUT SWITCHOVER VOLTAGE DROOP
STAT
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A 0.1 µF
0.1 µF
50 W
400 W
f = 580 Hz
90% Duty Cycle
5 V
NC
CL
CL= 1 µF
CL= 0 µF
TPS2115A-Q1
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........................................................................................................................................................................................... SBVS124 NOVEMBER 2008
TYPICAL CHARACTERISTICS (continued)
Figure 5.
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0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0.1 1 10 100
RL= 10 W
RL= 50 W
VI= 5 V
- Output Voltage Droop - V
CL- Load Capacitance - µF
OUTPUT SWITCHOVER VOLTAGE DROOP
vs
LOAD CAPACITANCE
STAT
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A
0.1 µF
0.1 µF
VI
400 W
0.1 µF 1 µF 10 µF 47 µF 100 µF
50 W10 W
f = 28 Hz
50% Duty Cycle
Output Switchover Voltage Droop T est Circuit
O(OUT)
DV
NC
TPS2115A-Q1
SBVS124 NOVEMBER 2008 ...........................................................................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)
Figure 6.
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Product Folder Link(s): TPS2115A-Q1
VO(OUT)
2V/Div
VI(IN1)
2V/Div
Auto Switchover Voltage Droop Test Circuit
t - Time - 250 µs/div
AUTO SWITCHOVER VOLTAGE DROOP
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A 0.1 µF
50 W
5 V
1 kW
400 W
3.3 V
VOUT
f = 220 Hz
20% Duty Cycle
STAT
75% less output voltage
droop compared to TPS2115
0.1 µF
10 µF
TPS2115A-Q1
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........................................................................................................................................................................................... SBVS124 NOVEMBER 2008
TYPICAL CHARACTERISTICS (continued)
Figure 7.
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TPS2115A-Q1
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TYPICAL CHARACTERISTICS (continued)
Figure 8.
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Product Folder Link(s): TPS2115A-Q1
-50 0 50 100 150
SWITCH ON-RESISTANCE
vs
JUNCTION TEMPERATURE
TJ- J unction Temperature - °C
60
80
100
120
140
160
180
- Switc h On-Resistance - m W
rDS(on)
2 3 4 5 6
SWITCH ON-RESISTANCE
vs
SUPPLY VOLTAGE
VI(INx) - Suppl y Voltage - V
80
85
90
95
100
105
110
115
120
- Switc h On-Resistance - m W
rDS(on)
40
42
44
46
48
50
52
54
56
58
60
2 3 4 5 6
IN1 SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VI(IN1) - Suppl y Voltage - V
I(IN1)- IN1 Suppl y Current - µA
IN1 Switch is ON
VI(IN2) = 0 V
IO(OUT) = 0 A
I
0.82
0.84
0.86
0.88
0.90
0.92
0.94
0.96
2 3 4 5 6
I(IN1)
IN1 SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VI(IN1) - IN1 Supply Voltage - V
Device Disabled
VI(IN2) = 0 V
IO(OUT) = 0 A
I- IN1 Suppl y Current - µA
TPS2115A-Q1
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TYPICAL CHARACTERISTICS (continued)
Figure 9. Figure 10.
Figure 11. Figure 12.
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0
0.2
0.4
0.6
0.8
1
1.2
-50 0 50 100 150
II(IN1) = 5.5 V
II(IN2) =3.3 V
SUPPLY CURRENT
vs
JUNCTION TEMPERATURE
TJ- J unction Temperature - °C
I(INx) Supply Current - µA-
VI(IN1) = 5.5 V
VI(IN2) = 3.3 V
IO(OUT) = 0 A
I
Device Disabled
0
10
20
30
40
50
60
70
80
-50 0 50 100 150
II(IN1)
II(IN2)
SUPPLY CURRENT
vs
JUNCTION TEMPERATURE
TJ- J unction Temperature - °C
IN1 Switch is ON
VI(IN1) = 5.5 V
VI(IN2) = 3.3 V
IO(OUT) = 0 A
I(INx) Supply Current - µA-
I
TPS2115A-Q1
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TYPICAL CHARACTERISTICS (continued)
Figure 13. Figure 14.
14 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2115A-Q1
APPLICATION INFORMATION
STAT
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A 0.1 µF
C2
0.1 µF
CLRL
IN1
2.8 V to 5.5 V
IN2
2.8 V to 5.5 V
RILIM
NC
Switch Status
R1
STAT
D0
D1
ILIM
IN1
OUT
IN2
GND
1
2
3
4
8
7
6
5
TPS2115A 0.1 µF
0.1 µF
CLRL
IN1
2.8 V to 5.5 V
IN2
2.8 V to 5.5 V
RILIM
Switch Status
R1
TPS2115A-Q1
www.ti.com
........................................................................................................................................................................................... SBVS124 NOVEMBER 2008
Some applications have two energy sources, one of which should be used in preference to another. Figure 15shows a circuit that will connect IN1 to OUT until the voltage at IN1 falls below a user-specified value. Once thevoltage on IN1 falls below this value, the TPS2115A will select the higher of the two supplies. This usually meansthat the TPS2115A will swap to IN2.
Figure 15. Auto-Selecting for a Dual Power Supply Application
In Figure 16 , the multiplexer selects between two power supplies based upon the D1 logic signal. OUT connectsto IN1 if D1 is logic 1; otherwise, OUT connects to IN2. The logic thresholds for the D1 terminal are compatiblewith both TTL and CMOS logic.
Figure 16. Manually Switching Power Sources
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TPS2115A-Q1
DETAILED DESCRIPTION
Auto-Switching Mode
Manual Switching Mode
N-Channel MOSFETs
Cross-Conduction Blocking
Reverse-Conduction Blocking
Charge Pump
Current Limiting
Output Voltage Slew-Rate Control
TPS2115A-Q1
SBVS124 NOVEMBER 2008 ...........................................................................................................................................................................................
www.ti.com
D0 equal to logic 1 and D1 equal to logic 0 selects the auto-switching mode. In this mode, OUT connects to thehigher of IN1 and IN2.
D0 equal to logic 0 selects the manual-switching mode. In this mode, OUT connects to IN1 if D1 is equal tologic 1, otherwise OUT connects to IN2.
Two internal high-side power MOSFETs implement a single-pole double-throw (SPDT) switch. Digital logicselects the IN1 switch, IN2 switch, or no switch (Hi-Z state). The MOSFETs have no parallel diodes sooutput-to-input current cannot flow when the FET is off. An integrated comparator prevents turn-on of a FETswitch if the output voltage is greater than the input voltage.
The switching circuitry ensures that both power switches will never conduct at the same time. A comparatormonitors the gate-to-source voltage of each power FET and allows a FET to turn on only if the gate-to-sourcevoltage of the other FET is below the turn-on threshold voltage.
When the TPS2115A switches from a higher-voltage supply to a lower-voltage supply, current can potentiallyflow back from the load capacitor into the lower-voltage supply. To minimize such reverse conduction, theTPS2115A will not connect a supply to the output until the output voltage has fallen to within 100 mV of thesupply voltage. Once a supply has been connected to the output, it will remain connected regardless of outputvoltage.
The higher of supplies IN1 and IN2 powers the internal charge pump. The charge pump provides power to thecurrent limit amplifier and allows the output FET gate voltage to be higher than the IN1 and IN2 supply voltages.A gate voltage that is higher than the source voltage is necessary to turn on the N-channel FET.
A resistor R
ILIM
from ILIM to GND sets the current limit to 500/R
ILIM
. Setting resistor R
ILIM
equal to zero is notrecommended as that disables current limiting.
The TPS2115A slews the output voltage at a slow rate when OUT switches to IN1 or IN2 from the Hi-Z state(see Truth Table). A slow slew rate limits the inrush current into the load capacitor. High inrush currents canglitch the voltage bus and cause a system to hang up or reset. It can also cause reliability issues such as pittingthe connector power contacts when hot-plugging a load such as a PCI card. The TPS2115A slews the outputvoltage at a much faster rate when OUT switches between IN1 and IN2. The fast rate minimizes the outputvoltage droop and reduces the output voltage hold-up capacitance requirement.
16 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2115A-Q1
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS2115AIPWRQ1 ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS2115A-Q1 :
Catalog: TPS2115A
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
PACKAGE OPTION ADDENDUM
www.ti.com 13-Jan-2009
Addendum-Page 1
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