TCP-4147UB-DT - ON SEMICONDUCTOR

July, 2018 − Rev. 1 1Publication Order Number:

TCP−4147UB/D

TCP-4147UB

4.7 pF Passive Tunable

Integrated Circuits (PTIC)

Introduction

ON Semiconductor’s PTICs have excellent RF performance and

power consumption, making them suitable for any mobile handset or

radio application. The fundamental building block of our PTIC

product line is a tunable material called ParaScant, based on Barium

Strontium Titanate (BST). PTICs have the ability to change their

capacitance from a supplied bias voltage generated by the Control IC.

The 4.7 pF ultra−high tuning PTICs are available as wafer-level chip

scale packages (WLCSP).

Key Features

•Ultra−High Tuning Range and Operation up to 24 V

•Usable Frequency Range: from 700 MHz to 2.7 GHz

•High Quality Factor (Q) for Low Loss

•High Power Handling Capability

•Compatible with PTIC Control IC TCC-10x, 20x

•WLCSP Package: 0.609 x 0.964 x 0.310 mm (4 bump)

•These devices are Pb−Free and RoHS Compliant

Typical Applications

•Multi-band, Multi-standard, Advanced and Simple Mobile Phones

•Tunable Antenna Matching Networks

•Tunable RF Filters

•Active Antennas

www.onsemi.com

MARKING DIAGRAM

Device Package Shipping†

ORDERING INFORMATION

TCP−4147UB−DT WLCSP4

(Pb−Free) 4000 Units /

7” Tape & Reel

FUNCTIONAL BLOCK DIAGRAM

PTIC Functional Block Diagram

PTIC

Bias

RF1 RF2

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer t o our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

WLCSP4

0.964x0.609

CASE 567LY

TCP−4147UB

www.onsemi.com

Figure 1. PTIC Functional Block Diagram

RF1

DC Bias 1

RF2

A1 A2

B1 B2

Table 1. SIGNAL DESCRIPTIONS

Ball / Pad Number Pin Name Description

A1 DC Bias 1 DC Bias Voltage

B1 RF2 RF Input / Output

A2 NC Not Connected

B2 RF1 RF Input / Output

TCP−4147UB

www.onsemi.com

TYPICAL SPECIFICATIONS

Representative Performance Data at 255C

Table 2. PERFORMANCE DATA

Parameter Min Typ Max Units

Operating Bias Voltage 1.0 24 V

Capacitance (Vbias = 2 V) 4.23 4.70 5.17 pF

Capacitance (Vbias = 24 V) 0.900 1.000 1.100 pF

Tuning Range (1 V - 24 V) 4.80 5.30 6.00

Tuning Range (2 V - 24 V) 4.20 4.70 5.30

Leakage Current (WLCSP) 0.5 mA

Operating Frequency 700 2700 MHz

Quality Factor @ 700 MHz, 10 V 90

Quality Factor @ 2.4 GHz, 10 V 60

IP3 (Vbias = 2 V) [1,3] 70 dBm

IP3 (Vbias = 24 V) [1,3] 85 dBm

2nd Harmonic (Vbias = 2 V) [2,3] -65 dBm

2nd Harmonic (Vbias = 24 V) [2,3] -80 dBm

3rd Harmonic (Vbias = 2 V) [2,3] -40 dBm

3rd Harmonic (Vbias = 24 V) [2,3] -70 dBm

Transition Time (Cmin ³ Cmax) [4] 80 ms

Transition Time (Cmax ³ Cmin) [4] 70 ms

1. f1 = 850 MHz, f2 = 860 MHz, Pin 25 dBm/Tone

2. 850 MHz, Pin +34 dBm

3. IP3 and Harmonics are measured in the shunt configuration in a 50 W environment

4. RFIN and RFOUT are both connected to DC ground

TCP−4147UB

www.onsemi.com

Representative performance data at 255C for 4.7 pF WLCSP Package

Figure 2. Capacitance Figure 3. Harmonic Power*

Figure 4. IP3* Figure 5. Q*

*Data shown is representative only.

Table 3. ABSOLUTE MAXIMUM RATINGS

Parameter Rating Units

Input Power +40 dBm

Bias Voltage +25 (Note 5) V

Operating Temperature Range −30 to +85 °C

Storage Temperature Range −55 to +125 °C

ESD − Human Body Model Class 1B JEDEC HBM Standard (Note 6)

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be af fected.

5. WLCSP: Recommended Bias Voltage not to exceed 24 V.

6. Class 1B defined as passing 500 V, but may fail after exposure to 1000 V ESD pulse.

TCP−4147UB

www.onsemi.com

ASSEMBLY CONSIDERATIONS AND REFLOW PROFILE

The following assembly considerations should be observed:

Cleanliness

These chips should be handled in a clean environment.

Electro-static Sensitivity

ON Semiconductor’s PTICs are ESD Class 1B sensitive.

The proper ESD handling procedures should be used.

Mounting

The WLCSP PTIC is fabricated for Flip Chip solder

mounting. Connectivity to the RF and Bias terminations on

the PTIC die is established through SAC305 solder balls

with 65 mm nominal height (45 mm to 85 mm height

variation). The PTIC die is RoHS-compliant and compatible

with lead-free soldering profile.

Molding

The PTIC die is compatible for over-molding or

under-fill. Figure 6. Reflow Profile

ORIENTATION OF THE PTIC FOR OPTIMUM LOSSES

When configuring the PTIC in your specific circuit

design, at least one of the RF terminals must be connected

to DC ground. If minimum transition times are required, DC

ground on both RF terminals is recommended. To minimize

losses, the PTIC should be oriented such that RF2 is at the

lower RF impedance of the two RF nodes. A shunt PTIC, for

example, should have RF2 connected to RF ground.

Figure 7. PTIC Orientation Functional Block

Diagram

Bias

RF ANT

RF1

(PTIC Pad)

RF2

(PTIC Pad)

TCP−4147UB

www.onsemi.com

PART NUMBER DEFINITION

Table 4. PART NUMBERS

Part Number

Capacitance

Package*

2 V 24 V

TCP−4147UB-DT 4.70 1.044 4-bump WLCSP

*See PTIC package dimensions on following page.

For information on device numbering and ordering codes,

please download the Device Nomenclature technical note

(TND310/D) from www.onsemi.com.

TCP−4147UB

www.onsemi.com

PACKAGE DIMENSIONS

WLCSP4, 0.964x0.609

CASE 567LY

ISSUE O

SEATING

PLANE

0.05 C

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. COPLANARITY APPLIES TO SPHERICAL

CROWNS OF SOLDER BALLS.

4. BACKSIDE TAPE APPLIED TO IMPROVE

PIN 1 MARKING.

2X DIM

AMIN MAX

0.275

MILLIMETERS

D0.964 BSC

b1 0.044 0.094

e0.420 BSC

0.345

ÈÈ

A B

PIN A1

REFERENCE

0.05 C

0.06 C

A1 C

0.045 0.085

0.609 BSC

0.05 C

2X TOP VIEW

SIDE VIEW

BOTTOM VIEW

NOTE 3

e1 0.400 BSC

b0.079 0.129

DETAIL A

DET AIL A

A0.05 BC

0.03 C

4X b

4X b1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

RECOMMENDED

DETAIL C

NOTE 4

TAPE

DIMENSIONS: MILLIMETERS

PACKAGE

OUTLINE

0.13

0.55

0.15

TCP−4147UB/D

ParaScan is a trademark of Paratek Microwave, Inc.

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor ’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer ’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body . Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

UBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your loc

Sales Representative

◊