e
EPAD
TM
®
N
A
B
L
E
D
E
ADVANCED
LINEAR
DEVICES, INC.
ALD110804/ALD110904
ORDERING INFORMATION
*N/C pins are internally connected.
Connect to V- to reduce noise
PC, SC PACKAGES
PA, SA PACKAGES
PIN CONFIGURATION
GENERAL DESCRIPTION
ALD110804/ALD110904 are monolithic quad/dual N-Channel MOSFETs
matched at the factory using ALD’s proven EPAD® CMOS technology.
These devices are intended for low voltage, small signal applications.
The ALD110804/ALD110904 MOSFETs are designed and built for ex-
ceptional device electrical characteristics matching. Since these devices
are on the same monolithic chip, they also exhibit excellent tempco tracking
characteristics. They are versatile circuit elements useful as design com-
ponents for a broad range of analog applications, such as basic building
blocks for current sources, differential amplifier input stages, transmis-
sion gates, and multiplexer applications. For most applications, connect
V- and N/C pins to the most negative voltage potential in the system and
V+ pin to the most positive voltage potential (or left open unused). All
other pins must have voltages within these voltage limits.
The ALD1 10804/ALD1 10904 devices are built for minimum offset voltage
and differential thermal response, and they are suited for switching and
amplifying applications in <+0.1V to +10V systems where low input bias
current, low input capacitance and fast switching speed are desired, as
these devices exhibit well controlled turn-off and sub-threshold charac-
teristics and can be biased and operated in the sub-threshold region.
Since these are MOSFET devices, they feature very large (almost infi-
nite) current gain in a low frequency, or near DC, operating environment.
The ALD110804/ALD110904 are suitable for use in very low operating
voltage or very low power (nanowatt), precision applications which re-
quire very high current gain, beta, such as current mirrors and current
sources. The high input impedance and the high DC current gain of the
Field Effect Transistors result from extremely low current loss through
the control gate. The DC current gain is limited by the gate input leakage
current, which is specified at 30pA at room temperature. For example,
DC beta of the device at a drain current of 3mA and input leakage current
of 30pA at 25°C is = 3mA/30pA = 100,000,000.
FEATURES
• Enhancement-mode (normally off)
• Precision Gate Threshold Voltage of +0.40V
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• Low input capacitance
• VGS(th) match (VOS) to 10mV
• High input impedance — 1012 typical
• Positive, zero, and negative VGS(th) temperature coefficient
• DC current gain >108
• Low input and output leakage currents
Operating Temperature Range*
0°C to +70°C0°C to +70°C
16-Pin 16-Pin 8-Pin 8Pin
Plastic Dip SOIC Plastic Dip SOIC
Package Package Package Package
ALD110804PC ALD110804SC ALD110904PA ALD110904SA
APPLICATIONS
• Ultra low power (nanowatt) analog and digital
circuits
• Ultra low operating voltage(<0.4V) circuits
• Sub-threshold biased and operated circuits
• Precision current mirrors and current sources
• Nano-Amp current sources
• High impedance resistor simulators
• Capacitive probes and sensor interfaces
• Differential amplifier input stages
• Discrete Voltage comparators and level shifters
• Voltage bias circuits
• Sample and Hold circuits
Analog and digital inverters
• Charge detectors and charge integrators
• Source followers and High Impedance buffers
• Current multipliers
• Discrete Analog switches / multiplexers
QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD®
MATCHED PAIR MOSFET ARRAY VGS(th)= +0.4V
N/C*
1
2
314
15
16
413
512
N/C*
6
7
8
10
11
GN1
DN1
N/C*
DN4
N/C*
GN4
9
GN3
DN3
DN2
GN2
V
+
S34
S12
V
-
V
+
V
-
ALD110804
M 4 M 3
M 1 M 2
V
-
V
-
V
-
V
-
V-
GN1
DN1
N/C*
S12
DN2
GN2
ALD110904
1
2
36
7
8
45
M 1 M 2
V-
N/C*
V-
V-
Rev 1.0-0506 ©2 005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
* Contact factory for industrial or military temp. ranges or user-specified threshold voltage values.
ALD110804/ALD110904 Advanced Linear Devices 2
Notes: 1 Consists of junction leakage currents
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, VDS 10.6V
Gate-Source voltage, VGS 10.6V
Power dissipation 500 mW
Operating temperature range PA, SA, PC, SC package 0°C to +70°C
Storage temperature range -65°C to +150°C
Lead temperature, 10 seconds +260°C
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V (or open) V- = GND TA = 25°C unless otherwise specified
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
Gate Threshold Voltage VGS(th) 0.38 0.40 0.42 V IDS =1µA
VDS = 0.1V
Offset Voltage VOS 210mV
VGS(th)1-VGS(th)2
Offset VoltageTempco TC VOS 5µV/ °CV
DS1 = VDS2
GateThreshold Voltage Tempco TCVGS(th) -1.7 mV/ °CI
D = 1µA
0.0 ID = 20µA, VDS = 0.1V
+1.6 ID = 40µA
On Drain Current IDS (ON) 12.0 mA VGS = + 9.7V
3.0 VGS = + 4.2V
VDS = +5V
Forward T ransconductance GFS 1.4 mmho VGS = + 4.2V
VDS = + 9.2V
Transconductance Mismatch GFS 1.8 %
Output Conductance GOS 68 µmho VGS =+4.2V
VDS = +9.2V
Drain Source On Resistance RDS (ON) 500 VDS = 0.1V
VGS = +4.2V
Drain Source On Resistance RDS (ON) 0.5 %
Mismatch
Drain Source Breakdown BVDSX 10 V IDS = 1.0µA
Voltage VGS = -0.8V
Drain Source Leakage Current1IDS (OFF) 10 100 pA VGS = -0.8V
4nAV
DS =10V, TA = 125 °C
Gate Leakage Current1IGSS 330pAV
DS = 0V VGS = 10V
1nAT
A =125°C
Input Capacitance CISS 2.5 pF
Transfer Reverse Capacitance CRSS 0.1 pF
Turn-on Delay Time ton 10 ns V+ = 5V RL= 5K
Turn-off Delay Time toff 10 ns V+ = 5V RL= 5K
Crosstalk 60 dB f = 100KHz
ALD110804 / ALD110904
Parameter Symbol Min Typ Max Unit Test Conditions