IR2130/IR2132(J)(S) & (PbF)
2www.irf.com
Symbol Definition Min. Max. Units
VB1,2,3 High Side Floating Supply Voltage -0.3 625
VS1,2,3 High Side Floating Offset Voltage VB1,2,3 - 25 VB1,2,3 + 0.3
VHO1,2,3 High Side Floating Output Voltage VS1,2,3 - 0.3 VB1,2,3 + 0.3
VCC Low Side and Logic Fixed Supply Voltage -0.3 25
VSS Logic Ground VCC - 25 VCC + 0.3
VLO1,2,3 Low Side Output Voltage -0.3 VCC + 0.3
VIN Logic Input Voltage (HIN1,2,3, LIN1,2,3 & ITRIP) VSS - 0.3 (VSS + 15) or
(VCC + 0.3)
whichever is
lower
VFLT FAULT Output Voltage VSS - 0.3 VCC + 0.3
VCAO Operational Amplifier Output Voltage VSS - 0.3 VCC + 0.3
VCA- Operational Amplifier Inverting Input Voltage VSS - 0.3 VCC + 0.3
dVS/dt Allowable Offset Supply Voltage Transient — 5 0 V/ns
PDPackage Power Dissipation @ TA ≤ +25°C (28 Lead DIP) — 1.5
(28 Lead SOIC) — 1.6 W
(44 Lead PLCC) — 2.0
RthJA Thermal Resistance, Junction to Ambient (28 Lead DIP) — 8 3
(28 Lead SOIC) — 7 8 °C/W
(44 Lead PLCC) — 63
TJJunction Temperature — 15 0
TSStorage Temperature -55 150
TLLead Temperature (Soldering, 10 seconds) — 3 00
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to VS0. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.
Note 1: Logic operational for VS of (VS0 - 5V) to (VS0 + 600V). Logic state held for VS of (VS0 - 5V) to (VS0 - VBS).
(Please refer to the Design Tip DT97-3 for more details).
Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode.
V
Symbol Definition Min. Max. Units
VB1,2,3 High Side Floating Supply Voltage VS1,2,3 + 10 VS1,2,3 + 20
VS1,2,3 High Side Floating Offset Voltage Note 1 600
VHO1,2,3 High Side Floating Output Voltage VS1,2,3 VB1,2,3
VCC Low Side and Logic Fixed Supply Voltage 10 20
VSS Logic Ground -5 5
VLO1,2,3 Low Side Output Voltage 0 VCC
VIN Logic Input Voltage (HIN1,2,3, LIN1,2,3 & ITRIP) VSS VSS + 5
VFLT FAULT Output Voltage VSS VCC
VCAO Operational Amplifier Output Voltage VSS VSS + 5
VCA- Operational Amplifier Inverting Input Voltage VSS VSS + 5
TAAmbient Temperature -40 125 °C
V
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to VS0. The VS offset rating is tested
with all supplies biased at 15V differential. T ypical ratings at other bias conditions are shown in Figure 54.
°C