– 1 –
E00Z51B82
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
ICX279AK
14 pin DIP (Plastic)
Description
The ICX279AK is an interline CCD solid-state
image sensor suitable for PAL color video cameras
with a diagonal 4.5mm (Type 1/4) system. Compared
with the current product ICX209AK, basic
characteristics such as sensitivity, smear and
dynamic range are improved drastically through the
adoption of EXview HAD CCDTM technology.
This chip features a field period readout system and
an electronic shutter with variable charge-storage time.
The package is a 10mm-square 14-pin DIP (Plastic).
EXview HAD CCDTM has different spectral
characteristics from the current CCD.
Features
High sensitivity (+5dB compared with the ICX209AK)
Low smear (–20dB compared with the ICX209AK)
High D range (+2dB compared with the ICX209AK)
Horizontal register: 3.3 to 5.0V drive
Reset gate: 3.3 to 5.0V drive
No voltage adjustment
(Reset gate and substrate bias need no adjustment.)
High resolution, low smear and low dark current
Excellent antiblooming characteristics
Continuous variable-speed shutter
Recommended range of exit pupil distance: –20 to –100mm
Ye, Cy, Mg, and G complementary color mosaic filters on chip
Device Structure
Interline CCD image sensor
Image size: Diagonal 4.5mm (Type 1/4)
Number of effective pixels: 752 (H) × 582 (V) approx. 440K pixels
Total number of pixels: 795 (H) × 596 (V) approx. 470K pixels
Chip size: 4.43mm (H) ×3.69mm (V)
Unit cell size: 4.85µm (H) × 4.65µm (V)
Optical black: Horizontal (H) direction: Front 3 pixels, rear 40 pixels
Vertical (V) direction: Front 12 pixels, rear 2 pixels
Number of dummy bits: Horizontal 22
Vertical 1 (even fields only)
Substrate material: Silicon
Optical black position
(Top View)
2
12
V
H
Pin 1
Pin 8 40
3
EXview HAD CCD is a trademark of Sony Corporation.
EXview HAD CCD is a CCD that drastically improves light efficiency by including near infrared light region as a basic structure of
HAD (Hole-Accumulation-Diode) sensor.
TM
Diagonal 4.5mm (Type 1/4) CCD Image Sensor for PAL Color Video Cameras
– 2 –
ICX279AK
USE RESTRICTION NOTICE (December 1, 2003 ver.)
This USE RESTRICTION NOTICE ("Notice") is for customers who are considering or currently using the CCD
products ("Products") set forth in this specifications book. Sony Corporation ("Sony") may, at any time, modify
this Notice which will be available to you in the latest specifications book for the Products. You should abide by
the latest version of this Notice. If a Sony subsidiary or distributor has its own use restriction notice on the
Products, such a use restriction notice will additionally apply between you and the subsidiary or distributor. You
should consult a sales representative of the subsidiary or distributor of Sony on such a use restriction notice
when you consider using the Products.
Use Restrictions
The Products are intended for incorporation into such general electronic equipment as office products,
communication products, measurement products, and home electronics products in accordance with the
terms and conditions set forth in this specifications book and otherwise notified by Sony from time to time.
You should not use the Products for critical applications which may pose a life- or injury- threatening risk or
are highly likely to cause significant property damage in the event of failure of the Products. You should
consult your Sony sales representative beforehand when you consider using the Products for such critical
applications. In addition, you should not use the Products in weapon or military equipment.
Sony disclaims and does not assume any liability and damages arising out of misuse, improper use,
modification, use of the Products for the above-mentioned critical applications, weapon and military
equipment, or any deviation from the requirements set forth in this specifications book.
Design for Safety
Sony is making continuous efforts to further improve the quality and reliability of the Products; however,
failure of a certain percentage of the Products is inevitable. Therefore, you should take sufficient care to
ensure the safe design of your products such as component redundancy, anti-conflagration features, and
features to prevent mis-operation in order to avoid accidents resulting in injury or death, fire or other social
damage as a result of such failure.
Export Control
If the Products are controlled items under the export control laws or regulations of various countries, approval
may be required for the export of the Products under the said laws or regulations. You should be responsible
for compliance with the said laws or regulations.
No License Implied
The technical information shown in this specifications book is for your reference purposes only. The
availability of this specifications book shall not be construed as giving any indication that Sony and its
licensors will license any intellectual property rights in such information by any implication or otherwise. Sony
will not assume responsibility for any problems in connection with your use of such information or for any
infringement of third-party rights due to the same. It is therefore your sole legal and financial responsibility to
resolve any such problems and infringement.
Governing Law
This Notice shall be governed by and construed in accordance with the laws of Japan, without reference to
principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating to this
Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the court of first
instance.
Other Applicable Terms and Conditions
The terms and conditions in the Sony additional specifications, which will be made available to you when you
order the Products, shall also be applicable to your use of the Products as well as to this specifications book.
You should review those terms and conditions when you consider purchasing and/or using the Products.
– 3 –
ICX279AK
Block Diagram and Pin Configuration
(Top View)
V
OUT
GND
Vφ
1
Vφ
2
Vφ
3
Vφ
4
V
DD
GND
φSUB
V
L
RG
Hφ
1
Hφ
2
NC
Cy
Cy
Mg
G
Cy
Mg
Cy
Cy
Mg
G
Cy
Mg
Ye
Ye
G
Mg
Ye
G
Ye
Ye
G
Mg
Ye
G
7 6 5 4 3 2 1
8 9 10 11 12 13 14
Note)
Note) : Photo sensor
Horizontal Register
Vertical Register
Pin No. Symbol Description Pin No. Symbol Description
1
2
3
4
5
6
7
Vφ4
Vφ3
Vφ2
Vφ1
NC
GND
VOUT
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
Signal output
8
9
10
11
12
13
14
VDD
GND
φSUB
VL
RG
Hφ1
Hφ2
Supply voltage
GND
Substrate clock
Protective transistor bias
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
Pin Description
Absolute Maximum Ratings
1+24V (Max.) when clock width < 10µs, clock duty factor < 0.1%.
Item
VDD, VOUT, RG – φSUB
Vφ1, Vφ3φSUB
Vφ2, Vφ4, VLφSUB
Hφ1, Hφ2, GND – φSUB
VDD, VOUT, RG – GND
Vφ1, Vφ2, Vφ3, Vφ4 – GND
Hφ1, Hφ2 – GND
Vφ1, Vφ3VL
Vφ2, Vφ4, Hφ1, Hφ2, GND – VL
Voltage difference between vertical clock input pins
Hφ1 – Hφ2
Hφ1, Hφ2Vφ4
Against φSUB
Against GND
Against VL
Between input clock
pins
Storage temperature
Operating temperature
–40 to +8
–50 to +15
–50 to +0.3
–40 to +0.3
–0.3 to +18
–10 to +18
–10 to +6
–0.3 to +28
–0.3 to +15
to +15
–5 to +5
–13 to +13
–30 to +80
–10 to +60
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
1
Ratings Unit Remarks
– 4 –
ICX279AK
Bias Conditions
1VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL
power supply for the V driver should be used.
2Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated
within the CCD.
Supply voltage
Protective transistor bias
Substrate clock
Reset gate clock
Item
VDD
VL
φSUB
φRG
Symbol
15.0
1
2
2
Min.
V
Unit RemarksTyp. Max.
14.55 15.45
DC Characteristics
Supply current
Item
IDD
Symbol
4
Min. Unit RemarksTyp. Max.
mA6
Clock Voltage Conditions
Readout clock voltage
Vertical transfer clock
voltage
Horizontal transfer
clock voltage
Reset gate clock
voltage
Substrate clock voltage
Item
VVT
VVH1, VVH2
VVH3, VVH4
VVL1, VVL2,
VVL3, VVL4
VφV
VVH3VVH
VVH4VVH
VVHH
VVHL
VVLH
VVLL
VφH
VHL
VφRG
VRGLHVRGLL
VRGLVRGLm
VφSUB
Symbol
14.55
–0.05
–0.2
–8.0
6.3
–0.25
–0.25
3.0
–0.05
3.0
21.0
Min.
15.0
0
0
–7.0
7.0
3.3
0
3.3
22.0
Typ.
15.45
0.05
0.05
–6.5
8.05
0.1
0.1
0.3
0.3
0.3
0.3
5.25
0.05
5.5
0.4
0.5
23.5
Max. Unit
1
2
2
2
2
2
2
2
2
2
2
3
3
4
4
4
5
Waveform
diagram
VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)
High-level coupling
High-level coupling
Low-level coupling
Low-level coupling
Input through 0.1µF
capacitance
Low-level coupling
Low-level coupling
Remarks
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
– 5 –
ICX279AK
Horizontal transfer clock equivalent circuitVertical transfer clock equivalent circuit
Reset gate clock equivalent circuit
Hφ
1
Hφ
2
Cφ
H1
Cφ
H2
Cφ
HH
Rφ
H
Rφ
H
Vφ
1
Cφ
V12
Vφ
2
Vφ
4
Vφ
3
Cφ
V34
Cφ
V23
Cφ
V41
Cφ
V13
Cφ
V24
Cφ
V1
Cφ
V2
Cφ
V4
Cφ
V3
R
GND
R
4
R
1
R
3
R
2
Rφ
RG
RGφ
Cφ
RG
Clock Equivalent Circuit Constant
CφV1, CφV3
CφV2, CφV4
CφV12, CφV34
CφV23, CφV41
CφV13
CφV24
CφH1, CφH2
CφHH
CφRG
CφSUB
R1, R2, R3, R4
RGND
RφH
RφRG
Symbol
Capacitance between vertical transfer clock
and GND
Capacitance between vertical transfer clocks
Capacitance between horizontal transfer clock
and GND
Capacitance between horizontal transfer clocks
Capacitance between reset gate clock and GND
Capacitance between substrate clock and GND
Vertical transfer clock series resistor
Vertical transfer clock ground resistor
Horizontal transfer clock series resistor
Reset gate clock series resistor
Item Min.
1200
680
220
150
82
75
22
36
5
180
82
15
12
51
Typ. Max.
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
Ω
Ω
Ω
Ω
Unit Remarks
– 6 –
ICX279AK
Drive Clock Waveform Conditions
(1) Readout clock waveform
(2) Vertical transfer clock waveform
VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)
100%
90%
10%
0% tr tf 0V
twh
φM
2
φM
V
VT
VVH1 VVHH
VVHL
VVH
VVLH
VVL1
VVLL
VVHL
VVHH
VVL
VVHH VVH
VVLH
VVLL
VVL
VVHL
VVL3
VVHL
VVH3
VVHH
VVH2
VVHH
VVHH
VVHL
VVHL
VVH
VVLH
VVL2
VVLL
VVL
VVH
VVL
VVHL
VVLH
VVLL
VVHL
VVH4
VVHH VVHH
VVL4
Vφ1Vφ3
Vφ2Vφ4
– 7 –
ICX279AK
(3) Horizontal transfer clock waveform
(4) Reset gate clock waveform
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and
VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the interval twh, then:
VφRG = VRGHVRGL
Negative overshoot level during the falling edge of RG is VRGLm.
(5) Substrate clock waveform
100%
90%
10%
0%
V
SUB
(A bias generated within the CCD) tr tftwh
φM
2
φM
Vφ
SUB
tr twh tf
90%
10%
twl
Vφ
H
V
HL
Point A
twl
VφRG
VRGH
VRGL
VRGLH
RG waveform
VRGLL
Hφ1 waveform
twhtr tf
VφH/2 [V]
VRGLm
– 8 –
ICX279AK
Clock Switching Characteristics
Min.
twh
Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
twl tr tf
2.3
26
26
11
1.5
2.5
28.5
28.5
5.38
13
1.8
26
26
28.5
28.5
5.38
51
0.5
6.5
6.5
0.01
0.01
3
9.5
9.5
0.5
15
0.5
6.5
6.5
0.01
0.01
3
250
9.5
9.5
0.5
Unit
µs
ns
ns
µs
ns
µs
Remarks
During
readout
1
2
When draining
charge
Item
Readout clock
Vertical transfer
clock
During
imaging
During
parallel-serial
conversion
Reset gate clock
Substrate clock
Symbol
VT
Vφ1, Vφ2,
Vφ3, Vφ4
Hφ1
Hφ2
Hφ1
Hφ2
φRG
φSUB
Horizontal
transfer clock
1When vertical transfer clock driver CXD1267AN is used.
2When VφH = 3.0V. tf tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2
waveforms must be at least VφH/2 [V].
3The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
Min.
two
Typ. Max.
22 26
Unit
ns
RemarksItem
Horizontal transfer clock
Symbol
Hφ1, Hφ23
– 9 –
ICX279AK
Zone Definition of Video Signal Shading
Measurement System
Note) Adjust the amplifier gain so that the gain between [A] and [Y] , and between [A] and [C] equals 1.
12
V
10
12
8
6
Ignored region
Effective pixel region
Zone 0, I
Zone II, II'
V
10
H
8
H
8
752 (H)
582 (V)
CCD C.D.S
LPF1
AMP
CCD signal output Y signal output
Chroma signal output
(3dB down 6.3MHz)
(3dB down 1MHz)
[C]
S/H
S/H
LPF2
[Y]
[A]
Image Sensor Characteristics (Ta = 25°C)
Item
Sensitivity
Sensitivity ratio
Saturation signal
Smear
Video signal shading
Uniformity between video
signal channels
Dark signal
Dark signal shading
Flicker Y
Flicker R-Y
Flicker B-Y
Line crawl R
Line crawl G
Line crawl B
Line crawl W
Lag
Symbol
S
RMgG
RYeCy
Ysat
Sm
SHy
ΔSr
ΔSb
Ydt
ΔYdt
Fy
Fcr
Fcb
Lcr
Lcg
Lcb
Lcw
Lag
Min.
640
0.93
1.15
900
Typ.
800
–108
Max.
1.35
1.53
–100
20
25
10
10
2
1
2
5
5
3
3
3
3
0.5
Unit
mV
mV
dB
%
%
%
%
mV
mV
%
%
%
%
%
%
%
%
Measurement method
1
2
2
3
4
5
5
6
6
7
8
9
9
9
10
10
10
10
11
Remarks
Ta = 60°C
Zone 0 and I
Zone 0 to II'
Ta = 60°C
Ta = 60°C
– 10 –
ICX279AK
Image Sensor Characteristics Measurement Method
Measurement conditions
1) In the following measurements, the device drive conditions are at the typical values of the bias and clock
voltage conditions.
2) In the following measurements, spot pixels are excluded and, unless otherwise specified, the optical black
level (OB) is used as the reference for the signal output, which is taken as the value of Y signal output or
chroma signal output of the measurement system.
Color coding of this image sensor & Composition of luminance (Y) and chroma (color difference) signals
As shown in the left figure, fields are read out. The charge is
mixed by pairs such as A1 and A2 in the A field. (pairs such
as B in the B field)
As a result, the sequence of charges output as signals from
the horizontal shift register (Hreg) is, for line A1, (G + Cy),
(Mg + Ye), (G + Cy), and (Mg + Ye).
These signals are processed to form the Y signal and chroma (color difference) signal. The Y signal is formed
by adding adjacent signals, and the chroma signal is formed by subtracting adjacent signals. In other words,
the approximation:
Y = {(G + Cy) + (Mg + Ye)} × 1/2
= 1/2 {2B + 3G + 2R}
is used for the Y signal, and the approximation:
R – Y = {(Mg + Ye) – (G + Cy)}
= {2R – G}
is used for the chroma (color difference) signal. For line A2, the signals output from Hreg in sequence are
(Mg + Cy), (G + Ye), (Mg + Cy), (G + Ye).
The Y signal is formed from these signals as follows:
Y = {(G + Ye) + (Mg + Cy)} × 1/2
= 1/2 {2B + 3G + 2R}
This is balanced since it is formed in the same way as for line A1.
In a like manner, the chroma (color difference) signal is approximated as follows:
– (B – Y) = {(G + Ye) – (Mg + Cy)}
= – {2B – G}
In other words, the chroma signal can be retrieved according to the sequence of lines from R – Y and – (B – Y)
in alternation. This is also true for the B field.
Cy Ye Cy Ye
GMgGMg
Cy Ye Cy Ye
Mg G Mg G
B
A1
A2
Hreg
Color Coding Diagram
– 11 –
ICX279AK
Definition of standard imaging conditions
1) Standard imaging condition I:
Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern
for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter
and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the
standard sensitivity testing luminous intensity.
2) Standard imaging condition II:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted
to the value indicated in each testing item by the lens diaphragm.
3) Standard imaging condition III:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens (exit pupil distance –33mm) with CM500S (t = 1.0mm) as an IR cut filter. The
luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.
1. Sensitivity
Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of
1/250s, measure the Y signal (Ys) at the center of the screen and substitute the value into the following
formula.
S = Ys × [mV]
2. Sensitivity ratio
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, and then measure the Mg signal output (SMg [mV]) and G signal output (SG [mV]), and Ye
signal output (SYe [mV]) and Cy signal output (SCy [mV]) at the center of the screen with frame readout
method. Substitute the values into the following formula.
RMgG = SMg/SG
RYeCy = SYe /SCy
3. Saturation signal
Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with
average value of the Y signal output, 200mV, measure the minimum value of the Y signal.
4. Smear
Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to
500 times the intensity with average value of the Y signal output, 200mV. When the readout clock is stopped
and the charge drain is executed by the electronic shutter at the respective H blankings, measure the
maximum value (YSm [mV]) of the Y signal output and substitute the value into the following formula.
Sm = 20 × log × × [dB] (1/10V method conversion value)
250
50
1
10
1
500
YSm
200
– 12 –
ICX279AK
5. Video signal shading
Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity
so that the average value of the Y signal output is 200mV. Then measure the maximum (Ymax [mV]) and
minimum (Ymin [mV]) values of the Y signal and substitute the values into the following formula.
SHy = (Ymax – Ymin)/200 × 100 [%]
6. Uniformity between video signal channels
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, and then measure the maximum (Crmax, Cbmax [mV]) and minimum (Crmin, Cbmin
[mV]) values of the R – Y and B – Y channels of the chroma signal and substitute the values into the
following formula.
ΔSr = | (Crmax – Crmin)/200 | × 100 [%]
ΔSb = | (Cbmax – Cbmin)/200 | × 100 [%]
7. Dark signal
Measure the average value of the Y signal output (Ydt [mV]) with the device ambient temperature 60°C and
the device in the light-obstructed state, using the horizontal idle transfer level as a reference.
8. Dark signal shading
After measuring 7, measure the maximum (Ydmax [mV]) and minimum (Ydmin [mV]) values of the Y signal
output and substitute the values into the following formula.
ΔYdt = Ydmax – Ydmin [mV]
9. Flicker
1) Fy
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, and then measure the difference in the signal level between fields (ΔYf [mV]). Then
substitute the value into the following formula.
Fy = (ΔYf/200) × 100 [%]
2) Fcr, Fcb
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, insert an R or B filter, and then measure both the difference in the signal level between
fields of the chroma signal (ΔCr, ΔCb) as well as the average value of the chroma signal output (CAr, CAb).
Substitute the values into the following formula.
Fci = (ΔCi/CAi) × 100 [%] (i = r, b)
– 13 –
ICX279AK
10. Line crawls
Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal
output is 200mV, and then insert a white subject and R, G, and B filters and measure the difference
between Y signal lines for the same field (ΔYlw, ΔYlr, ΔYlg, ΔYlb [mV]). Substitute the values into the
following formula.
Lci = (ΔYli/200) × 100 [%] (i = w, r, g, b)
11. Lag
Adjust the Y signal output value generated by strobe light to 200mV. After setting the strobe light so that it
strobes with the following timing, measure the residual signal (Ylag). Substitute the value into the following
formula.
Lag = (Ylag/200) × 100 [%]
Light
Y signal output 200mV Ylag (lag)
FLD
V1
Strobe light
timing
Output
– 14 –
ICX279AK
Drive Circuit
22/16V
0.1
–7.0V
3.3/16V
1/35V 0.1
1M
Hφ1
Hφ2
RG
VL
φSUB
GND
VDD
Vφ4
Vφ3
Vφ2
Vφ1
NC
VOUT
22/20V
CCD OUT
15V
XSUB
XV2
XV1
XSG1
XV3
XSG2
XV4
Hφ1
Hφ2
RG
2200p
100k
3.3/20V
0.01
100
3.9k
2SK523
GND
ICX279
(BOTTOM VIEW)
CXD1267AN
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1 2 3 4 5 6 7
14 13 12 11 10 9 8
– 15 –
ICX279AK
Spectral Sensitivity Characteristics (excludes both lens characteristics and light source characteristics)
Sensor Readout Clock Timing Chart
Unit: µs
Odd Field
Even Field
V1
V2
V3
V4
V1
V2
V3
V4
2.6
2.6 2.6 2.6
33.6 1.5
0.2
650600550500450400
Wave Length [nm]
Relative Response
1.0
0.8
0.6
0.4
0.2
0
700
Ye
G
Cy
Mg
– 16 –
ICX279AK
Drive Timing Chart (Vertical Sync)
FLD
VD
BLK
HD
V1
V2
V3
V4
CCD
OUT
620
625
1
2
3
4
5
15
20
25
310
320
335
330
340
581
582 135
246
135
246 582
581 2
1
4
3
6
5
10
315
325
2
1
4
3
6
5
– 17 –
ICX279AK
Drive Timing Chart (Horizontal Sync)
745
750
1
3
5
10
20
30
40
1
2
3
5
10
20
22
1
2
3
1
2
3
10
20
752
HD
BLK
H1
H2
RG
V1
V2
V3
V4
SUB
– 18 –
ICX279AK
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W
soldering iron with a ground wire and solder each pin in less than 2 seconds. For repairs and remount,
cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and dirt protection
Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and
dirt. Clean glass plates with the following operation as required, and use them.
a) Perform all assembly operations in a clean room (class 1000 or less).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
e) When a protective tape is applied before shipping, just before use remove the tape applied for
electrostatic protection. Do not reuse the tape.
4) Installing (attaching)
a) Remain within the following limits when applying a static load to the package. Do not apply any load
more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to
limited portions. (This may cause cracks in the package.)
Plastic package
Cover glass
Compressive strength
50N50N 1.2Nm
Torsional strength
– 19 –
ICX279AK
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the
package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for
installation, use either an elastic load, such as a spring plate, or an adhesive.
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated
voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area,
and indicated values should be transferred to the other locations as a precaution.
d) The notch of the package is used for directional index, and that can not be used for reference of fixing.
In addition, the cover glass and seal resin may overlap with the notch of the package.
e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be
generated by the fragments of resin.
f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-acrylate
instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference)
5) Others
a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high
luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the
image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such
a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-
off mode should be properly arranged. For continuous using under cruel condition exceeding the normal
using condition, consult our company.
b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD
characteristics.
d) This package has 2 kinds of internal structure. However, their package outline, optical size, and strength
are the same.
The cross section of lead frame can be seen on the side of the package for structure A.
Structure A Structure B
Chip
Metal plate
(lead frame)
Package
Cross section of
lead frame
– 20 –
ICX279AK
Sony Corporation
Package Outline Unit: mm
2.5
7.0
2.5
1.0
0.5
5.0
14
5.0
18.9 7
10.0 ± 0.1
8.9
10.0 ± 0.1
8
10.16
0.25
814
71
1.7
1.7
7.0 2.5
1.0
3.35 ± 0.15
2.6
3.5 ± 0.3
1.27
0.3
0.46
1.27
14 pin DIP (400mil)
0.3
V
H
1. “A” is the center of the effective image area.
2. The two points “B” of the package are the horizontal reference.
The point “B'” of the package is the vertical reference.
3. The bottom “C” of the package, and the top of the cover glass “D” are the height reference.
4. The center of the effective image area relative to “B” and “B'” is (H, V) = (5.0, 5.0) ± 0.15mm.
5. The rotation angle of the effective image area relative to H and V is ± 1˚.
6. The height from the bottom “C” to the effective image area is 1.41 ± 0.10mm.
The height from the top of the cover glass “D” to the effective image area is 1.94 ± 0.15mm.
7. The tilt of the effective image area relative to the bottom “C” is less than 25µm.
The tilt of the effective image area relative to the top “D” of the cover glass is less than 25µm.
8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5.
9. The notch of the package is used only for directional index, that must not be used for reference
of fixing.
10. Cover glass defect
Edge part
Length : no matter, Width : less than 0.5mm, Depth : less than the thickness of the glass.
Corner part
Length : less than 1.5mm, Depth : less than the thickness of the glass.
C
D
B
A
B'
~
~
~
M
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
Plastic
GOLD PLATING
42 ALLOY
0.60g
DRAWING NUMBER AS-D3-02(E)
0˚ to 9˚