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PA04
USA BeO
TE949311
12
9
1
56
8
10
11
7
2
4
3
SLEEP
+V
BOOST
Q10
–IN
Q14 Q15
Q21
–V
BOOST
COMP
Q22
+IN
Q20
COMP
Q17
D1 Q5
Q12
Q19
Q26
Q18
Q13
+Vs
Q6
I
LIM
I
LIM
OUT
Q7
–Vs
D5 D6
D2
D3
D7 D9
D8
D4
TYPICAL APPLICATION
The high power bandwidth and high voltage output of the
PA04 allows driving sonar transducers via a resonant circuit
including the transducer and a matching transformer. The load
circuit appears resistive to the PA04. Control logic turns off the
amplifier in sleep mode.
Sonar Transducer Driver
EXTERNAL CONNECTIONS
PHASE COMPENSATION
Gain CCRC
1 470pF 120
>3 220pF 120
10 100pF 120
CC RATED FOR FULL SUPPLY VOLTAGE
*See “BOOST OPERATION” paragraph.
CONTROL
LOGIC
ULTRA-
SONIC
DRIVE
R
f
R
i
112
27
10 11 R
CL
TUNED
TRANSFORMER
PA04
TOP
VIEW
-INPUT
+INPUT
SLEEP
CURRENT LIMIT
CURRENT LIMIT
C
C
R
C
1
2
3
4
5
6
12
11
10
9
8
7
TOP
VIEW
COMP
-V
BOOST
-SUPPLY
+V
BOOST
+SUPPLY
OUTPUT
*
*
COMP
FEATURES
HIGH INTERNAL DISSIPATION — 200 WATTS
HIGH VOLTAGE, HIGH CURRENT — 200V, 20A
HIGH SLEW RATE — 50V/µS
4 WIRE CURRENT LIMIT SENSING
LOW DISTORTION
EXTERNAL SLEEP MODE CONTROL
OPTIONAL BOOST VOLTAGE INPUTS
EVALUATION KIT — SEE EK04
APPLICATIONS
SONAR TRANSDUCER DRIVER
LINEAR AND ROTARY MOTOR DRIVES
YOKE/MAGNETIC FIELD EXCITATION
PROGRAMMABLE POWER SUPPLIES TO ±95V
AUDIO UP TO 400W
DESCRIPTION
The PA04 is a high voltage MOSFET power operational
amplifier that extends the performance limits of power ampli-
fiers in slew rate and power bandwidth, while maintaining high
current and power dissipation ratings.
The PA04 is a highly flexible amplifier. The sleep mode
feature allows ultra-low quiescent current for standby opera-
tion or load protection by disabling the entire amplifier. Boost
voltage inputs allow the small signal portion of the amplifier to
operate at a higher voltage than the high current output stage.
The amplifier is then biased to achieve close linear swings to
the supply rails at high currents for extra efficient operation.
External compensation tailors performance to user needs. A
four wire sense technique allows precision current limiting
without the need to consider internal or external milliohm
parasitic resistance in the output line.
The JEDEC MO-127 12-pin Power Dip™ package (see
Package Outlines) is hermetically sealed and isolated from the
internal circuits. The use of compressible thermal washers will
void product warranty.
EQUIVALENT SCHEMATIC
HTTP://WWW.APEXMICROTECH.COM (800) 546-APEX (800) 546-2739
MICROTECHNOLOGY
POWER OPERATIONAL AMPLIFIERS
PA04 • PA04A
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +VS to –VS200V
BOOST VOLTAGE SUPPLY VOLTAGE +20V
OUTPUT CURRENT, within SOA 20A
POWER DISSIPATION, internal 200W
INPUT VOLTAGE, differential ±20V
INPUT VOLTAGE, common mode ±VS
TEMPERATURE, pin solder - 10s 300°C
TEMPERATURE, junction2150°C
TEMPERATURE, storage –65 to +150°C
OPERATING TEMPERATURE RANGE, case –55 to +125°C
PA04 PA04A
SPECIFICATIONS
PARAMETER TEST CONDITIONS1MIN TYP MAX MIN TYP MAX UNITS
INPUT
OFFSET VOLTAGE, initial 5 10 2 5 mV
OFFSET VOLTAGE, vs. temperature Full temperature range 30 50 10 30 µV/°C
OFFSET VOLTAGE, vs. supply 15 * µV/V
OFFSET VOLTAGE, vs. power Full temperature range 30 10 µV/W
BIAS CURRENT, initial 10 50 5 20 pA
BIAS CURRENT, vs. supply .01 * pA/V
OFFSET CURRENT, initial 10 50 5 20 pA
INPUT IMPEDANCE, DC 1011 *
INPUT CAPACITANCE 13 * pF
COMMON MODE VOLTAGE RANGE Full temperature range ±VB-8 * V
COMMON MODE REJECTION, DC Full temp. range, VCM = ±20V 86 98 * * dB
INPUT NOISE 100kHz BW, RS = 1K10 * µVrms
GAIN
OPEN LOOP, @ 15Hz Full temperature range, CC = 100pF 94 102 * * dB
GAIN BANDWIDTH PRODUCT IO = 10A 2 * MHz
POWER BANDWIDTH RL = 4.5, VO = 180V p-p 90 * kHz
CC = 100pF, RC = 120
PHASE MARGIN Full temperature range 60 * °
OUTPUT
VOLTAGE SWING IO = 15A ±VS-8.8 ±VS-7.5 * * V
VOLTAGE SWING VBOOST = Vs + 5V, IO = 20A ±VS-6.8 ±VS-5.5 * * V
CURRENT, peak 20 * A
SETTLING TIME to .1% AV = 1, 10V step, RL = 42.5 * µs
SLEW RATE AV = 10, CC = 100pF, RC = 12040 50 * V/µs
CAPACITIVE LOAD Full temperature range, AV = +1 10 * nF
RESISTANCE 2*
POWER SUPPLY
VOLTAGE Full temperature range ±15 ±75 ±100 * * * V
CURRENT, quiescent, boost supply 30 40 * * mA
CURRENT, quiescent, total 70 90 * * mA
CURRENT, quiescent, total, sleep mode Full temperature range 3 5 * * mA
THERMAL
RESISTANCE, AC, junction to case3Full temperature range, F>60Hz .3 .4 * * °C/W
RESISTANCE, DC, junction to case Full temperature range, F<60Hz .5 .6 * * °C/W
RESISTANCE4, junction to air Full temperature range 12 * °C/W
TEMPERATURE RANGE, case Meets full range specification –25 85 * * °C
PA04A
PA04
NOTES: * The specification of PA04A is identical to the specification for PA04 in applicable column to the left.
1. Unless otherwise noted: TC = 25°C, CC = 470pF, RC = 120 ohms. DC input specifications are ± value given. Power supply
voltage is typical rating. ±VBOOST = ±VS.
2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF. For guidance, refer to the heatsink data sheet.
3. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz.
4. The PA04 must be used with a heatsink or the quiescent power may drive the unit to junction temperatures higher than 150°C.
The PA04 is constructed from MOSFET transistors. ESD handling procedures must be observed.
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
CAUTION
APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL prodlit@apexmicrotech.com
TYPICAL PERFORMANCE
GRAPHS PA04 PA04A
C
A
C
L
Q
O
O
0 25 50 75 100 125 150
TEMPERATURE, T (°C)
0
50
150
POWER DERATING
INTERNAL POWER DISSIPATION, P(W)
100 1K 10M
FREQUENCY F (Hz)
0
POWER SUPPLY REJECTION
–50 0 75 125
CASE TEMPERATURE, T (°C)
NORMALIZED CURRENT LIMIT, (%)
10 10M
FREQUENCY,Ff (Hz)
0
120
SMALL SIGNAL GAIN
OPEN LOOP GAIN RESPONSE, A(dB)
40
80
FREQUENCY, F (Hz)
SMALL SIGNAL PHASE
0 5 15 20
2
VOLTAGE DROP FROM SUPPLY, V
S
–V
O
(V)
30 300 30K
FREQUENCY, F (Hz)
.001
.02
.2
HARMONIC DISTORTION
DISTORTION, THD (%)
.002
.01
.1
30 200
TOTAL SUPPLY VOLTAGE, V (V)
.8
.9
1.2
QUIESCENT CURRENT
NORMALIZED QUIESCENT CURRENT, I (X)
1.0
1.1
10K 50K 1M
FREQUENCY, F (Hz)
20
60
180
200
POWER RESPONSE
OUTPUT VOLTAGE, V (V
PP
)
O
80
100
10 FREQUENCY, F (Hz)
0
COMMON MODE REJECTION
COMMON MODE REJECTION, CMR (dB)
40
80
100
1M100 1K 0 10 15
TIME, t (µs)
–5
0
PULSE RESPONSE
OUTPUT VOLTAGE, V (V)
30520
100 200
EXT. COMPENSATION CAPACITOR C (pF)
0
60
SLEW RATE
SLEW RATE, SR (V/µs)
40
100 1K 3K 10K 20K .6M
40
25
CURRENT LIMIT
50
60
70
10 10K 100K 1M
100
200
OUTPUT VOLTAGE SWING
10
50 100 150
20
–7.5
1 100 1K 10K100K 1M
20
40
60
80
100
300 400 500
OPEN LOOP PHASE, (°)Φ
100 10M1 10 1K 10K 100K 1M
–180
–135
–90
–45
0
4
6
8
10
12
OUTPUT CURRENT, I (A)
O
10K 100K
–2.5
2.5
5
7.5
O
–25 25 100
80
90
100
110
120
130
C
.005
.05
S
.2M
120
150
20
60
T = T
T = T
R
C
= 120
R
L
= 4
V = V
S
V = V
S
+ 5V
A = +1
A = 10
R =4
C = 100pF, R = 120
±Vs = 62V
C
R =120
R = 4.0
L
C = 470pF
C
C = 220pF
C
C = 100pF
C
C = 470pF
C
V
P = 200W
O
P = 1W
V
P = 300W
R
C
= 120
R
L
= 4
C
C
BOOST
BOOST
POWER SUPPLY REJECTION, PSR (dB)
4 LOAD
R
C
= 120
C
C
= 470pF
C
C
= 100pF
C
C
= 220pF
C
C
= 470pF
C
C
= 220pF
C
C
= 100pF
OPERATING
CONSIDERATIONS
PA04 PA04A
GENERAL
Please read the “General Operating Considerations” sec-
tion, which covers stability, supplies, heatsinking, mounting,
current limit, SOA interpretation, and specification interpreta-
tion. Additional information can be found in the application
notes. For information on the package outline, heatsinks, and
mounting hardware, consult the “Accessory and Package
Mechanical Data” section of the handbook. The EK04 Evalu-
ation Kit makes prototype circuits a snap by providing an
EK04PC proto circuit board, MS05 mating socket, HS11
heatsink and hardware kit.
CURRENT LIMIT
The two current limit sense lines are to be connected directly
across the current limit sense resistor. For the current limit to
work correctly pin 11 must be connected to the amplifier
output side and pin 10 connected to the load side of the
current limit resistor, RCL, as shown in Figure 1. This
connection will bypass any parasitic resistances, Rp, formed
by sockets and solder joints as well as internal amplifier losses.
The current limiting resistor may not be placed anywhere in the
output circuit except where shown in Figure 1.
The value of the current limit resistor can be calculated as
follows: .76
RCL =
ILIMIT
SAFE OPERATING AREA (SOA)
The MOSFET output stage of this power operational ampli-
fier has two distinct limitations:
1. The current handling capability of the MOSFET geometry
and the wire bonds.
2. The junction temperature of the output MOSFETs.
NOTE: The output stage is protected against transient flyback.
However, for protection against sustained, high energy
flyback, external fast-recovery diodes should be used.
SLEEP MODE OPERATION
In the sleep mode, pin 12 (sleep) is tied to pin 9 (+VBOOST).
This disables the amplifier’s internal reference and the ampli-
fier shuts down except for a trickle current of 3 mA which flows
into pin 12. Pin 12 should be left open if the sleep mode is not
required.
Several possible circuits can be built to take advantage of
this mode. In Figure 2A a small signal relay is driven by a logic
gate. This removes the requirement to deal with the common
mode voltage that exists on the shutoff circuitry since the sleep
mode is referenced to the +VBOOST voltage.
In Figure 2B, circuitry is used to level translate the sleep
mode input signal. The differential input activates sleep mode
with a differential logic level signal and allows common mode
voltages to ±VBOOST.
BOOST OPERATION
With the VBOOST feature the small signal stages of the
amplifier are operated at higher supply voltages than the
amplifier’s high current output stage. +VBOOST (pin 9) and
–VBOOST (pin 5) are connected to the small signal circuitry of the
amplifier. +VS (pin 8) and –VS (pin 6) are connected to the high
current output stage. An additional 5V on the VBOOST pins is
sufficient to allow the small signal stages to drive the output
transistors into saturation and improve the output voltage
swing for extra efficient operation when required. When close
swings to the supply rails is not required the +VBOOST and +VS
pins must be strapped together as well as the –VBOOST and –VS
pins. The boost voltage pins must not be at a voltage lower than
the VS pins.
COMPENSATION
The external compensation components CC and RC are
connected to pins 3 and 4. Unity gain stability can be achieved
at any compensation capacitance greater than 330 pF with at
least 60 degrees of phase margin. At higher gains more phase
shift can be tolerated in most designs and the compensation
capacitance can accordingly be reduced, resulting in higher
bandwidth and slew rate. Use the typical operating curves as
a guide to select CC and RC for the application.
Figure 2A. Sleep mode circuit.
LOGIC K1 9
12
9
12
+V
BOOST
SLEEP
+V
BOOST
SLEEP
560
470 Q1
1K
Q2
–V
BOOST
470
LOGIC
INPUT
+
-
Figure 2B.
Sleep mode circuit.
R
f
R
i
1
2
10 11 R
CL
PA04
R
P
R
L
CL CL
INPUT 7
Figure 1.
Current Limit.
5.0
2.0
.5
.22SUPPLY TO OUTPUT DIFFERENTIAL (V)
OUTPUT CURRENT (A)
5 10 20 50 200
20
DC Tc = 125°C
DC Tc = 85°C
DC Tc = 25°C
t = 10ms
t = 1ms
10
100
1.0
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
PA04U REV. I DECEMBER 1997 © 1997 Apex Microtechnology Corp.