© Semiconductor Components Industries, LLC, 2017
September, 2019 − Rev. 7 1Publication Order Number:
NCP134/D
500 mA, Very Low Dropout
Bias Rail CMOS Voltage
Regulator
NCP134
The NCP134 is a 500 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (VBIAS). The device
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
NCP134 features low IQ consumption. The XDFN4 1.2 mm x 1.2 mm
package is optimized for use in space constrained applications.
Features
•Input Voltage Range: 0.8 V to 5.5 V
•Bias Voltage Range: 2.4 V to 5.5 V
•Fixed Voltage Versions Available
•Output Voltage Range: 0.8 V to 2.1 V (Fixed)
•±1.5% Accuracy over Temperature, 0.5% VOUT @ 25°C
•Ultra−Low Dropout: Max. 150 mV at 500 mA, 1.1 V Output, 3.3 V
Bias, 85°C
•Very Low Bias Input Current of Typ. 80 mA
•Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA
•Logic Level Enable Input for ON/OFF Control
•Output Active Discharge Option Available
•Stable with a 2.2 mF Ceramic Capacitor
•Available in XDFN4 − 1.2 mm x 1.2 mm x 0.4 mm Package
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
•Battery−powered Equipment
•Smartphones, Tablets
•Cameras, DVRs, STB and Camcorders
BIAS
IN
EN
OUT
GND
2.2 mF
VOUT
1 V up to 500 mA
VBIAS
>2.7 V
VIN
1.5 V
VEN
1 mF
100 nF NCP134
Figure 1. Typical Application Schematics
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See detailed ordering, marking and shipping information on
page 10 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAM
XDFN4
CASE 711BC
PIN CONNECTIONS
T
(Top View)
IN EN
OUT BIAS
GND
1
XX = Specific Device Code
M = Date Code
XXM
1
43
12
5
NCP134
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PIN FUNCTION DESCRIPTION
Pin No.
XDFN4 Pin Name Description
1 OUT Regulated Output Voltage pin
2 BIAS Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage
Lockout Circuit.
3 EN Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
shutdown mode.
4 IN Input Voltage Supply pin
5 GND Ground
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) VIN −0.3 to 6 V
Output Voltage VOUT −0.3 to (VIN+0.3) ≤ 6 V
Chip Enable, Bias Input VEN, VBIAS −0.3 to 6 V
Output Short Circuit Duration tSC unlimited s
Maximum Junction Temperature TJ150 °C
Storage Temperature TSTG −55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V
ESD Capability, Machine Model (Note 2) ESDMM 200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, XDFN4 1.2 mm x 1.2 mm
Thermal Resistance, Junction−to−Air (Note 3) RqJA 170 °C/W
3. This data was derived by thermal simulations for a single device mounted on the 40 mm x 40 mm x 1.6 mm FR4 PCB with 2−ounce 800 sq
mm copper area on top and bottom.
NCP134
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ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VBIAS = 2.7 V or (VOUT + 1.6 V), whichever is greater, VIN = VOUT(NOM) +
0.3 V, IOUT = 1 mA, VEN = 1 V, unless otherwise noted. CIN = 1 mF, COUT = 2.2 mF. Typical values are at TJ = +25°C. Min/Max values are
for −40°C ≤ TJ ≤ 85°C unless otherwise noted. (Note 4)
Parameter Test Conditions Symbol Min Typ Max Unit
Operating Input Voltage
Range VIN VOUT +
VDO 5.5 V
Operating Bias Voltage
Range VBIAS (VOUT +
1.40) ≥ 2.4 5.5 V
Undervoltage Lock−out VBIAS Rising
Hysteresis UVLO 1.6
0.2 V
Output Voltage Accuracy VOUT ±0.5 %
Output Voltage Accuracy −40°C ≤ TJ ≤ 85°C, VOUT(NOM) + 0.3 V ≤ VIN ≤
VOUT(NOM) + 1.0 V, 2.7 V or (VOUT(NOM) +
1.6 V), whichever is greater < VBIAS < 5.5 V,
1 mA < IOUT < 500 mA
VOUT −1.5 +1.5 %
VIN Line Regulation VOUT(NOM) + 0.3 V ≤ VIN ≤ 5.0 V LineReg 0.01 %/V
VBIAS Line Regulation 2.7 V or (VOUT(NOM) + 1.6 V), whichever is
greater < VBIAS < 5.5 V LineReg 0.01 %/V
Load Regulation IOUT = 1 mA to 500 mA LoadReg 1.5 mV
VIN Dropout Voltage IOUT = 150 mA (Note 5) VDO 37 75 mV
IOUT = 500 mA (Note 5) VDO 140 250
VIN Dropout Voltage NCP134AMX110TCG device, VOUT(NOM) =
1.1 V, VBIAS = 3.3 V, IOUT = 500 mA (Note 5) VDO 100 150
VBIAS Dropout Voltage IOUT = 500 mA, VIN = VBIAS (Notes 5, 6) VDO 1.1 1.5 V
Output Current Limit VOUT = 90% VOUT(NOM) ICL 550 800 1000 mA
Bias Pin Operating Current VBIAS = 2.7 V IBIAS 80 110 mA
Bias Pin Disable Current VEN ≤ 0.4 V IBIAS(DIS) 0.5 1 mA
Vinput Pin Disable Current VEN ≤ 0.4 V IVIN(DIS) 0.5 1 mA
EN Pin Threshold Voltage EN Input Voltage “H” VEN(H) 0.9 V
EN Input Voltage “L” VEN(L) 0.4
EN Pull Down Current VEN = 5.5 V IEN 0.3 1 mA
T urn−On Time From assertion of VEN to VOUT =
98% VOUT(NOM). VOUT(NOM) = 1.0 V tON 150 ms
Power Supply Rejection
Ratio VIN to VOUT, f = 1 kHz, IOUT = 150 mA,
VIN ≥ VOUT +0.5 V PSRR(VIN) 70 dB
VBIAS to VOUT, f = 1 kHz, IOUT = 150 mA,
VIN ≥ VOUT +0.5 V PSRR(VBIAS) 80 dB
Output Noise Voltage VIN = VOUT +0.5 V, VOUT(NOM) = 1 V,
f = 10 Hz to 100 kHz VN40 mVRMS
Thermal Shutdown
Threshold Temperature increasing 160 °C
Temperature decreasing 140
Output Discharge
Pull−Down VEN ≤ 0.4 V, VOUT = 0.5 V, NCP134A options
only RDISCH 150 W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance g uaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM).
6. For output voltages below 0.9 V, VBIAS dropout voltage does not apply due to a minimum Bias operating voltage of 2.4 V.
NCP134
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TYPICAL CHARACTERISTICS
At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 mA,
CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 2.2 mF (effective capacitance), unless otherwise noted.
Figure 3. VIN Dropout Voltage vs. IOUT and
Temperature TJ
IOUT, OUTPUT CURRENT (mA)
3002001000
0
20
40
60
80
100
120
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
+125°C
+25°C
−40°C
Figure 4. VIN Dropout Voltage vs. (VBIAS −
VOUT) and Temperature TJ
VBIAS − VOUT (V)
4.03.53.02.52.01.51.00.5
0
20
60
80
120
140
180
200
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
4.5
IOUT = 100 mA
40
100
160
140
160
180
200
+85°C
400 500
+125°C+25°C−40°C
+85°C
Figure 5. VIN Dropout Voltage vs. (VBIAS −
VOUT) and Temperature TJ
VBIAS − VOUT (V)
4.03.53.02.52.01.51.00.5
0
50
100
200
250
4.5
150
300
+125°C
+25°C−40°C
IOUT = 300 mA
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
+85°C
Figure 6. VIN Dropout Voltage vs. (VBIAS −
VOUT) and Temperature TJ
VBIAS − VOUT (V)
4.03.53.02.52.01.51.00.5
0
50
150
200
300
350
450
500
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
4.5
IOUT = 500 mA
100
250
400
+125°C
+25°C−40°C
+85°C
Figure 7. VBIAS Dropout Voltage vs. IOUT and
Temperature TJ
IOUT, OUTPUT CURRENT (mA)
3002001000
900
1000
1100
1200
1300
1400
VDO (VBIAS − VOUT) DROPOUT VOLTAGE (mV)
+125°C
+25°C
−40°C
25015050
+85°C
Figure 8. BIAS Pin Current vs. IOUT and
Temperature TJ
IOUT, OUTPUT CURRENT (mA)
5002001000
0
20
60
80
120
140
IBIAS (mA)
40
100
25015050
+125°C
+85°C
−40°C+25°C
1500
300 350 400 450
NCP134
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TYPICAL CHARACTERISTICS
At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 mA,
CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 2.2 mF (effective capacitance), unless otherwise noted.
Figure 9. BIAS Pin Current vs. VBIAS and
Temperature TJ
VBIAS (V)
5.04.54.0 5.53.53.02.52.0
0
20
60
80
100
140
180
200
IBIAS (mA)
+125°C
+85°C
−40°C
40
120
160
+25°C
Figure 10. Current Limit vs. (VBIAS − VOUT)
VBIAS − VOUT (V)
4.54.03.02.51.51.00.50
0
100
300
400
500
700
1000
ICL, CURRENT LIMIT (mA)
+125°C
+25°C
−40°C
2.0 3.5 5.0
200
600
+85°C
800
900
Figure 11. VIN Dropout Voltage vs. IOUT and
Temperature TJ
IOUT, OUTPUT CURRENT (mA)
3002001000
0
20
40
60
80
100
120
VDO (VIN − VOUT) DROPOUT VOLTAGE (mV)
+25°C
140
160
180
200
+85°C
400 500
NCP134AMX110TCG device,
VOUT(NOM) = 1.1 V, VBIAS = 3.3 V
NCP134
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TYPICAL CHARACTERISTICS
At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 mA,
CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 2.2 mF (effective capacitance), unless otherwise noted.
50 mV/div200 mA/div
Figure 12. Load Transient Response,
IOUT = 50 mA to 500 mA, COUT = 10 mF
50 ms/div
tR = tF = 1 ms
IOUT
VOUT
Figure 13. Load Transient Response,
IOUT = 50 mA to 500 mA, COUT = 2.2 mF
50 ms/div
VOUT
Figure 14. Load Transient Response,
IOUT = 1 mA to 500 mA, COUT = 10 mFFigure 15. Load Transient Response,
IOUT = 1 mA to 500 mA, COUT = 2.2 mF
IOUT
tR = tF = 1 ms
50 mV/div200 mA/div
50 mV/div200 mA/div
500 ms/div
tR = tF = 1 ms
IOUT
VOUT
500 ms/div
VOUT
IOUT
tR = tF = 1 ms
50 mV/div200 mA/div
Figure 16. Enable Turn−on Response,
Output Resistive Load 500 mA, COUT = 10 mF
200 mV/div 1 V/div
IOUT
100 ms/div
VENABLE
VOUT
Figure 17. Enable Turn−on Response,
IOUT = 0 mA, COUT = 2.2 mF
100 ms/div
200 mA/div
200 mV/div 1 V/div
VENABLE
VOUT
NCP134
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TYPICAL CHARACTERISTICS
At TJ = +25°C, VIN = VOUT(TYP) + 0.3 V, VBIAS = 2.7 V, VEN = VBIAS, VOUT(NOM) = 1.0 V, IOUT = 500 mA,
CIN = 1 mF, CBIAS = 0.1 mF, and COUT = 2.2 mF (effective capacitance), unless otherwise noted.
10 mV/div1 V/div
Figure 18. VIN Line Transient Response,
VIN = 1.3 V to 2.3 V, IOUT = 100 mA, COUT = 10 mF
20 ms/div
tR = tF = 5 ms
VIN
VOUT
Figure 19. VIN Line Transient Response,
VIN = 1.3 V to 2.3 V, IOUT = 100 mA, COUT = 2.2 mF
20 ms/div
VOUT
VIN
tR = tF = 5 ms
10 mV/div1 V/div
NCP134
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APPLICATIONS INFORMATION
IN
EN FB
LX
GND
Processor
I/O
BIAS
IN
OUT
GND
NCP134
LOAD
VBAT
1.5 V
1.0 V
To other circuits
I/O
EN
Figure 20. Typical Application: Low−Voltage DC/DC Post−Regulator with ON/OFF Functionality
Switch−mode DC/DC
VOUT = 1.5 V
The NCP134 dual−rail very low dropout voltage regulator
is using NMOS pass transistor for output voltage regulation
from VIN voltage. All the low current internal control
circuitry is powered from the VBIAS voltage.
The use of an NMOS pass transistor offers several
advantages i n applications. Unlike PMOS topology devices,
the output capacitor has reduced impact on loop stability.
Vin to Vout operating voltage difference can be very low
compared with standard PMOS regulators in very low Vin
applications.
The NCP134 offers smooth monotonic start-up. The
controlled voltage rising limits the inrush current.
The Enable (EN) input is equipped with internal
hysteresis. NCP134 Voltage linear regulator Fixed version
is available.
Dropout Voltage
Because of two power supply inputs VIN and VBIAS and
one VOUT regulator output, there are two Dropout voltages
specified.
The first, the VIN Dropout voltage is the voltage
difference (VIN – VOUT) when VOUT starts to decrease by
percent specified in the Electrical Characteristics table.
VBIAS is high enough; specific value is published in the
Electrical Characteristics table.
The second, VBIAS dropout voltage is the voltage
difference (VBIAS – VOUT) when VIN and VBIAS pins are
joined together and VOUT starts to decrease.
Input and Output Capacitors
The device is designed to be stable for ceramic output
capacitors with Effective capacitance in the range from
2.2 mF to 10 mF. The device is also stable with multiple
capacitors in parallel, having the total effective capacitance
in the specified range.
In applications where no low input supplies impedance
available (PCB inductance in VIN and/or VBIAS inputs as
example), the recommended CIN = 1 mF and CBIAS = 0.1 mF
or greater. Ceramic capacitors are recommended. For the
best performance all the capacitors should be connected to
the NCP134 respective pins directly in the device PCB
copper layer, not through vias having not negligible
impedance.
When using small ceramic capacitor, their capacitance is
not constant but varies with applied DC biasing voltage,
temperature and tolerance. The effective capacitance can be
much lower than their nominal capacitance value, most
importantly in negative temperatures and higher LDO
output voltages. That is why the recommended Output
capacitor capacitance value is specified as Effective value in
the specific application conditions.
Enable Operation
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table i n this data sheet. If the enable function is not to be used
then the pin should be connected to VIN or VBIAS.
Current Limitation
The internal Current Limitation circuitry allows the
device to supply the full nominal current and surges but
protects the device against Current Overload or Short.
Thermal Protection
Internal thermal shutdown (TSD) circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When TSD activated , the
regulator output turns of f. When cooling down under the low
temperature threshold, device output is activated again. This
TSD feature is provided to prevent failures from accidental
overheating.
Activation of the thermal protection circuit indicates
excessive power dissipation or inadequate heatsinking. For
reliable operation, junction temperature should be limited to
+125°C maximum.
NCP134
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ORDERING INFORMATION
Device
Nominal
Output
Voltage Marking Option Package Shipping†
NCP134AMX080TCG 0.80 V GG
Output Active
Discharge XDFN4
(Pb−Free) 3000 / Tape & Reel
NCP134AMX085TCG 0.85 V GL
NCP134AMX090TCG 0.90 V GF
NCP134AMX100TCG 1.00 V GA
NCP134AMX105TCG 1.05 V GC
NCP134AMX110TCG 1.10 V GD
NCP134AMX120TCG 1.20 V GE
NCP134AMX135TCG 1.35 V GJ
NCP134AMX150TCG 1.50 V GH
NCP134AMX180TCG 1.80 V GK
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-
cifications Brochure, BRD8011/D.
To order other package and voltage variants, please contact your ON Semiconductor sales representative
ÉÉ
ÉÉ
XDFN4 1.2x1.2, 0.8P
CASE 711BC
ISSUE O
DATE 15 SEP 2015
SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A B
E
D
PIN ONE
REFERENCE
TOP VIEW
A1
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
1
DIM MIN MAX
MILLIMETERS
A0.35 0.45
A1 0.00 0.05
A3 0.13 REF
b0.25 0.35
E2 0.58 0.68
e0.80 BSC
L0.25 0.35
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MOUNTING FOOTPRINT*
RECOMMENDED
GENERIC
MARKING DIAGRAM*
XX = Specific Device Code
M = Date Code
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
XXM
1
NOTE 4
b1 0.15 0.25
L1 0.13 0.23
E1.15 1.25
D2 0.58 0.68
D1.15 1.25
A
45 5
0.80 PITCH
0.48
0.35
4X
DIMENSIONS: MILLIMETERS
0.22
PACKAGE
OUTLINE
1
1.50 4X
4X
0.63
2X
C 0.195
0.25
b4X
NOTE 3
L
4X
A
M
0.05 BC
(0.12)4X
DETAIL A
4X
DETAIL B
SIDE VIEW
A3
(0.12)
ALTERNATE
DETAIL B
CONSTRUCTION
D2
BOTTOM VIEW
e
12
e/2
43
DETAIL A b1
L1
E2
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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