1. General description
The TDA8922B is a high efficiency class-D audio power amplifier with very low
dissipation. The typical output power is 2 ×50 W.
The device is available in the HSOP24 power package and in the DBS23P through-hole
power package. The amplifier operates over a wide supply voltage range from ±12.5 V
to ±30 V and consumes a very low quiescent current.
2. Features
Zero dead time switching
Advanced current protection: output current limiting
Smooth start-up: no pop-noise due to DC offset
High efficiency
Operating supply voltage from ±12.5 V to ±30 V
Low quiescent current
Usable as a stereo Single-Ended (SE) amplifier or as a mono amplifier in Bridge-Tied
Load (BTL)
Fixed gain of 30 dB in Single-Ended (SE) and 36 dB in Bridge-Tied Load (BTL)
High supply voltage ripple rejection
Internal switching frequency can be overruled by an external clock
Full short-circuit proof across load and to supply lines
Thermally protected.
3. Applications
Television sets
Home-sound sets
Multimedia systems
All mains fed audio systems
Car audio (boosters).
TDA8922B
2× 50 W class-D power amplifier
Rev. 01 — 1 October 2004 Preliminary data sheet
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Preliminary data sheet Rev. 01 — 1 October 2004 2 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
4. Quick reference data
5. Ordering information
Table 1: Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
General; VP=±26 V
VPsupply voltage ±12.5 ±26 ±30 V
Iq(tot) total quiescent
supply current no load; no filter; no
RC-snubber network
connected
- 5065mA
Stereo single-ended configuration
Pooutput power RL=6; THD = 10 %;
VP=±26 V -50-W
RL=8; THD = 10 %;
VP=±21 V -25-W
Mono bridge-tied load configuration
Pooutput power RL=8; THD = 10 %;
VP=±21 V -88-W
Table 2: Ordering information
Type number Package
Name Description Version
TDA8922BTH HSOP24 plastic; heatsink small outline package; 24 leads; low
stand-off height SOT566-3
TDA8922BJ DBS23P plastic DIL-bent-SIL power package; 23 leads
(straight lead length 3.2 mm) SOT411-1
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Preliminary data sheet Rev. 01 — 1 October 2004 3 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
6. Block diagram
(1) Pin numbers in parenthesis refer to the TDA8922BJ.
Fig 1. Block diagram.
coa022
OUT1
VSSP1
VDDP2
DRIVER
HIGH
OUT2
BOOT2
TDA8922BTH
(TDA8922BJ)
BOOT1
DRIVER
LOW
RELEASE1
SWITCH1
ENABLE1
CONTROL
AND
HANDSHAKE
PWM
MODULATOR
MANAGER
OSCILLATOR TEMPERATURE SENSOR
CURRENT PROTECTION
VOLTAGE PROTECTION
STABI
MODE
INPUT
STAGE
mute
9 (3)
8 (2)
IN1M
IN1P
22 (15)
21 (14)
20 (13)
17 (11)
16 (10)
15 (9)
VSSP2
VSSP1
DRIVER
HIGH
DRIVER
LOW
RELEASE2
SWITCH2
ENABLE2 CONTROL
AND
HANDSHAKE
PWM
MODULATOR
11 (5)
SGND1
7 (1)
OSC
2 (19)
SGND2
6 (23)
MODE
INPUT
STAGE
mute
5 (22)
4 (21)
IN2M
IN2P
19 (-)24 (17)
VSSD n.c.
1 (18)
VSSA2
12 (6)
VSSA1
3 (20)
VDDA2
10 (4)
VDDA1
23 (16)13 (7)18 (12) 14 (8)
VDDP2
PROTSTABI VDDP1
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Preliminary data sheet Rev. 01 — 1 October 2004 4 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
7. Pinning information
7.1 Pinning
7.2 Pin description
Fig 2. Pin configuration TDA8922BTH. Fig 3. Pin configuration TDA8922BJ.
TDA8922BTH
VSSD VSSA2
VDDP2 SGND2
BOOT2 VDDA2
OUT2 IN2M
VSSP2 IN2P
n.c. MODE
STABI OSC
VSSP1 IN1P
OUT1 IN1M
BOOT1 VDDA1
VDDP1 SGND1
PROT VSSA1
001aab170
24
23
22
21
20
19
18
17
16
15
14
13
11
12
9
10
7
8
5
6
3
4
1
2
TDA8922BJ
OSC
IN1P
IN1M
VDDA1
SGND1
VSSA1
PROT
VDDP1
BOOT1
OUT1
VSSP1
STABI
VSSP2
OUT2
BOOT2
VDDP2
VSSD
VSSA2
SGND2
VDDA2
IN2M
IN2P
MODE
001aab171
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Table 3: Pin description
Symbol Pin Description
TDA8922BTH TDA8922BJ
VSSA2 1 18 negative analog supply voltage for channel 2
SGND2 2 19 signal ground for channel 2
VDDA2 3 20 positive analog supply voltage for channel 2
IN2M 4 21 negative audio input for channel 2
IN2P 5 22 positive audio input for channel 2
MODE 6 23 mode selection input: Standby; Mute or
Operating mode
OSC 7 1 oscillator frequency adjustment or tracking input
IN1P 8 2 positive audio input for channel 1
IN1M 9 3 negative audio input for channel 1
VDDA1 10 4 positive analog supply voltage for channel 1
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Preliminary data sheet Rev. 01 — 1 October 2004 5 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
8. Functional description
8.1 General
The TDA8922B is a two channel audio power amplifier using class-D technology.
The audio input signal is converted into a digital Pulse Width Modulated (PWM) signal via
an analog input stage and PWM modulator. To enable the output power transistors to be
driven, this digital PWM signal is applied to a control and handshake block and driver
circuits for both the high side and low side. In this way a level shift is performed from the
low power digital PWM signal (at logic levels) to a high power PWM signal which switches
between the main supply lines.
A 2nd-order low-pass filter converts the PWM signal to an analog audio signal across the
loudspeakers.
The TDA8922B one-chip class-D amplifier contains high power D-MOS switches, drivers,
timing and handshaking between the power switches and some control logic. For
protection a temperature sensor and a maximum current detector are built-in.
The two audio channels of the TDA8922B contain two PWMs, two analog feedback loops
and two differential input stages. It also contains circuits common to both channels such
as the oscillator, all reference sources, the mode functionality and a digital timing
manager.
The TDA8922B contains two independent amplifier channels with high output power, high
efficiency, low distortion and a low quiescent current. The amplifier channels can be
connected in the following configurations:
Mono Bridge-Tied Load (BTL) amplifier
Stereo Single-Ended (SE) amplifiers.
SGND1 11 5 signal ground for channel 1
VSSA1 12 6 negative analog supply voltage for channel 1
PROT 13 7 decoupling capacitor for protection (OCP)
VDDP1 14 8 positive power supply voltage for channel 1
BOOT1 15 9 bootstrap capacitor for channel 1
OUT1 16 10 PWM output from channel 1
VSSP1 17 11 negative power supply voltage for channel 1
STABI 18 12 decoupling of internal stabilizer for logic supply
n.c. 19 - not connected
VSSP2 20 13 negative power supply voltage for channel 2
OUT2 21 14 PWM output from channel 2
BOOT2 22 15 bootstrap capacitor for channel 2
VDDP2 23 16 positive power supply voltage for channel 2
VSSD 24 17 negative digital supply voltage
Table 3: Pin description
…continued
Symbol Pin Description
TDA8922BTH TDA8922BJ
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Preliminary data sheet Rev. 01 — 1 October 2004 6 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
The amplifier system can be switched in three operating modes with pin MODE:
Standby mode; with a very low supply current
Mute mode; the amplifiers are operational; but the audio signal at the output is
suppressed by disabling the VI-converter input stages
Operating mode; the amplifiers fully are operational with output signal.
To ensure pop-noise free start-up the DC output offset voltage is applied gradually to the
output between Mute mode and Operating mode. The bias current setting of the VI
converters is related to the voltage on the MODE pin; in Mute mode the bias current
setting of the VI converters is zero (VI converters disabled) and in Operating mode the
bias current is at maximum. The time constant required to apply the DC output offset
voltage gradually between mute and operating can be generated via an RC-network on
the MODE pin. An example of a switching circuit for driving pin MODE is illustrated in
Figure 4. If the capacitor C is left out of the application the voltage on the MODE pin will
be applied with a much smaller time-constant, which might result in audible pop-noises
during start-up (depending on DC output offset voltage and used loudspeaker).
In order to fully charge the coupling capacitors at the inputs, the amplifier will remain
automatically in the Mute mode before switching to the Operating mode. A complete
overview of the start-up timing is given in Figure 5.
Fig 4. Example of mode selection circuit.
001aab172
SGND
MODE pin
mute/on
RC
R
+5 V
standby/
mute
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Preliminary data sheet Rev. 01 — 1 October 2004 7 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
When switching from standby to mute, there is a delay of 100 ms before the output starts
switching. The audio signal is available after Vmode has been set to operating, but not earlier
than 150 ms after switching to mute. For pop-noise free start-up it is recommended that the
time constant applied to the MODE pin is at least 350 ms for the transition between mute and
operating.
When switching directly from standby to operating, there is a first delay of 100 ms before the
outputs starts switching. The audio signal is available after a second delay of 50 ms. For
pop-noise free start-up it is recommended that the time constant applied to the MODE pin is at
least 350 ms for the transition between standby and operating
Fig 5. Timing on mode selection input.
2.2 V < Vmode < 3 V
audio output
operating
standby
mute
50 %
duty cycle
> 4.2 V
0 V (SGND) time
coa024
Vmode
100 ms 50 ms
modulated PWM
> 350 ms
2.2 V < Vmode < 3 V
audio output
operating
standby
mute
50 %
duty cycle
> 4.2 V
0 V (SGND) time
Vmode
100 ms 50 ms
modulated PWM
> 350 ms
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 8 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
8.2 Pulse width modulation frequency
The output signal of the amplifier is a PWM signal with a carrier frequency of
approximately 317 kHz. Using a 2nd-order LC demodulation filter in the application results
in an analog audio signal across the loudspeaker. This switching frequency is fixed by an
external resistor ROSC connected between pin OSC and VSSA. An optimal setting for the
carrier frequency is between 300 kHz and 350 kHz.
Using an external resistor of 30 k on the OSC pin, the carrier frequency is set to
317 kHz.
If two or more class-D amplifiers are used in the same audio application, it is advisable to
have all devices operating at the same switching frequency by using an external clock
circuit.
8.3 Protections
The following protections are included in TDA8922B:
OverTemperature Protection (OTP)
OverCurrent Protection (OCP)
Window Protection (WP)
Supply voltage protections:
UnderVoltage Protection (UVP)
OverVoltage Protection (OVP)
UnBalance Protection (UBP).
The reaction of the device on the different fault conditions differs per protection:
8.3.1 OverTemperature Protection (OTP)
If the junction temperature Tj> 150 °C, then the power stage will shut-down immediately.
The power stage will start switching again if the temperature drops to approximately
130 °C, thus there is a hysteresis of approximately 20 °C.
8.3.2 OverCurrent Protection (OCP)
When the loudspeaker terminals are short-circuited or if one of the demodulated outputs
of the amplifier is short-circuited to one of the supply lines, this will be detected by the
OverCurrent Protection (OCP). If the output current exceeds the maximum output current
of 5 A, this current will be limited by the amplifier to 5 A while the amplifier outputs remain
switching (the amplifier is NOT shut-down completely).
The amplifier can distinguish between an impedance drop of the loudspeaker and
low-ohmic short across the load. In the TDA8922B this impedance threshold (Zth)
depends on the supply voltage used.
When a short is made across the load causing the impedance to drop below the threshold
level (< Zth) then the amplifier is switched off completely and after a time of 100 ms it will
try to restart again. If the short circuit condition is still present after this time this cycle will
be repeated. The average dissipation will be low because of this low duty cycle.
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 9 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
In case of an impedance drop (e.g. due to dynamic behavior of the loudspeaker) the same
protection will be activated; the maximum output current is again limited to 5 A, but the
amplifier will NOT switch-off completely (thus preventing audio holes from occurring).
Result will be a clipping output signal without any artefacts.
See also Section 13.6 for more information on this maximum output current limiting
feature.
8.3.3 Window Protection (WP)
During the start-up sequence, when pin MODE is switched from standby to mute, the
conditions at the output terminals of the power stage are checked. In the event of a
short-circuit at one of the output terminals to VDD or VSS the start-up procedure is
interrupted and the system waits for open-circuit outputs. Because the test is done before
enabling the power stages, no large currents will flow in the event of a short-circuit. This
system is called Window Protection (WP) and protects for short-circuits at both sides of
the output filter to both supply lines. When there is a short-circuit from the power PWM
output of the power stage to one of the supply lines (before the demodulation filter) it will
also be detected by the start-up safety test. Practical use of this test feature can be found
in detection of short-circuits on the printed-circuit board.
Remark: This test is operational during (every) start-up sequence at a transition between
Standby and Mute mode. However when the amplifier is completely shut-down due to
activation of the OverCurrent Protection (OCP) because a short to one of the supply lines
is made, then during restart (after 100 ms) the window protection will be activated. As a
result the amplifier will not start-up until the short to the supply lines is removed.
8.3.4 Supply voltage protections
If the supply voltage drops below ±12.5 V, the UnderVoltage Protection (UVP) circuit is
activated and the system will shut-down correctly. If the internal clock is used, this
switch-off will be silent and without pop noise. When the supply voltage rises above the
threshold level, the system is restarted again after 100 ms. If the supply voltage exceeds
±33 V the OverVoltage Protection (OVP) circuit is activated and the power stages will
shut-down. It is re-enabled as soon as the supply voltage drops below the threshold level.
So in this case no timer of 100 ms is started.
An additional UnBalance Protection (UBP) circuit compares the positive analog (VDDA)
and the negative analog (VSSA) supply voltages and is triggered if the voltage difference
between them exceeds a certain level. This level depends on the sum of both supply
voltages. An expression for the unbalanced threshold level is as follows:
Vth(ub) 0.15 ×(VDDA +V
SSA).
When the supply voltage difference drops below the threshold level, the system is
restarted again after 100 ms.
Example: With a symmetrical supply of ±30 V, the protection circuit will be triggered if the
unbalance exceeds approximately 9 V; see also Section 13.7.
In Table 4 an overview is given of all protections and the effect on the output signal.
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Preliminary data sheet Rev. 01 — 1 October 2004 10 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
[1] Hysteresis of 20 degrees will influence restart timing depending on heatsink size.
[2] Only complete shut-down of amplifier if short-circuit impedance is below threshold of 1 . In all other cases
current limiting: resulting in clipping output signal.
[3] Fault condition detected during (every) transition between standby-to-mute and during restart after
activation of OCP (short to one of the supply lines).
8.4 Differential audio inputs
For a high common mode rejection ratio and a maximum of flexibility in the application, the
audio inputs are fully differential. By connecting the inputs anti-parallel the phase of one of
the channels can be inverted, so that a load can be connected between the two output
filters. In this case the system operates as a mono BTL amplifier and with the same
loudspeaker impedance an approximately four times higher output power can be
obtained.
The input configuration for a mono BTL application is illustrated in Figure 6.
In the stereo single-ended configuration it is also recommended to connect the two
differential inputs in anti-phase. This has advantages for the current handling of the power
supply at low signal frequencies.
Table 4: Overview protections TDA8922B
Protection name Complete shut-down Restart directly Restart every 100 ms
OTP Y Y [1] N[1]
OCP N[2] Y[2] N[2]
WP Y[3] YN
UVP Y N Y
OVPYYN
UBP Y N Y
Fig 6. Input configuration for mono BTL application.
Vin
IN1P OUT1
power stage
mbl466
OUT2
SGND
IN1M
IN2P
IN2M
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Preliminary data sheet Rev. 01 — 1 October 2004 11 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
9. Limiting values
[1] Current limiting concept. See also Section 13.6.
10. Thermal characteristics
[1] See also Section 13.5.
11. Static characteristics
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VPsupply voltage - ±30 V
IORM repetitive peak current in
output pin maximum output
current limiting [1] 5- A
Tstg storage temperature 55 +150 °C
Tamb ambient temperature 40 +85 °C
Tjjunction temperature - 150 °C
Table 6: Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-a) thermal resistance from junction to ambient [1]
TDA8922BTH in free air 35 K/W
TDA8922BJ in free air 35 K/W
Rth(j-c) thermal resistance from junction to case [1]
TDA8922BTH 1.3 K/W
TDA8922BJ 1.3 K/W
Table 7: Static characteristics
V
P
=
±
26 V; f
osc
= 317 kHz; T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Supply
VPsupply voltage [1] ±12.5 ±26 ±30 V
Iq(tot) total quiescent supply
current no load; no filter; no
snubber network
connected
- 5065mA
Istb standby supply current - 150 500 µA
Mode select input; pin MODE
VIinput voltage [2] 0-6V
IIinput current VI= 5.5 V - 100 300 µA
Vstb input voltage for
Standby mode [2]
[3] 0 - 0.8 V
Vmute input voltage for Mute
mode [2]
[3] 2.2 - 3.0 V
Von input voltage for
Operating mode [2]
[3] 4.2 - 6 V
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Preliminary data sheet Rev. 01 — 1 October 2004 12 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
[1] The circuit is DC adjusted at VP=±12.5 V to ±30 V.
[2] With respect to SGND (0 V).
[3] The transition between Standby and Mute mode contain hysteresis, while the slope of the transition
between Mute and Operating mode is determined by the time-constant on the MODE pin see Figure 7.
[4] DC output offset voltage is applied to the output during the transition between Mute and Operating mode in
a gradual way.The slope of the dV/dt caused by any DC output offset is determined by the time-constant on
the MODE pin.
Audio inputs; pins IN1M, IN1P, IN2P and IN2M
VIDC input voltage [2] -0-V
Amplifier outputs; pins OUT1 and OUT2
VOO(SE)(mute)mute SE output offset
voltage - - 15 mV
VOO(SE)(on)operating SE output
offset voltage [4] - - 150 mV
VOO(BTL)(mute)muteBTL outputoffset
voltage - - 21 mV
VOO(BTL)(on)operating BTL output
offset voltage [4] - - 210 mV
Stabilizer output; pin STABI
Vo(stab) stabilizer output
voltage mute and operating;
with respect to VSSP1
11 12.5 15 V
Temperature protection
Tprot temperatureprotection
activation - 150 - °C
Thys hysteresis on
temperature protection -20-°C
Fig 7. Behavior of mode selection pin MODE.
Table 7: Static characteristics
…continued
V
P
=
±
26 V; f
osc
= 317 kHz; T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
STBY MUTE ON
5.5
coa021
VMODE (V)
4.23.02.20.80
VO (V)
Voo (mute)
Voo (on)
slope is directly related to
time-constant on the MODE pin
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Preliminary data sheet Rev. 01 — 1 October 2004 13 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
12. Dynamic characteristics
12.1 Switching characteristics
12.2 Stereo and dual SE application
Table 8: Switching characteristics
V
DD
=
±
26 V; T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Internal oscillator
fosc typical internal oscillator
frequency ROSC = 30.0 k290 317 344 kHz
fosc(int) internal oscillator
frequency range 210 - 600 kHz
External oscillator or frequency tracking
VOSC high-level voltage on pin
OSC SGND + 4.5 SGND + 5 SGND + 6 V
VOSC(trip) trip level for tracking on
pin OSC - SGND + 2.5 - V
ftrack frequency range for
tracking 210 - 600 kHz
Table 9: Stereo and dual SE application characteristics
V
P
=
±
26 V; R
L
= 6
; f
i
= 1 kHz; R
sL
< 0.1
[1]
; T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Pooutput power RL=4; VP=±21 V [2]
THD = 0.5 % - 32 - W
THD = 10 % - 40 - W
RL=6; VP=±26 V [2]
THD = 0.5 % - 40 - W
THD = 10 % - 50 - W
RL=8; VP=±21 V [2]
THD = 0.5 % - 20 - W
THD = 10 % - 25 - W
RL=8; VP=±26 V [2]
THD = 0.5 % - 32 - W
THD = 10 % - 40 - W
THD total harmonic distortion Po=1W [3]
fi= 1 kHz - 0.02 0.05 %
fi= 6 kHz - 0.07 - %
Gv(cl) closed loop voltage gain 29 30 31 dB
SVRR supply voltage ripple
rejection operating [4]
fi= 100 Hz - 55 - dB
fi= 1 kHz 40 50 - dB
mute; fi= 100 Hz [4] -55-dB
standby; fi= 100 Hz [4] -80-dB
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Preliminary data sheet Rev. 01 — 1 October 2004 14 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
[1] RsL is the series resistance of inductor of low-pass LC filter in the application.
[2] Output power is measured indirectly; based on RDSon measurement. See also Section 13.3.
[3] Total harmonic distortion is measured in a bandwidth of 22 Hz to 20 kHz, using an AES17 20 kHz brickwall filter. Maximum limit is
guaranteed but may not be 100 % tested.
[4] Vripple =V
ripple(max) = 2 V (p-p); Rs=0.
[5] B = 22 Hz to 20 kHz, using an AES17 20 kHz brickwall filter.
[6] B = 22 Hz to 20 kHz, using an AES17 20 kHz brickwall filter; independent of Rs.
[7] Po= 1 W; Rs=0; fi= 1 kHz.
[8] Vi=V
i(max) = 1 V (RMS); fi= 1 kHz.
12.3 Mono BTL application
Ziinput impedance 45 68 - k
Vn(o) noise output voltage operating
Rs=0[5] - 210 - µV
mute [6] - 160 - µV
αcs channel separation [7] -70-dB
∆Gvchannel unbalance - - 1 dB
Vo(mute) output signal in mute [8] - 100 - µV
CMRR common mode rejection
ratio Vi(CM) = 1 V (RMS) - 75 - dB
Table 9: Stereo and dual SE application characteristics
…continued
V
P
=
±
26 V; R
L
= 6
; f
i
= 1 kHz; R
sL
< 0.1
[1]
; T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Table 10: Mono BTL application characteristics
V
P
=
±
26 V; R
L
= 8
; f
i
= 1 kHz; f
osc
= 317 kHz; R
sL
< 0.1
[1]
; T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Pooutput power RL=6; VP=±16 V [2]
THD = 0.5 % - 48 - W
THD = 10 % - 60 - W
RL=8; VP=±21 V [2]
THD = 0.5 % - 71 - W
THD = 10 % - 88 - W
THD total harmonic distortion Po=1W [3]
fi= 1 kHz - 0.02 0.05 %
fi= 6 kHz - 0.07 - %
Gv(cl) closed loop voltage gain 35 36 37 dB
SVRR supply voltage ripple
rejection operating [4]
fi= 100 Hz - 80 - dB
fi= 1 kHz 70 80 - dB
mute; fi= 100 Hz [4] -80-dB
standby; fi= 100 Hz [4] -80-dB
Ziinput impedance 22 34 - k
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 15 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
[1] RsL is the series resistance of inductor of low-pass LC filter in the application.
[2] Output power is measured indirectly; based on RDSon measurement. See also Section 13.3.
[3] Total harmonic distortion is measured in a bandwidth of 22 Hz to 20 kHz, using an AES17 20 kHz brickwall filter. Maximum limit is
guaranteed but may not be 100 % tested.
[4] Vripple =V
ripple(max) = 2 V (p-p); Rs=0.
[5] B = 22 Hz to 20 kHz, using an AES17 20 kHz brickwall filter.
[6] B = 22 Hz to 20 kHz, using an AES17 20 kHz brickwall filter; independent of Rs.
[7] Vi=V
i(max) = 1 V (RMS); fi= 1 kHz.
13. Application information
13.1 BTL application
When using the power amplifier in a mono BTL application the inputs of both channels
must be connected in parallel and the phase of one of the inputs must be inverted (see
Figure 6). In principle the loudspeaker can be connected between the outputs of the two
single-ended demodulation filters.
13.2 MODE pin
For pop-noise free start-up an RC time-constant must be applied on the MODE pin. The
bias-current setting of the VI-converter input is directly related to the voltage on the MODE
pin. In turn the bias-current setting of the VI converters is directly related to the DC output
offset voltage. Thus a slow dV/dt on the MODE pin results in a slow dV/dt for the DC
output offset voltage, resulting in pop-noise free start-up. A time-constant of 500 ms is
sufficient to guarantee pop-noise free start-up (see also Figure 4,5 and 7).
13.3 Output power estimation
The achievable output powers in several applications (SE and BTL) can be estimated
using the following expressions:
SE:
(1)
Vn(o) noise output voltage operating
Rs=0[5] - 300 - µV
mute [6] - 220 - µV
Vo(mute) output signal in mute [7] - 200 - µV
CMRR common mode rejection
ratio Vi(CM) = 1 V (RMS) - 75 - dB
Table 10: Mono BTL application characteristics
…continued
V
P
=
±
26 V; R
L
= 8
; f
i
= 1 kHz; f
osc
= 317 kHz; R
sL
< 0.1
[1]
; T
amb
= 25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Po1%()
RL
RL0.6+
-------------------- VP1t
min fosc
×()×× 2
2R
L
×
-----------------------------------------------------------------------------------------
=
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 16 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
Maximum current (internally limited to 5 A):
(2)
BTL:
(3)
Maximum current (internally limited to 5 A):
(4)
Variables:
RL= load impedance
fosc = oscillator frequency
tmin = minimum pulse width (typical 150 ns).
VP= single-sided supply voltage (so, if supply is ±30 V symmetrical, then VP=30V)
Po(1%) = output power just at clipping
Po(10%) = output power at THD = 10 %
Po(10%) = 1.24 ×Po(1%).
13.4 External clock
When using an external clock the following accuracy of the duty cycle of the external clock
has to be taken into account: 47.5 % < δ< 52.5 %.
If two or more class-D amplifiers are used in the same audio application, it is strongly
recommended that all devices run at the same switching frequency.This can be realized
by connecting all OSC pins together and feed them from an external central oscillator.
Using an external oscillator it is necessary to force pin OSC to a DC-level above SGND for
switching from the internal to an external oscillator. In this case the internal oscillator is
disabled and the PWM will be switched on the external frequency. The frequency range of
the external oscillator must be in the range as specified in the switching characteristics;
see Section 12.1.
In an application circuit:
Internal oscillator: ROSC connected between pin OSC and VSSA
External oscillator: connect the oscillator signal between pins OSC and SGND; delete
ROSC and COSC.
Iopeak()
VP1t
min fosc
×()×RL0.6+
------------------------------------------------------
=
Po1%()
RL
RL1.2+
-------------------- 2VP1t
min fosc
×()×× 2
2R
L
×
---------------------------------------------------------------------------------------------
=
Iopeak()
2VP1t
min fosc
×()×RL1.2+
---------------------------------------------------------
=
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 17 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
13.5 Heatsink requirements
In some applications it may be necessary to connect an external heatsink to the
TDA8922B. Limiting factor is the 150 °C maximum junction temperature Tj(max) which
cannot be exceeded. The expression below shows the relationship between the maximum
allowable power dissipation and the total thermal resistance from junction to ambient:
Pdiss is determined by the efficiency (η) of the TDA8922B. The efficiency measured in the
TDA8922B as a function of output power is given in Figure 19. The power dissipation can
be derived as function of output power Figure 18.
The derating curves (given for several values of the Rth(j-a)) are illustrated in Figure 8. A
maximum junction temperature Tj= 150 °C is taken into account. From Figure 8 the
maximum allowable power dissipation for a given heatsink size can be derived or the
required heatsink size can be determined at a required dissipation level.
13.6 Output current limiting
To guarantee the robustness of the class-D amplifier the maximum output current which
can be delivered by the output stage is limited. An advanced OverCurrent Protection
(OCP) is included for each output power switch.
When the current flowing through any of the power switches exceeds the defined internal
threshold of 5 A (e.g. in case of a short-circuit to the supply lines or a short-circuit across
the load) the maximum output current of the amplifier will be regulated to 5 A.
(1) Rth(j-a) = 5 K/W.
(2) Rth(j-a) = 10 K/W.
(3) Rth(j-a) = 15 K/W.
(4) Rth(j-a) = 20 K/W.
(5) Rth(j-a) = 35 K/W.
Fig 8. Derating curves for power dissipation as a function of maximum ambient
temperature.
Rth j a()Tj max()
Tamb
Pdiss
--------------------------------------
=
Pdiss
(W)
30
20
10
0
Tamb (°C)
(1)
(2)
(3)
(4)
(5)
0 20 10040 60 80
mbl469
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Preliminary data sheet Rev. 01 — 1 October 2004 18 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
The TDA8922B amplifier can distinguish between a low-ohmic short circuit condition and
other overcurrent conditions like dynamic impedance drops of the used loudspeakers. The
impedance threshold (Zth) depends on the supply voltage used.
Depending on the impedance of the short circuit the amplifier will react as follows:
1. Short-circuit impedance > Zth:
The maximum output current of the amplifier is regulated to 5 A, but the amplifier will
not shut-down its PWM outputs. Effectively this results in a clipping output signal
across the load (behavior is very similar to voltage clipping).
2. Short-circuit impedance < Zth:
The amplifier will limit the maximum output current to 5 A and at the same time the
capacitor on the PROT pin is discharged. When the voltage across this capacitor
drops below an internal threshold voltage the amplifier will shut-down completely and
an internal timer will be started.
A typical value for the capacitor on the PROT pin is 220 pF. After a fixed time of
100 ms the amplifier is switched on again. If the requested output current is still too
high the amplifier will switch-off again. Thus the amplifier will try to switch to the
Operating mode every 100 ms. The average dissipation will be low in this situation
because of this low duty cycle. If the overcurrent condition is removed the amplifier will
remain in Operating mode once restarted.
In this way the TDA8922B amplifier is fully robust against short circuit conditions while at
the same time so-called audio holes as a result of loudspeaker impedance drops are
eliminated.
13.7 Pumping effects
In a typical stereo half-bridge (Single-Ended (SE)) application the TDA8922B class-D
amplifier is supplied by a symmetrical voltage (e.g VDD = +26 V and VSS =26 V). When
the amplifier is used in a SE configuration, a so-called ‘pumping effect’ can occur. During
one switching interval, energy is taken from one supply (e.g. VDD), while a part of that
energy is delivered back to the other supply line (e.g. VSS) and visa versa. When the
voltage supply source cannot sink energy, the voltage across the output capacitors of that
voltage supply source will increase: the supply voltage is pumped to higher levels. The
voltage increase caused by the pumping effect depends on:
Speaker impedance
Supply voltage
Audio signal frequency
Value of decoupling capacitors on supply lines
Source and sink currents of other channels.
The pumping effect should not cause a malfunction of either the audio amplifier and/or the
voltage supply source. For instance, this malfunction can be caused by triggering of the
undervoltage or overvoltage protection or unbalance protection of the amplifier.
Best remedy for pumping effects is to use the TDA8922B in a mono full-bridge application
or in case of stereo half-bridge application adapt the power supply (e.g. increase supply
decoupling capacitors).
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 19 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
13.8 Application schematic
Notes to the application schematic:
A solid ground plane around the switching amplifier is necessary to prevent emission.
100 nF capacitors must be placed as close as possible to the power supply pins of the
TDA8922BTH.
The internal heat spreader of the TDA8922BTH is internally connected to VSS.
The external heatsink must be connected to the ground plane.
Use a thermal conductive electrically non-conductive Sil-Pad® between the backside
of the TDA8922BTH and a small external heatsink.
The differential inputs enable the best system level audio performance with
unbalanced signal sources. In case of hum due to floating inputs, connect the
shielding or source ground to the amplifier ground. Jumpers J1 and J2 are open on
set level and are closed on the stand-alone demo board.
Minimum total required capacity per power supply line is 3300 µF.
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 20 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
Fig 9. TDA8922BTH application diagram.
001aab198
C18 IN1P
IN1
IN2
IN1M
SGND1
FB GND SGND2
8
9
11
2
5
4
31
C19
220 pF
C23
1 nF
C17
1 nF
C30
1 nF
C25
1 nF
R8
470 nF5.6 k
R3
5.6 k
470 nF5.6 k
C20R10
C26 IN2P
IN2M
FB GND FB GND
C28
220 pF
R11
470 nF5.6 k
R13
10 R14
22
OUT2M
OUT2P LS2
C32
100
nF
C9
100 nF
C31
FB
GND
470 nF5.6 k
C29
100 nF
VDDA VSSA
19 2413
VSSA VSSP
VDDA2
VSSA2
PROT
n.c.
20
21
22
VSSP
VSSP2
OUT2
BOOT2
23
VDDP
VDDP2
VSSD
C34
100 nF
C35
FB GND FB GND
100 nF
VDDA VSSA
C12
100 nF
C13
VDDA1
VSSA1
100 nF
C37
15 nF
C27
L4
100 nF
C39
100 nF
C38
VSSP
VDDP
17
VSSP1
14
U1
VDDP1
6
MODE
71210
OSC
100 nF
C14
100 nF
C16
100 nF
C15
47 µF/
63 V
C8
100 µF/10 V
C4
C3
470 µF/35 V
C6
470 µF/35 V
C33
220 pF
18
STABI
C36
100 nF
VDDP
C40
220 pF
C10
220 pF
VSSP
C41
220 pF
R12
TDA8922BTH
R2
10
R5
10
R7
10
R6
30 k
R9
22
R4
5.6 k
R1
5.6 k
DZ1
5V6
S2
C2
47 µF/35 V
C5
47 µF/35 V
C1
100 nF
1
C7
100 nF S1
OUT1P
OUT1M LS1
LS1/LS2 L3/L4 C22/C31
2 10 µH1 µF
4 22 µH 680 nF
6 33 µH 470 nF
8 47 µH 330 nF
C24
100
nF
C22
FB
GND
16
15
OUT1
BOOT1
15 nF
C21
L3
L1 BEAD
VDD
CON1
GND
VSS
+25 V
25 V
L2 BEAD
VDDP
VSSA
ON/OFF OPERATE/MUTE
VDDP
VDDA
VDDP
VSSP
VSSA
VSSP
SINGLE ENDED
OUTPUT FILTER VALUES
C11
220 pF
2
3
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 21 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
13.9 Curves measured in reference design
VP=±26 V; 2 ×6 SE configuration.
(1) f = 6 kHz.
(2) f = 1 kHz.
(3) f = 100 Hz.
VP=±26 V; 2 ×8 SE configuration.
(1) f = 6 kHz.
(2) f = 1 kHz.
(3) f = 100 Hz.
Fig 10. (THD + N)/S as a function of output power; SE
configuration with 2 ×6 load. Fig 11. (THD + N)/S as a function of output power; SE
configuration with 2 ×8 load.
VP=±21 V; 1 ×8 BTL configuration.
(1) f = 6 kHz.
(2) f = 1 kHz.
(3) f = 100 Hz.
VP=±26 V; 2 ×6 SE configuration.
(1) Po=10W.
(2) Po=1W.
Fig 12. (THD + N)/S as a function of output power; BTL
configuration with 8 load. Fig 13. (THD + N)/S as function of frequency, SE
configuration with 2 ×6 load.
Po (W)
102103
102
101101
001aab199
(2)
(3)
(1)
101
102
10
1
102
(THD + N)/S
(%)
103
001aab200
101
102
10
1
102
103
Po (W) 102
10101
1021
(2)
(3)
(1)
(THD + N)/S
(%)
Po (W)
102103
102
101101
001aab201
101
102
10
1
102
103
(2)
(3)
(1)
(THD + N)/S
(%)
001aab202
101
102
10
1
102
103
f (Hz)
10 105
104
102103
(1)
(2)
(THD + N)/S
(%)
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 22 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
VP=±26 V; 2 ×8 SE configuration.
(1) Po=10W.
(2) Po=1W.
VP=±21 V; 1 ×8 BTL configuration.
(1) Po=10W.
(2) Po=1W.
Fig 14. (THD + N)/S as function of frequency, SE
configuration with 2 ×8 load. Fig 15. (THD + N)/S as function of frequency, BTL
configuration with 8 load.
VP=±26 V; 2 ×6 SE configuration.
(1) Po=10W.
(2) Po=1W.
VP=±26 V; 2 ×8 SE configuration.
(1) Po=10W.
(2) Po=1W.
Fig 16. Channel separation as a function of frequency;
SE configuration with 2 ×6 load. Fig 17. Channel separation as a function of frequency;
SE configuration with 2 ×8 load.
001aab203
101
102
10
1
102
103
f (Hz)
10 105
104
102103
(1)
(2)
(THD + N)/S
(%)
001aab204
101
102
10
1
102
103
f (Hz)
10 105
104
102103
(1)
(2)
(THD + N)/S
(%)
001aab205
60
40
80
20
0
αcs
(dB)
100
f (Hz)
10 105
104
102103
(1)
(2)
001aab206
60
40
80
20
0
αcs
(dB)
100
f (Hz)
10 105
104
102103
(1)
(2)
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 23 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
f = 1 kHz.
(1) VP=±21 V; 1 ×8 BTL configuration.
(2) VP=±26 V; 2 ×6 SE configuration.
(3) VP=±26 V; 2 ×8 SE configuration.
f = 1 kHz.
(1) VP=±26 V; 2 ×8 SE configuration.
(2) VP=±26 V; 2 ×6 SE configuration.
(3) VP=±21 V; 1 ×8 BTL configuration.
Fig 18. Power dissipation as a function of total output
power. Fig 19. Efficiency as a function of total output power.
(THD + N)/S = 0.5 %; f = 1 kHz.
(1) 1 ×8 BTL configuration.
(2) 2 ×6 SE configuration.
(3) 2 ×8 SE configuration.
(THD + N)/S = 10 %; f = 1 kHz.
(1) 1 ×8 BTL configuration.
(2) 2 ×6 SE configuration.
(3) 2 ×8 SE configuration.
Fig 20. Output power as a function of supply voltage;
(THD + N)/S = 0.5 %. Fig 21. Output power as a function of supply voltage;
(THD+N)/S=10%.
001aab207
8
12
4
16
20
Ptot
(W)
0
Po (W)
102103
102
101101
(1)
(2)
(3)
Po (W)
0 20016080 12040
001aab208
40
60
20
80
100
η
(%)
0
(1) (2)
(3)
VS (V)
10 353020 2515
001aab209
40
80
120
Po
(W)
0
(1)
(2)
(3)
VS (V)
10 353020 2515
001aab210
80
120
40
160
200
Po
(W)
0
(1)
(2)
(3)
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 24 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
Vi= 100 mV; Rs= 5.6 k; Ci= 330 pF.
(1) VP=±21 V; 1 ×8 BTL configuration.
(2) VP=±26 V; 2 ×6 SE configuration.
(3) VP=±26 V; 2 ×8 SE configuration.
Vi= 100 mV; Rs=0; Ci= 330 pF.
(1) VP=±21 V; 1 ×8 BTL configuration.
(2) VP=±26 V; 2 ×6 SE configuration.
(3) VP=±26 V; 2 ×8 SE configuration.
Fig 22. Gain as a function of frequency; Rs= 5.6 k
and Ci= 330 pF. Fig 23. Gain as a function of frequency; Rs=0 and
Ci= 330 pF.
VP=±26 V; Vripple = 2 V (p-p).
(1) Both supply lines rippled.
(2) Both supply lines rippled in anti phase.
(3) One supply line rippled.
Vi= 100 mV; f = 1 kHz.
Fig 24. SVRR as a function of frequency. Fig 25. Output voltage as a function of mode voltage.
001aab211
30
35
25
40
45
G
(dB)
20
f (Hz)
10 105
104
102103
(1)
(2)
(3)
001aab212
30
35
25
40
45
G
(dB)
20
f (Hz)
10 105
104
102103
(1)
(2)
(3)
001aab213
60
40
80
20
0
SVRR
(dB)
100
f (Hz)
10 105
104
102103
(1)
(2)
(3)
001aab214
Vo
(V)
103
105
104
1
101
102
10
106
Vmode (V)
0642
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 25 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
14. Test information
14.1 Quality information
The
General Quality Specification for Integrated Circuits, SNW-FQ-611
is applicable.
VP=±26 V; Rs= 5.6 k; 20 kHz AES17 filter.
(1) 2 ×6 SE configuration and 2 ×8 SE configuration.
(2) 1 ×8 BTL configuration.
Fig 26. S/N ratio as a function of output power.
001aab215
40
80
120
S/N
(dB)
0
Po (W)
102103
102
101101
(1) (2)
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 26 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
15. Package outline
Fig 27. HSOP24 package outline.
UNIT A4(1)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
03-02-18
03-07-23
IEC JEDEC JEITA
mm +0.08
0.04
3.5 0.35
DIMENSIONS (mm are the original dimensions)
Notes
1. Limits per individual lead.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT566-3
0 5 10 mm
scale
HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3
A
max.
detail X
A2
3.5
3.2
D2
1.1
0.9
HE
14.5
13.9
Lp
1.1
0.8
Q
1.7
1.5 2.7
2.2
v
0.25
w
0.25
yZ
8°
0°
θ
0.07
x
0.03
D1
13.0
12.6
E1
6.2
5.8
E2
2.9
2.5
bpc
0.32
0.23
e
1
D(2)
16.0
15.8
E(2)
11.1
10.9
0.53
0.40
A3
A4
A2(A3)
Lpθ
A
Q
D
y
x
HE
E
c
vMA
X
A
bpwM
Z
D1D2
E2
E1
e
24 13
112
pin 1 index
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 27 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
Fig 28. DBS23P package outline.
UNIT A2
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 4.6
4.3
A4
1.15
0.85
A5
1.65
1.35
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT411-1 98-02-20
02-04-24
0 5 10 mm
scale
D
L
L1
L2
E2
E
c
A4
A5
A2
m
L3
E1
Q
wM
bp
1
d
Ze2
e
e
123
j
DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1
vM
D
xh
Eh
non-concave
view B: mounting base side
B
β
e1
bpcD
(1) E(1) Z(1)
deDhLL
3m
0.75
0.60 0.55
0.35 30.4
29.9 28.0
27.5 12 2.54
12.2
11.8 10.15
9.85
1.27
e2
5.08 2.4
1.6
Eh
6
E1
14
13
L1
10.7
9.9
L2
6.2
5.8
E2
1.43
0.78
2.1
1.8
1.85
1.65 4.3
3.6
2.8
Qj
0.25
w
0.6
v
0.03
x
45°
β
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 28 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
16. Soldering
16.1 Introduction
This text gives a very brief insight to a complex technology. A more in-depth account of
soldering ICs can be found in our
Data Handbook IC26; Integrated Circuit Packages
(document order number 9398 652 90011).
There is no soldering method that is ideal for all IC packages. Wave soldering is often
preferred when through-hole and surface mount components are mixed on one
printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it
is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
Driven by legislation and environmental forces the worldwide use of lead-free solder
pastes is increasing.
16.2 Through-hole mount packages
16.2.1 Soldering by dipping or by solder wave
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C
or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.
The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic
body must not exceed the specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling may be necessary immediately
after soldering to keep the temperature within the permissible limit.
16.2.2 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the
seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is
less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is
between 300 °C and 400 °C, contact may be up to 5 seconds.
16.3 Surface mount packages
16.3.1 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and
binding agent) to be applied to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, convection or convection/infrared
heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)
vary between 100 seconds and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 °Cto270°C depending on solder paste
material. The top-surface temperature of the packages should preferably be kept:
below 225 °C (SnPb process) or below 245 °C (Pb-free process)
for all BGA, HTSSON..T and SSOP..T packages
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 29 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
for packages with a thickness 2.5 mm
for packages with a thickness < 2.5 mm and a volume 350 mm3 so called
thick/large packages.
below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
16.3.2 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices
(SMDs) or printed-circuit boards with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically
developed.
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
For packages with leads on two sides and a pitch (e):
larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be
parallel to the transport direction of the printed-circuit board;
smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the
transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
For packages with leads on four sides, the footprint must be placed at a 45° angle to
the transport direction of the printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet of
adhesive. The adhesive can be applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C
or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most
applications.
16.3.3 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage
(24 V or less) soldering iron applied to the flat part of the lead. Contact time must be
limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within
2 seconds to 5 seconds between 270 °C and 320 °C.
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 30 of 32
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
16.4 Package related soldering information
[1] For more detailed information on the BGA packages refer to the
(LF)BGA Application Note
(AN01026); order a copy from your Philips
Semiconductors sales office.
[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with
respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of
the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
Data Handbook IC26; Integrated
Circuit Packages; Section: Packing Methods
.
[3] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
[4] Hot bar soldering or manual soldering is suitable for PMFP packages.
[5] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed
through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 °C±10 °C
measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible.
[6] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate
between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the
heatsink surface.
[7] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint
must incorporate solder thieves downstream and at the side corners.
[8] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for
packages with a pitch (e) equal to or smaller than 0.65 mm.
[9] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely
not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
[10] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil.
However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate
soldering profile can be provided on request.
17. Revision history
Table 11: Suitability of IC packages for wave, reflow and dipping soldering methods
Mounting Package[1] Soldering method
Wave Reflow[2] Dipping
Through-hole mount CPGA, HCPGA suitable −−
DBS, DIP, HDIP, RDBS, SDIP, SIL suitable[3] suitable
Through-hole-surface
mount PMFP[4] not suitable not suitable
Surface mount BGA, HTSSON..T[5], LBGA,
LFBGA, SQFP, SSOP..T[5],
TFBGA, VFBGA, XSON
not suitable suitable
DHVQFN, HBCC, HBGA, HLQFP,
HSO, HSOP, HSQFP, HSSON,
HTQFP, HTSSOP, HVQFN,
HVSON, SMS
not suitable[6] suitable
PLCC[7], SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended[7] [8] suitable
SSOP, TSSOP, VSO, VSSOP not recommended[9] suitable
CWQCCN..L[10], WQCCN..L[10] not suitable not suitable
Table 12: Revision history
Document ID Release date Data sheet status Change notice Order number Supersedes
TDA8922B_1 20041001 Preliminary data sheet - 9397 750 13357 -
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
9397 750 13357 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Preliminary data sheet Rev. 01 — 1 October 2004 31 of 32
18. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
19. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
20. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
21. Trademarks
Sil-Pad — is a registered trademark of The Bergquist
Company.
22. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
Level Data sheet status[1] Product status[2] [3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights. Date of release: 1 October 2004
Document order number: 9397 750 13357
Published in The Netherlands
Philips Semiconductors TDA8922B
2× 50 W class-D power amplifier
23. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
5 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Functional description . . . . . . . . . . . . . . . . . . . 5
8.1 General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
8.2 Pulse width modulation frequency . . . . . . . . . . 8
8.3 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
8.3.1 OverTemperature Protection (OTP) . . . . . . . . . 8
8.3.2 OverCurrent Protection (OCP) . . . . . . . . . . . . . 8
8.3.3 Window Protection (WP). . . . . . . . . . . . . . . . . . 9
8.3.4 Supply voltage protections . . . . . . . . . . . . . . . . 9
8.4 Differential audio inputs . . . . . . . . . . . . . . . . . 10
9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11
10 Thermal characteristics. . . . . . . . . . . . . . . . . . 11
11 Static characteristics. . . . . . . . . . . . . . . . . . . . 11
12 Dynamic characteristics . . . . . . . . . . . . . . . . . 13
12.1 Switching characteristics . . . . . . . . . . . . . . . . 13
12.2 Stereo and dual SE application . . . . . . . . . . . 13
12.3 Mono BTL application. . . . . . . . . . . . . . . . . . . 14
13 Application information. . . . . . . . . . . . . . . . . . 15
13.1 BTL application. . . . . . . . . . . . . . . . . . . . . . . . 15
13.2 MODE pin . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.3 Output power estimation. . . . . . . . . . . . . . . . . 15
13.4 External clock . . . . . . . . . . . . . . . . . . . . . . . . . 16
13.5 Heatsink requirements . . . . . . . . . . . . . . . . . . 17
13.6 Output current limiting. . . . . . . . . . . . . . . . . . . 17
13.7 Pumping effects . . . . . . . . . . . . . . . . . . . . . . . 18
13.8 Application schematic. . . . . . . . . . . . . . . . . . . 19
13.9 Curves measured in reference design . . . . . . 21
14 Test information. . . . . . . . . . . . . . . . . . . . . . . . 25
14.1 Quality information . . . . . . . . . . . . . . . . . . . . . 25
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 26
16 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
16.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 28
16.2 Through-hole mount packages. . . . . . . . . . . . 28
16.2.1 Soldering by dipping or by solder wave . . . . . 28
16.2.2 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 28
16.3 Surface mount packages . . . . . . . . . . . . . . . . 28
16.3.1 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 28
16.3.2 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 29
16.3.3 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 29
16.4 Package related soldering information. . . . . . 30
17 Revision history . . . . . . . . . . . . . . . . . . . . . . . 30
18 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 31
19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
21 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
22 Contact information . . . . . . . . . . . . . . . . . . . . 31