Version 2.10a 14 25 Mar 2014
CoolSET™-F2
Functional Description
switching pulse this spike is blanked out with a time
constant of tLEB = 220ns. During that time the output of
the Current-Limit Comparator cannot switch off the
gate drive .
3.5.2 Propagation Delay Compensation
In case of overcurrent detection by ILimit the shut down
of CoolMOS™ is delayed due to the propagation delay
of the circuit. This delay causes an overshoot of the
peak current Ipeak which depends on the ratio of d I/dt of
the peak current (see Figure 17).
.
Figure 17 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
Vcsth and the switch off of CoolMOS™ is compensated
over temperature within a range of at least.
Figure 18 Dynamic Voltage Thresho ld Vcsth
The propagation delay compensation is done by
means of a dynamic thres hold voltage Vcsth (see Figure
18). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
E.g. Ipeak = 0.5A with RSense = 2. Without propagation
delay compensation the current sense threshold is set
to a static voltage level Vcsth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dV Sense/dt = 0.8V/µs, and a
propagation delay time of i.e. tPropagation Delay =180ns
leads then to a Ipeak overshoot of 14.4%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 19).
Figure 19 Overcurrent Shutdown
3.6 PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating CoolMOS™ conduction.
After setting the PWM-La tch can be reset b y the PWM-
OP, the Soft-Start-Comparator, the Current-Limit-
Comparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of resetting the driver is shut
down immediately.
3.7 Driver
The driver-stage drives the gate of the CoolMOS™ and
is optimized to minimize EMI an d to provide high circuit
efficiency. This is don e by reducing the switch on slope
when reaching the CoolMOS™ threshold. This is
achieved by a slope control of the rising edge at the
driver’s output (see Figure 20) to the CoolMOS™ gate.
Thus the leading switch on spike is minimized. When
CoolMOS™ is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below groun d. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage. At voltages below the undervoltage lockout
threshol d VVCCoff the gate drive is active low.
t
ISense
ILimit
tPropagation Delay
IOvershoot1
Ipeak1
Signal2Signal1
IOvershoot2
Ipeak2
0RSense dIpeak
dt
------------dVSense
dt
---------------
t
Vcsth
VOSC
Signal1 Signal2
VSense
max. Duty Cycle
off time
t
Propagation Delay
0.9
0.95
1
1.05
1.1
1.15
1.2
1.25
1.3
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
with compensation without com pen sation
dt
dVSense
V
V/us
VSense