CCD area image sensor S7030/S7031 series Back-thinned FFT-CCD The S7030/S7031 series is a family of FFT-CCD image sensors specifically designed for low-light-level detection in scientific applications. By using the binning operation, the S7030/S7031 series can be used as a linear image sensor having a long aperture in the direction of the device length. This makes the S7030/S7031 series suited for use in spectrophotometry. The binning operation offers significant improvement in S/N and signal processing speed compared with conventional methods by which signals are digitally added by an external circuit. The S7030/S7031 series also features low noise and low dark signal (MPP mode operation). This enables low-light-level detection and long integration time, thus achieving a wide dynamic range. The S7030/S7031 series has an effective pixel size of 24 x 24 m and is available in image areas ranging from 12.288 (H) x 1.392 (V) mm2 (512 x 58 pixels) up to a large image area of 24.576 (H) x 2.928 (V) mm2 (1024 x 250 pixels). Features Applications Non-cooled type: S7030 series One-stage TE-cooled type: S7031 series Fluorescence spectrometer, ICP Industrial inspection Pixel size: 24 x 24 m Semiconductor inspection Line, pixel binning Greater than 90% quantum efficiency at peak sensitivity wavelength DNA sequencer Low-light-level detection Raman spectrometer Wide spectral response range Low readout noise Wide dynamic range MPP operation High UV sensitivity with good stability Selection guide Type no. S7030-0906 S7030-0907 S7030-1006 S7030-1007 S7031-0906S S7031-0907S S7031-1006S S7031-1007S Cooling Non-cooled One-stage TE-cooled Number of total pixels 532 x 64 532 x 128 1044 x 64 1044 x 128 532 x 64 532 x 128 1044 x 64 1044 x 128 Number of effective pixels 512 x 58 512 x 122 1024 x 58 1024 x 122 512 x 58 512 x 122 1024 x 58 1024 x 122 Image size [mm (H) x mm (V)] 12.288 x 1.392 12.288 x 2.928 24.576 x 1.392 24.576 x 2.928 12.288 x 1.392 12.288 x 2.928 24.576 x 1.392 24.576 x 2.928 Suitable multichannel detector head C7040 C7041 Note: Two-stage TE-cooled type (S7032-1006/-1007) is available upon request (made-to-order product). www.hamamatsu.com 1 CCD area image sensor S7030/S7031 series Structure Parameter Pixel size (H x V) Vertical clock phase Horizontal clock phase Output circuit Package Window*1 S7030 series S7031 series 24 x 24 m 2 phases 2 phases One-stage MOSFET source follower 24-pin ceramic DIP (refer to dimensional outlines) Quartz glass*2 AR-coated sapphire*3 *1: Temporary window type (ex. S7030-0906N) is available upon request. (Temporary window is fixed by tape to protect the CCD chip and wire bonding.) *2: Resing sealing *3: Hermetic sealing Absolute maximum ratings (Ta=25 C) Parameter Operating temperature*4 Storage temperature Output transistor drain voltage Reset drain voltage Vertical input source voltage Horizontal input source voltage Vertical input gate voltage Horizontal input gate voltage Summing gate voltage Output gate voltage Reset gate voltage Transfer gate voltage Vertical shift register clock voltage Horizontal shift register clock voltage Symbol Topr Tstg VOD VRD VISV VISH VIG1V, VIG2V VIG1H, VIG2H VSG VOG VRG VTG VP1V, VP2V VP1H, VP2H Min. -50 -50 -0.5 -0.5 -0.5 -0.5 -10 -10 -10 -10 -10 -10 -10 -10 Typ. - Max. +50 +70 +25 +18 +18 +18 +15 +15 +15 +15 +15 +15 +15 +15 Unit C C V V V V V V V V V V V V Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the product within the absolute maximum ratings. *4: Package temperature (S7030 series), chip temperature (S7031 series) Operating conditions (MPP mode, Ta=25 C) Parameter Output transistor drain voltage Reset drain voltage Output gate voltage Substrate voltage vertical input source horizontal input source Test point vertical input gate horizontal input gate High Vertical shift register clock voltage Low High Horizontal shift register clock voltage Low High Summing gate voltage Low High Reset gate voltage Low High Transfer gate voltage Low External load resistance Symbol VOD VRD VOG VSS VISV VISH VIG1V, VIG2V VIG1H, VIG2H VP1VH, VP2VH VP1VL, VP2VL VP1HH, VP2HH VP1HL, VP2HL VSGH VSGL VRGH VRGL VTGH VTGL RL Min. 18 11.5 1 -9 -9 4 -9 4 -9 4 -9 4 -9 4 -9 20 Typ. 20 12 3 0 VRD VRD -8 -8 6 -8 6 -8 6 -8 6 -8 6 -8 22 Max. 22 12.5 5 8 -7 8 -7 8 -7 8 -7 8 -7 24 Unit V V V V V V V V V V V V V k 2 CCD area image sensor S7030/S7031 series Electrical characteristics (Ta=25 C) Parameter Symbol fc Signal output frequency Vertical shift register capacitance Horizontal shift register capacitance Summing gate capacitance Reset gate capacitance Transfer gate capacitance Charge transfer efficiency* DC output level*6 Output impedance*6 Power consumption*6 *7 5 S703*-0906 S703*-0907/-1006 S703*-1007 S703*-0906/-0907 S703*-1006/-1007 CP1V, CP2V S703*-0906/-0907 S703*-1006/-1007 Min. - CP1H, CP2H - CSG CRG - CTG - CTE Vout Zo P 0.99995 14 - Typ. 0.25 750 1500 3000 110 180 30 30 55 75 0.99999 16 3 13 Max. 1 - Unit MHz - pF - pF pF - pF 18 4 14 V k mW Max. 1000 100 16 10 0 10 3 0 Unit V pF *5: Charge transfer efficiency per pixel, measured at half of the full well capacity *6: The values depend on the load resistance. (Typical, VOD=20 V, Load resistance=22 k) *7: Power consumption of the on-chip amplifier plus load resistance Electrical and optical characteristics (Ta=25 C, unless otherwise noted) Parameter Saturation output voltage Vertical Full well capacity Horizontal*8 CCD node sensitivity 25 C Dark current*9 (MPP mode) 0 C Readout noise*10 Line binning Dynamic range*11 Area scanning Photoresponse nonuniformity*12 Spectral response range White spots Point defect*13 Black spots Blemish Cluster defect*14 Column defect*15 Symbol Vsat Fw Sv DS Nr DR PRNU - Min. 240 800 1.8 100000 30000 - Typ. Fw x Sv 320 1000 2.2 100 10 8 125000 40000 3 200 to 1100 - keV/ee-/pixel/s e- rms % nm - *8: The linearity is 1.5%. *9: Dark current nearly doubles for every 5 to 7 C increase in temperature. *10: Measured with a HAMAMATSU C4880 digital CCD camera with a CDS circuit (sensor temperature: -40 C, operating frequency: 150 kHz) *11: Dynamic range = Full well capacity / Readout noise *12: Measured at one-half of the saturation output (full well capacity) using LED light (peak emission wavelength: 560 nm) Photoresponse nonuniformity = Fixed pattern noise (peak to peak) Signal x 100 [%] *13: White spots Pixels whose dark current is higher than 1 ke- after one-second integration at 0 C. Black spots Pixels whose sensitivity is lower than one-half of the average pixel output. (measured with uniform light producing one-half of the saturation charge) *14: 2 to 9 contiguous defective pixels *15: 10 or more contiguous defective pixels 3 CCD area image sensor S7030/S7031 series Spectral response (without window)*16 (Typ. Ta=25 C) 100 90 Back-thinned CCD Quantum efficiency (%) 80 70 60 50 40 30 20 Front-illuminated CCD (UV coated) Front-illuminated CCD 10 0 200 400 600 800 1000 1200 Wavelength (nm) KMPDB0058EB *16: Spectral response with quartz glass or AR-coated sapphire is decreased according to the spectral transmittance characteristic of window material. Spectral transmittance characteristics Dark current vs. temperature (Typ.) 1000 (Typ. Ta=25 C) 100 90 100 Dark current (e-/pixel/s) 80 Transmittance (%) Quartz window 70 AR coated sapphire 60 50 40 30 10 1 0.1 20 10 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 0.01 -50 -40 -30 -20 -10 0 10 20 30 Temperature (C) Wavelength (nm) KMPDB0110EA KMPDB0256EA 4 CCD area image sensor S7030/S7031 series Device structure (conceptual drawing of top view) Effective pixels Thinning Effective pixels 23 15 20 21 13 14 2-bevel 22 H 1 signal out n 24 2 5 4 3 2 12345 4-bevel Thinning V 12 Horizontal shift register 2 3 4 5 4 blank pixels 8 2 n 11 V=58, 122 H=512, 1024 10 9 4 blank pixels signal out Horizontal shift register 6-bevel 6-bevel Note: When viewed from the direction of the incident light, the horizontal shift register is covered with a thick silicon layer (dead layer). However, long-wavelength light passes through the silicon dead layer and may possibly be detected by the horizontal shift register. To prevent this, provide light shield on that area as needed. KMPDC0016ED 5 CCD area image sensor S7030/S7031 series Timing chart Line binning Integration period (shutter must be open) Tpwv 1 Vertical binning period (shutter must be closed) 3.. 62 63 3..126 127 2 P1V Readout period (shutter must be closed) 64 58 + 6 (bevel): S703*-0906/-1006 128 122 + 6 (bevel): S703*-0907/-1007 Tovr P2V, TG 4..530 531 4..1042 1043 Tpwh, Tpws P1H 1 2 3 532 : S703*-0906/-0907 1044: S703*-1006/-1007 P2H, SG Tpwr RG OS D1 D1 D2..D10, S1..S512, D11..D19 D2..D10, S1..S1024, D11..D19 D20 : S703*-0906/-0907 D20 : S703*-1006/-1007 KMPDC0017ED Parameter P1V, P2V, TG*17 P1H, P2H*17 SG RG TG - P1H S703*-0906 Pulse width S703*-0907/-1006 S703*-1007 Rise and fall time Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Overlap time Symbol Tpwv Tprv, Tpfv Tpwh Tprh, Tpfh Tpws Tprs, Tpfs Tpwr Tprr, Tpfr Tovr Min. 1.5 3 6 10 500 10 500 10 100 5 3 Typ. 2 4 8 2000 50 2000 50 - Max. - Unit s ns ns ns % ns ns % ns ns s *17: Symmetrical clock pulses should be overlapped at 50% of maximum pulse amplitude. 6 CCD area image sensor S7030/S7031 series Area scanning: large full well mode Integration period (shutter must be open) Tpwv 1 2 Readout period (shutter must be closed) 4.. 63 4..127 3 64 58 + 6 (bevel): S703*-0906/-1006 128122 + 6 (bevel): S703*-0907/-1007 P1V P2V, TG P1H P2H, SG RG OS Tovr P2V, TG Enlarged view Tpwh, Tpws P1H P2H, SG Tpwr RG OS D1 D2 D3 D4 D18 S1..S512 D5..D10, S1..S1024, D11..D17 D19 D20 : S703*-0906/-0907 : S703*-1006/-1007 KMPDC0127EC Parameter P1V, P2V, TG*18 P1H, P2H*18 SG RG TG - P1H S703*-0906 Pulse width S703*-0907/-1006 S703*-1007 Rise and fall time Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Duty ratio Pulse width Rise and fall time Overlap time Symbol Tpwv Tprv, Tpfv Tpwh Tprh, Tpfh Tpws Tprs, Tpfs Tpwr Tprr, Tpfr Tovr Min. 1.5 3 6 10 500 10 500 10 100 5 3 Typ. 2 4 8 2000 50 2000 50 - Max. - Unit s ns ns ns % ns ns % ns ns s *18: Symmetrical clock pulses should be overlapped at 50% of maximum pulse amplitude. 7 CCD area image sensor S7030/S7031 series Dimensional outline (unit: mm) S7030-1006/-1007 S7030-0906/-0907 Window 16.3* Window 28.6* Photosensitive area 12.29 Photosensitive area 24.58 24 13 1 1 12 12 2.54 0.13 2.54 0.13 44.0 0.44 S7030-1006: A=1.392 S7030-1007: A=2.928 4.4 0.44 (24 x) 0.5 0.05 * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph KMPDA0047EG KMPDA0046EF S7031-0906S/-0907S Window 16.3* Photosensitive area 12.29 22.9 0.30 7.7 0.68 19.0 22.4 0.30 4.0 1 7.3 0.63 13 A 8.2* 24 12 2.54 0.13 34.0 0.34 42.0 50.0 0.30 Photosensitive surface 1st pin indication pad 6.65 0.63 4.89 0.15 1.0 3.0 TE-cooler S7031-0906S: A=1.392 S7031-0907S: A=2.928 4.8 0.49 3.0 4.8 0.49 4.4 0.44 2.35 0.15 3.75 0.44 3.0 (24 x) 0.5 0.05 S7030-0906: A=1.392 S7030-0907: A=2.928 Photosensitive surface 3.75 0.44 1st pin indication pad Photosensitive surface 2.35 0.15 34.0 0.34 1st pin indication pad 22.9 0.30 22.4 0.30 A 8.2* 22.4 0.30 22.9 0.30 13 A 8.2* 24 (24 x) 0.5 0.05 * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph KMPDA0048EG 8 CCD area image sensor S7030/S7031 series S7031-1006S/-1007S Window 28.6* Photosensitive area 24.58 22.9 0.30 19.0 4.0 1 22.4 0.30 13 A 8.2* 24 12 2.54 0.13 44.0 0.44 52.0 60.0 0.30 Photosensitive surface 1st pin indication pad S7031-1006S: A=1.392 S7031-1007S: A=2.928 7.7 0.68 7.3 0.63 6.65 0.63 1.0 4.89 0.15 3.0 TE-cooler (24 x) 0.5 0.05 * Size of window that guarantees the transmittance in the "Spectral transmittance characteristics" graph KMPDA0049EH Pin connections Pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol RD OS OD OG SG P2H P1H IG2H IG1H ISH TG*19 P2V P1V SS ISV IG2V IG1V RG S7030 series Function Reset drain Output transistor source Output transistor drain Output gate Summing gate CCD horizontal register clock-2 CCD horizontal register clock-1 Test point (horizontal input gate-2) Test point (horizontal input gate-1) Test point (horizontal input source) Transfer gate CCD vertical register clock-2 CCD vertical register clock-1 Substrate (GND) Test point (vertical input source) Test point (vertical input gate-2) Test point (vertical input gate-1) Reset gate Symbol RD OS OD OG SG P2H P1H IG2H IG1H ISH TG*19 P2V P1V Th1 Th2 PP+ SS ISV IG2V IG1V RG S7031 series Function Reset drain Output transistor source Output transistor drain Output gate Summing gate CCD horizontal register clock-2 CCD horizontal register clock-1 Test point (horizontal input gate-2) Test point (horizontal input gate-1) Test point (horizontal input source) Transfer gate CCD vertical register clock-2 CCD vertical register clock-1 Thermistor Thermistor TE-coolerTE-cooler+ Substrate (GND) Test point (vertical input source) Test point (vertical input gate-2) Test point (vertical input gate-1) Reset gate Remark (standard operation) +12 V RL=22 k +20 V +3 V Same pulse as P2H -8 V -8 V Connect to RD Same pulse as P2V GND Connect to RD -8 V -8 V *19: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse as P2V. 9 CCD area image sensor S7030/S7031 series Specifications of built-in TE-cooler (Typ. vacuum condition) Parameter Internal resistance Maximum current*20 Maximum voltage Maximum heat absorption*23 Maximum temperature of heat radiating side Symbol Condition Rint Ta=25 C Imax Tc*21=Th*22=25 C Vmax Tc*21=Th*22=25 C Qmax S7031-0906S/-0907S 2.5 1.5 3.8 3.4 S7031-1006S/-1007S 1.2 3.0 3.6 5.1 Unit A V W 70 70 C - *20: If the current greater than this value flows into the thermoelectric cooler, the heat absorption begins to decrease due to the Joule heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and maintain stable operation, the supply current should be less than 60% of this maximum current. *21: Temperature of the cooling side of thermoelectric cooler *22: Temperature of the heat radiating side of thermoelectric cooler *23: This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the maximum current is supplied to the unit. 6 7 20 6 3 -10 2 -20 -30 1 -30 -40 2.0 0 3 -10 2 -20 1 1.0 1.5 20 0 0 0.5 30 4 4 0 Voltage vs. Current CCD temperature vs. Current 10 10 0 (Typ. Ta=25 C) 5 5 Voltage (V) Voltage vs. Current CCD temperature vs. Current 30 CCD temperature (C) (Typ. Ta=25 C) 7 Voltage (V) S7031-1006S/-1007S 0 1 2 3 4 CCD temperature (C) S7031-0906S/-0907S -40 Current (A) Current (A) KMPDB0179EA KMPDB0178EA Specifications of built-in temperature sensor A thermistor chip is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation between the thermistor resistance and absolute temperature is expressed by the following equation. RT1 = RT2 x exp BT1/T2 (1/T1 - 1/T2) RT1: Resistance at absolute temperature T1 [K] RT2: Resistance at absolute temperature T2 [K] BT1/T2: B constant [K] R298=10 k B298/323=3450 K Resistance The characteristics of the thermistor used are as follows. (Typ. Ta=25 C) 1 M 100 k 10 k 220 240 260 Temperature (K) 280 300 KMPDB0111EB 10 CCD area image sensor S7030/S7031 series Precautions (electrostatic countermeasures) Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with an earth ring, in order to prevent electrostatic damage due to electrical charges from friction. Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge. Ground the tools used to handle these sensors, such as tweezers and soldering irons. It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage that occurs. Element cooling/heating temperature incline rate When cooling the CCD by an externally attached cooler, set the cooler operation so that the temperature gradient (rate of temperature change) for cooling or allowing the CCD to warm back is less than 5 K/minute. Related information www.hamamatsu.com/sp/ssd/doc_en.html Precautions Notice Image sensors/Precautions Technical information FFT-CCD area image sensor/Technical information Multichannel detector heads C7040, C7041 Features C7040: for S7030 series C7041: for S7031 series Area scanning or full line-binnng operation Readout frequency: 250 kHz Readout noise: 20 e- rms T=50 C (T changes by cooling method.) Input Master start Symbol VD1 VA1+ VA1VA2 VD2 Vp VF ms Master clock mc Supply voltage Value +5 Vdc, 200 mA +15 Vdc, +100 mA -15 Vdc, -100 mA +24 Vdc, 30 mA +5 Vdc, 30 mA (C7041) +5 Vdc, 2.5 A (C7041) +12 Vdc, 100 mA (C7041) HCMOS logic compatible HCMOS logic compatible, 1 MHz 11 CCD area image sensor S7030/S7031 series Multichannel detector head controller C7557-01 Features For control of multichannel detector head and data acquisition Easy control and data acquisition using supplied software via USB interface Connection example Shutter* timing pulse AC cable (100 to 240 V; included with C7557-01) Trig. oe Dedicated cable (included with C7557-01) USB cable (included with C7557-01) oe Image sensor + Multichannel detector head C7557-01 PC [Windows 2000/XP/Vista, 7 (32-bit)] (USB 2.0) * Shutter, etc. are not available. KACCC0402EC Information described in this material is current as of August, 2012. Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always contact us for the delivery specification sheet to check the latest specifications. Type numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or a suffix "(Z)" which means developmental specifications. The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use. Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission. www.hamamatsu.com HAMAMATSU PHOTONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184 U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218 Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Thorshamnsgatan 35 16440 Kista, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1 int. 6, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741 China: Hamamatsu Photonics (China) Co., Ltd.: 1201 Tower B, Jiaming Center, No.27 Dongsanhuan Beilu, Chaoyang District, Beijing 100020, China, Telephone: (86) 10-6586-6006, Fax: (86) 10-6586-2866 Cat. No. KMPD1023E18 Aug. 2012 DN 12