LT5502
1
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
■
IEEE802.11
■
High Speed Wireless LAN
■
Wireless Local Loop
■
Single 1.8V to 5.25V Supply
■
IF Frequency Range: 70MHz to 400MHz
■
84dB Limiting IF Gain
■
90dB Linear RSSI Range
■
7.7MHz Lowpass Output Filter
■
Baseband I/Q Amplitude Imbalance: <0.7dB
■
4dB Noise Figure
■
Low Supply Current: 25mA
■
Outputs Biased Up While in Standby
■
Shutdown Current: 1µA
■
24-Lead Narrow SSOP Package
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
400MHz Quadrature
IF Demodulator with RSSI
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LT
®
5502 is a 70MHz to 400MHz monolithic integrated
quadrature IF demodulator. It consists of an IF limiter,
quadrature down mixers, integrated lowpass filters, and
divide-by-two LO buffers. The demodulator provides all
building blocks for demodulation of I and Q baseband
signals with a single supply voltage of 1.8V to 5.25V. The
IF limiter has 84dB small-signal gain, and a built-in receive
signal strength indicator (RSSI) with over 90dB linear
range. The input referred noise-spectral-density is
1.45nV/√Hz, which is equivalent to a 4dB noise figure
when the input is terminated with a 50Ω source. The
integrated lowpass output filters act as antialiasing and
pulse-shaping filters for demodulated I/Q-baseband sig-
nals. The 3dB cutoff frequency of the filters is about
7.7MHz. The VCO frequency is required to be twice the
desired operating frequency to provide quadrature local
oscillator (LO) signals to the mixers. The standby mode
provides fast transient response to the receive mode with
reduced supply current when the I/Q outputs are
AC-coupled to a baseband chip.
I/Q Output Swing, RSSI Output vs IF Input Power
IF INPUT POWER (dBm)
–85
DIFFERENTIAL OUTPUT SWING (mV
P-P
)
1200
1000
800
600
400
200
RSSI OUTPUT (V)
1.2
1.0
0.8
0.6
0.4
0.2
–70 –55 –40 –25
5502 TA01b
–10 5
2XLO
+
2XLO
–
IF
+
IF
–
EN
V
CC
I
OUT+
I
OUT–
Q
OUT+
Q
OUT–
90°
0°
GND
2V
C2
1µFC1
1nF
C4
1.8pF
RSSI
ENABLE
2XLO
INPUT
IF
INPUT R1
240Ω
C3
22nF
BASEBAND
DIFFERENTIAL
I/Q OUTPUTS
5502 TA01a
÷2
LT5502
LT5502
2
Power Supply Voltage ............................................ 5.5V
LO Input Power .................................................. 10dBm
IF Input Power .................................................... 10dBm
Operating Ambient
Temperature (Note 2) ..............................–40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Voltage on any Pin not to Exceed ............................. V
CC
ORDER PART
NUMBER
T
JMAX
= 150°C, θ
JA
= 85°C/W
LT5502EGN
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
ELECTRICAL CHARACTERISTICS
VCC = 3V, f2XLO = 570MHz, P2XLO = –10dBm, fIF = 280MHz,
PIF = –50dBm, TA = 25°C, unless otherwise noted. (Note 3)
Consult factory for parts specified with wider operating temperature ranges.
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
GN PACKAGE
24-LEAD NARROW PLASTIC SSOP
24
23
22
21
20
19
18
17
16
15
14
13
Q
OUT+
Q
OUT–
V
CC
GND
GND
2XLO
+
2XLO
–
V
CC
V
CC
RSSI
GND
IFt
–
I
OUT+
I
OUT–
GND
V
CC
GND
IF
+
IF
–
GND
GND
EN
STBY
IFt
+
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IF Input
f
IF
Frequency Range 70 to 400 MHz
3dB Limiting Sensitivity –79 dBm
Noise Figure Terminated 50Ω Source 4 dB
DC Common Mode Voltage 2.6 V
Demodulator I/Q Output
I/Q Output Voltage Swing Differential 850 mV
P-P
I/Q Amplitude Mismatch 0.1 0.7 dB
I/Q Phase Mismatch 0.6 DEG
Output Driving Capability Differential; C
MAX
= 10pF 1.5 kΩ
DC Common Mode Voltage 1.84 V
RSSI
Linear Dynamic Range (Note 4) ±3dB Linearity Error 90 dB
Output Impedance 3.8 kΩ
Output Voltage Input = –70dBm 0.27 0.41 0.54 V
Output Voltage Input = 0dBm 0.8 1.01 1.2 V
Output Voltage Slope Input from –70dBm to 0dBm 8.7 mV/dB
Linearity Error Input from –70dBm to 0dBm 1 dB
Baseband Lowpass Filter
3dB Cutoff Frequency 7.7 MHz
Group Delay Ripple 16.4 ns
LT5502
3
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Power Supply Current
vs Temperature I/Q Output Swing vs Temperature I/Q Output Swing vs IF Input Power
ELECTRICAL CHARACTERISTICS
VCC = 3V, f2XLO = 570MHz, P2XLO = –10dBm, fIF = 280MHz,
PIF = –50dBm, TA = 25°C, unless otherwise noted. (Note 3)
(Note 3)
IF INPUT POWER (dBm)
–85
DIFFERENTIAL OUTPUT SWING (mV
P-P
)
5
5502 G03
–70 –55 –40 –25 –10
1200
1000
800
600
400
200
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
V
CC
= 3V
f
IF
= 280MHz
SUPPLY VOLTAGE (V)
1.8
SUPPLY CURRENT (mA)
5.5
5502 G01
2.5 3.5 4.5
36
32
28
24
20
16
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
SUPPLY VOLTAGE (V)
1.8
DIFFERENTIAL OUTPUT SWING (mV
P-P
)
800
1000
5.5
5502 G02
600
400 2.5 3.5 4.5
1200
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
f
IF
= 280MHz
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
2XLO
f
2XLO
Frequency Range 140 to 800 MHz
P
2XLO
Input Power –20 –5 dBm
DC Common Mode Voltage 2.6 V
Power Supply
V
CC
Supply Voltage 1.8 5.25 V
I
CC
Supply Current EN = High 25 32 mA
I
OFF
Shutdown Current EN = Low; Standby = Low 1 100 µA
Standby Mode Current EN = Low; Standby = High 2.6 3.5 mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
a device may be impaired.
Note 2: Specifications over the –40°C to 85°C temperature range are
assured by design, characterization and correlation with statistical process
controls.
Note 3: Tests are performed as shown in the configuration of Figure 3.
Note 4: Tests are performed as shown in the configuration of Figure 1 for
IF input.
LT5502
4
RSSI Output Voltage vs VCC
IF Input Sensitivity
vs Temperature IF Input Sensitivity vs IF Frequency
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LPF Frequency Response
vs Baseband Frequency LPF Group Delay
vs Baseband Frequency LPF Frequency Response vs VCC
(Note 3)
IF INPUT POWER (dBm)
–85
RSSI OUTPUT (V)
5
5502 G07
–70 –55 –40 –25 –10
1.2
1.0
0.8
0.6
0.4
0.2
f
IF
= 280MHz
T
A
= 25°C
V
CC
= 3V
V
CC
= 5.5V V
CC
= 1.8V
SUPPLY VOLTAGE (V)
1.8
INPUT SENSITIVITY (dBm)
5.5
5502 G08
2.5 3.5 4.5
–73
–75
–77
–79
–81
–83
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
f
IF
= 280MHz
IF FREQUENCY (MHz)
70
INPUT SENSITIVITY (dBm)
–79
–76
5502 G09
–82
–85 150 200 250 300 350 400100
–73
T
A
= –40°C
T
A
= 25°C
V
CC
= 3V
T
A
= 85°C
BASEBAND FREQUENCY (MHz)
0
GAIN RESPONSE (dB)
12 20
5502 G10
48 16
5
0
–5
–10
–15
–20
–25
–30
–35
VCC = 3V
TA = 85°C
TA = –40°C
TA = 25°C
BASEBAND FREQUENCY (MHz)
0
GROUP DELAY (ns)
110
95
80
65
50
35
20 4 8 12 16
5502 G11
20
V
CC
= 3V
T
A
= 85°C
T
A
= –40°C
T
A
= 25°C
BASEBAND FREQUENCY (MHz)
0
GAIN RESPONSE (dB)
12 20
5502 G12
48 16
5
0
–5
–10
–15
–20
–25
–30
–35
110
90
70
50
30
V
CC
= 1.8V, 3V, 5.5V
T
A
= 25°C
GROUP DELAY (ns)
I/Q Output Swing vs IF Input Power RSSI Output vs Temperature RSSI Output Voltage vs IF Frequency
IF INPUT POWER (dBm)
–85
DIFFERENTIAL OUTPUT SWING (mV
P-P
)
5
5502 G04
–70 –55 –40 –25 –10
1200
1000
800
600
400
200
f
IF
= 70MHz
f
IF
= 280MHz
f
IF
= 400MHz
V
CC
= 3V
T
A
= 25°C
IF INPUT POWER (dBm)
–85
RSSI OUTPUT (V)
5
5502 G05
–70 –55 –40 –25 –10
1.2
1.0
0.8
0.6
0.4
0.2
T
A
= –40°C
T
A
= 85°C
V
CC
= 3V
f
IF
= 280MHz
T
A
= 25°C
IF INPUT POWER (dBm)
–85
RSSI OUTPUT (V)
5
5502 G06
–70 –55 –40 –25 –10
1.2
1.0
0.8
0.6
0.4
0.2
f
IF
= 70MHz
f
IF
= 280MHz
V
CC
= 3V
T
A
= 25°C
f
IF
= 400MHz
LT5502
5
UU
U
PI FU CTIO S
I
OUT+
(Pin 1): Positive Baseband Output Pin of I-Channel.
The DC bias voltage is V
CC
– 1.16V. This pin should not be
shorted to ground.
I
OUT–
(Pin 2): Negative Baseband Input Pin of I-Channel.
The DC bias voltage is V
CC
– 1.16V. This pin should not be
shorted to ground.
GND (Pins 3, 5, 8, 9, 14, 20, 21): Ground Pin.
V
CC
(Pins 4, 16, 17, 22): Power Supply Pin. This pin
should be decoupled using 1000pF and 0.1µF capacitors.
IF
+
(Pin 6): Positive IF Input Pin. The DC bias voltage is
V
CC
– 0.4V.
IF
–
(Pin 7): Negative IF Input Pin. The DC bias voltage is
V
CC
– 0.4V.
EN (Pin 10): Enable Pin. When the input voltage is higher
than 0.9V or up to V
CC
, the circuit is completely turned on.
When the input voltage is less than 0.7V or down to
ground, the circuit is turned off except the part of the
circuit associated with standby mode.
STBY (Pin 11): Standby Pin. When the input voltage is
higher than 0.9V or up to V
CC
, the circuit of standby mode
is turned on to bias the I/Q buffers to desired quiescent
voltage. When the input voltage is less than 0.7V or down
to ground, it is turned off.
IFt
+
(Pin 12): Interstage IF Positive Pin. The DC bias
voltage is V
CC
– 0.25V.
IFt
–
(Pin 13): Interstage IF Negative Pin. The DC bias
voltage is V
CC
– 0.25V.
RSSI (Pin 15): RSSI Output Pin.
2XLO
–
(Pin 18): Negative Carrier Input Pin. The input-
signal’s frequency must be twice that of the desired
demodulator LO frequency. The DC bias voltage is V
CC
–
0.4V.
2XLO
+
(Pin 19): Positive Carrier Input Pin. The input-
signal’s frequency must be twice that of the desired
demodulator LO frequency. The DC bias voltage is V
CC
–
0.4V.
Q
OUT–
(Pin 23): Negative Baseband Output Pin of the
Q-Channel. The DC bias voltage is V
CC
– 1.16V. This pin
should not be shorted to ground.
Q
OUT+
(Pin 24): Positive Baseband Output Pin of the
Q-Channel. The DC bias voltage is V
CC
– 1.16V. This pin
should not be shorted to ground.
BLOCK DIAGRA
W
2XLO
+
2XLO
–
IF
+
IF
–
EN
BIAS
5502 BD
LIMITER
2
LIMITER
1
1
6
12 13
7
2
24
23
10
15
RSSI
RSSI
LO
BUFFERS
IFt
+
IFt
–
I
OUT+
I
OUT–
Q
OUT+
Q
OUT–
Q-MIXER
I-MIXER
LPF
LPF
1
1
DIVIDE 2
0°/90°
19 18
LT5502
6
APPLICATIO S I FOR ATIO
WUUU
The LT5502 consists of the following sections: IF limiter,
I/Q demodulators, quadrature LO carrier generator, inte-
grated lowpass filters (LPFs), and bias circuitry.
An IF signal is fed to the inputs of the IF limiter. The limited
IF signal is then demodulated into I/Q baseband signals
using the quadrature LO carriers that are generated from
the divide-by-two circuit. The demodulated I/Q signals are
passed through 5th order LPFs and buffered with an
output driver.
IF Limiter
The IF limiter has 84dB small-signal gain with a frequency
range of 70MHz to 400MHz. It consists of two cascaded
stages of IF amplifiers/limiters. The differential outputs of
the first stage are connected internally to the differential
inputs of the second stage. An interstage filtering is
possible in between (Pin 12 and Pin 13) with minimum off-
chip components. It can be a simple parallel LC tank circuit
L1 and C8 as shown in Figure 3. The 22nF blocking
capacitor, C19, is used for the proper operation of the
internal DC offset canceling circuit. To achieve the best
receiver sensitivity, a differential configuration at the IF
input is recommended due to its better immunity to 2XLO
signal coupling to the IF limiter. Otherwise, the 2XLO
interference, presented at the IF inputs, may saturate the
IF limiter and reduce the gain of the wanted IF signal. The
receiver’s 3dB input-limiting sensitivity will be affected
correspondingly. The interstage bandpass filter will mini-
mize both 2XLO feedthrough and the receiver’s noise
bandwidth. Therefore, the receiver’s input sensitivity can
be improved. Without the interstage filter, the second
stage will be limited by the broadband noise amplified by
the first stage. The noise bandwidth in this case can be as
high as 500MHz. The 3dB input limiting sensitivity is about
–79dBm at an IF frequency of 280MHz when terminated
with 200Ω at the input. The differential IF input impedance
is 2.2kΩ. Therefore, a 240Ω resistor is used for R3 as
shown in Figure 3. Using a bandpass filter with 50MHz
bandwidth, the input sensitivity is improved to –86dBm.
The 1:4 IF input transformer can also be replaced with a
narrow band single-to-differential conversion circuit
using three discreet elements as shown in Figure 1. Their
nominal values are listed in Table 1. Due to the parasitics
of the PCB, their values need to be compensated. The
receiver’s input sensitivity in this case is improved to
–85dBm even without interstage filtering. The matching
circuit is essentially a second order bandpass filter. There-
fore, the requirement for the front-end channel-select
filter can be eased too.
Figure 1. IF Input Matching Network at 280MHz
Table 1. The Component Values of Matching Network
LSH, CS1 and CS2
f
IF
(MHz) L
SH
(nH) C
S1
/C
S2
(pF)
70 642 13.7
100 422 9.6
150 256 6.4
200 176 4.8
250 130 3.8
300 101 3.2
350 80.4 2.7
400 66.0 2.4
In an application where a lower input sensitivity is satisfac-
tory, one of the IF inputs can be simply AC-terminated with
a 50Ω resistor and the other AC-grounded. The input
receiver’s sensitivity is about – 76dBm at 280MHz in this
case.
CS1
3.3pF C5
22nF
CS2
3.3pF
LSH
120nH
IF
INPUT TO IF+
TO IF–
5502 F01
MATCHING NETWORK
LT5502
7
The receive signal strength indicator (RSSI) is built into
the IF limiter. The input IF signal is detected in a current
output proportional to the IF input power. The current
outputs from two cascaded stages of IF amplifiers/limiters
are summed and converted into the RSSI voltage. The
RSSI output has an excellent linear range of 90dB. The
characteristic of RSSI output voltage versus input IF
power is independent of temperature and process varia-
tion. The nominal output impedance is 3.8kΩ. An off-chip
capacitor C7 is needed to reduce the RSSI voltage ripple.
Its value can be determined using the following formula:
CfF
IF
71
760
≥π•
I/Q Demodulators
The quadrature demodulators are double balanced mix-
ers, down converting the limited IF signals from the IF
Limiter into I/Q baseband signals. The quadrature LO
carriers are obtained from the internal quadrature LO
carrier generator. The nominal output voltage of differen-
tial I/Q baseband signals is about 850mV
P-P
. These mag-
nitudes are well matched, and their phases are 90° apart.
Quadrature LO Carrier Generator
The quadrature LO carrier generator consists of a divide-
by-two circuit and LO buffers. An input signal (2XLO) with
twice the desired LO carrier frequency is used as the clock
for the divide-by-two circuit, producing the quadrature LO
carriers for the demodulators. The outputs are buffered
and then drive the down converting mixers. With a full
differential approach, the quadrature LO carriers are well
matched.
Integrated Low Pass Filters
The 5th order integrated lowpass filters are used for
filtering the down converted baseband outputs for both
the I-channel and the Q-channel. They serve as anti-
aliasing and pulse-shaping filters. The I/Q filters are well
matched in gain response and group delay. The 3dB
corner frequency is 7.7MHz and the group delay ripple is
16.4ns. The I/Q differential outputs have output driving
capability of 1.5kΩ with maximum capacitive loading of
10pF. The outputs are internally biased at V
CC
–1.16V.
Figure 2 shows the simplified output circuit schematic of
I-channel or Q-channnel.
APPLICATIO S I FOR ATIO
WUUU
The I/Q baseband outputs can be directly DC-coupled to
the inputs of a baseband chip. For AC-coupled applica-
tions with large coupling capacitors, the STBY pin can be
used to prebias the outputs to the desired quiescent
voltage at much reduced current. This mode only draws
2.6mA. When the EN pin is then turned on, the chip is
quickly switched to normal operating mode without long
time constants due to charging or discharging the large
coupling capacitors. Table 2 shows the logic of the EN pin
and STBY pin. In both normal operating mode and standby
mode, the maximum discharging current is about 200µA,
and the maximum charging current is more than 10mA.
Table 2. The logic of different operating modes
EN STBY Comments
Low Low Shutdown Mode
Low High Standby Mode
High Low or High Normal Operation Mode
5502 F02
200µA 200µA
V
CC
I
OUT+
(OR Q
OUT+
)
I
OUT–
(OR Q
OUT–
)
I-CHANNEL
(OR Q-CHANNEL):
DIFFERENTIAL
SIGNALS FROM LPF
+
–
+
–
Figure 2. Simplified Circuit Schematic
of I-Channel (or Q-Channel) Outputs
LT5502
8
TYPICAL APPLICATIO S
U
Figure 3. Evaluation Circuit Schematic With I/Q Output Buffers
–
+
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Q
OUT+
Q
OUT–
V
CC
GND
GND
2XLO
+
2XLO
–
V
CC
V
CC
RSSI
GND
IFt
–
I
OUT+
I
OUT–
GND
V
CC
GND
IF
+
IF
–
GND
GND
EN
STBY
IFt
+
÷2
U1
LT5502
T1
JTX-4-10T
1:4
MINI-CIRCUIT 4:1
MINI-CIRCUIT
IF
IN
R10
5.11k
R7
49.9
R3
240Ω
R2
20k
R1
20k
R9
51.1k
C12
1.8pF R13
5.11k
C16
1.8pF
C5
22nF R4
240Ω
C10
1µF
C1
1µF
C9
1µFC24
10µFC20
1µF
C25
10µF
C2
1nF
SW1
1 = EN
2 = STBY
16
1
6
–
+
7 7
6 6
4 4
3
2
3
2
J2
I
OUT
I
OUT+
I
OUT–
Q
OUT+
Q
OUT–
Q
OUT
J1 T2
JTX-4-10T J4
C23
1µF
C19
22nF
C11
1µF
C4
1nF
C3
1nF
C18
1µFC7
1.8pF
C13
1µFR16
49.9 J3
C17
1µF
U2
LT1809CS U3
LT1809CS
L1
C8
R17
IF INTERSTAGE
OPTIONAL CIRCUIT
RSSI
V
CC2
V
CC1
V
CC2
R6
2.55k C15
1µF
R12
2.55k
R8
51.1k R14
51.1k
C14
1µF
R15
51.1k
2XLO
5502 F02
LT5502
9
TYPICAL APPLICATIO S
U
Figure 5. Component Side Layout of Evaluation Board
Figure 4.Component Side Silkscreen of Evaluation Board
LT5502
10
TYPICAL APPLICATIO S
U
Figure 7. Bottom Side Layout of Evaluation Board
Figure 6.Bottom Side Silkscreen of Evaluation Board
LT5502
11
PACKAGE DESCRIPTIO
U
Dimensions in inches (millimeters) unless otherwise noted.
0.337 – 0.344*
(8.560 – 8.738)
GN24 (SSOP) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
12
345678 9 10 11 12
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
161718192021222324 15 14 13
0.016 – 0.050
(0.406 – 1.270)
0.015 ± 0.004
(0.38 ± 0.10) × 45°
0° – 8° TYP
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
0.004 – 0.0098
(0.102 – 0.249)
0.0250
(0.635)
BSC
0.033
(0.838)
REF
GN Package
24-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
LT5502
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 2001
5502f LT/TP 0101 2K • PRINTED IN USA
TYPICAL APPLICATIO
U
Example: 2.4GHz to 2.5GHz Receiver Application (RX IF = 280MHz)
5502 TA02
LO
BUFFER
f/2
I MIXER
Q MIXER
I
OUTPUTS
Q
OUTPUTS
1
2
24
23
11
10
A/D
A/D
BASEBAND
PROCESSOR
BUFFER
BUFFER
LPF
LPF
0°
90°
LIMITER
1LIMITER
2
STBY
EN
LT5502
30nH
30nH
200Ω
2.7pF
100pF
2.7pF
IF
SYNTHESIZER
3,5,8,9,
14,20,21 18 19
1.8pF
15
120nH
22nF
3.3pF
4,16,17,22
V
CC
0.1µF
2V
12 13
6
7
280MHz IF
SAW BP
FILTER
RX
FRONT END
RX INPUT:
2.4GHz TO
2.5GHz
MAIN
SYNTHESIZER
3.3pF
RSSI
2nd LO,
560MHz
1st LO,
2.12GHz
TO 2.22GHz
1nF1nF