FQB34N20LTM_SB82076 - Fairchild Semiconductor

June 2000

Rev. A, June 2000

FQB34N20L / FQI34N20L

QFET

QFETQFET

QFETTM

FQB34N 20L / FQI34N20L

200V LOGIC N-Channel MOSFET

General Description

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switching DC/DC converters,

switch mode power supply, motor control.

Features

• 31A, 200V, RDS(on) = 0.075Ω @VGS = 10 V

• Low gate charge ( typical 55 nC)

• Low Crss ( typical 52 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• Low level gate drive requirement allowing direct

opration from logic drivers

Absolute Maxim u m Ratin g s TC = 25°C unless otherwise noted

Thermal Characteristics

Symbol Parameter FQB34N20L / FQI34N20L Units

VDSS Drain-Source Voltage 200 V

IDDrain Current - Continuous (TC = 25°C) 31 A

- Continuous (TC = 100°C) 20 A

IDM Drain Current - Pulsed (Note 1) 124 A

VGSS Gate-Source Voltage ± 20 V

EAS Single Pulsed Avalanche Energy (Note 2) 640 mJ

IAR Avalanche Current (Note 1) 31 A

EAR Repetitive Avalanche Energy (Note 1) 18 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 5.5 V/ns

PDPower Dissipation (TA = 25°C) * 3.13 W

Power Dissipation (TC = 25°C) 180 W

- Derate above 25°C 1.43 W/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C

TLMaximum lead temperature for soldering purposes,

1/8” from case for 5 seconds 300 °C

Symbol Parameter Typ Max Units

RθJC Thermal Resistance, Junction-to-Case -- 0.7 °C/W

RθJA Thermal Resistance, Junction-to-Ambient * -- 40 °C/W

RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

* When mounted on the minimum pad size recommended (PCB Mount)

D2-PAK

FQB Series I2-PAK

FQI Series

FQB34N20L / FQI34N20L

Rev. A, June 2000

(Note 4)

(Note 4, 5)

(Note 4)

Electrical Characteristics TC = 25°C unless otherwise noted

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 1.0mH, IAS = 31A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 34A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C

4. Pulse Test : Pulse width ≤300µs, Duty cycle ≤2%

5. Essentially independent of operating temperature

Symbol Parame ter Test Condit i ons Min Typ Max Units

Off Characteristics

BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA200 -- -- V

∆BVDSS

/ ∆TJ

Breakdown Voltage Temperature

Coefficient ID = 250 µA, Referenced to 25°C -- 0.16 -- V/°C

IDSS Zero Gate Voltage Drain Current VDS = 200 V, VGS = 0 V -- -- 1 µA

VDS = 160 V, TC = 125°C -- -- 10 µA

IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA

IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA

On Characteri st ics

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA1.0 -- 2.0 V

RDS(on) Static Drain-Source

On-Resistance VGS = 10 V, ID = 15.5 A

VGS = 5 V, I D = 15.5 A -- 0.057

0.060 0.075

0.080 Ω

gFS Forward Transconductance VDS = 30 V, ID = 15.5 A -- 41 -- S

Dynamic Characteristics

Ciss Input Capacitance VDS = 25 V, VGS = 0 V,

f = 1.0 MHz

-- 3000 3900 pF

Coss Output Capacitance -- 400 520 pF

Crss Reverse Transfer Capacitance -- 52 67 pF

Switching Characteristics

td(on) Turn-On Delay Time VDD = 100 V, ID = 34 A,

RG = 25 Ω

-- 45 100 ns

trTurn-On Rise Time -- 520 1050 ns

td(off) Turn-Off D e l a y Time -- 17 0 350 n s

tfTurn -Off Fa ll Time -- 3 7 0 750 n s

QgTotal Gate Ch arge VDS = 160 V, ID = 34 A,

VGS = 5 V

-- 55 72 nC

Qgs Gate-Source Charge -- 9.9 -- nC

Qgd Gate-Drain Charge -- 27 -- nC

Drain-Source Diode Character istics and Maximum Ratings

ISMaximum Continuous Drain-Source Diode Forward Current -- -- 31 A

ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 124 A

VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 31 A -- -- 1.5 V

trr Reverse Recovery Time VGS = 0 V, I S = 34 A,

dIF / dt = 100 A/µs

-- 205 -- ns

Qrr Reverse Recovery Charge -- 1.1 -- µC

FQB34N20L / FQI34N20L

Rev. A, June 2000

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

10-1

100

101

102

150℃

※ Notes :

1. VGS = 0V

2. 250μ

s Pulse Test

25℃

IDR, Reverse Drain Current [A]

VSD, So u r c e-Drain vo ltag e [V]

0246810

10-1

100

101

102

※ No tes :

1 . VDS = 30V

2. 250μ

s Pulse Test

-55℃

150℃

25℃

ID , Drain Curr e n t [A ]

VGS , Gate-Source Voltage [V]

10-1 100101

100

101

102 VGS

To p : 10 .0 V

8.0 V

6.0 V

5.0 V

4.5 V

4.0 V

3.5 V

Bo tto m : 3.0 V

※ Notes :

1. 250μ

s Pu lse Te st

2. TC = 25℃

ID, Drain Current [A]

VDS, Drain-Source Voltage [V]

0 20406080100120

VDS = 100V

VDS = 40V

VDS = 160V

※ Note : ID = 34 A

VGS, Gate-Source Voltage [V]

QG, To tal Gat e Charge [n C]

10-1 100101

700

1400

2100

2800

3500

4200

4900

5600

6300

7000 Ciss = Cgs + Cgd (Cds = shorted )

Coss = C ds + Cgd

Crss = Cgd

※ Notes :

1. VGS = 0 V

2. f = 1 MHz

Crss

Coss

Ciss

Capacitance [pF]

VDS, Drain-Source Voltage [V]

0306090120

0.00

0.05

0.10

0.15

0.20

0.25

VGS = 10V

VGS = 5V

※ N ote : T J = 25℃

RDS(ON) [Ω],

Drain-Source On-Resistance

ID, Dra i n Curr e nt [A]

Typical Characteristics

Figure 5. C apacitanc e C haracteristics Figure 6. Gate Ch arge Cha ra ct eri stics

Figu re 3. On-Res i stance Variation vs.

Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage

Variation vs. Source Current

and Temperature

Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ic s

FQB34N20L / FQI34N20L

Rev. A, June 2000

10-5 10-4 10-3 10-2 10-1 100101

10-2

10-1

100

※ Note s :

1 . ZθJC(t) = 0 .7 ℃/W Ma x .

2 . D u ty F a c to r , D=t1/t2

3 . TJM - T C = P DM * Z θJC(t)

s ingle pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

ZθJC

(t), T h ermal R e sp o ns e

t1, S q u a re W a ve P u ls e Du ra tio n [s e c]

25 50 75 100 125 150

ID, Drain Current [A]

TC, Case Temperature [℃

]

100101102

10-1

100

101

102

10 ms

1 ms

100 µs

Operation in This Area

is Limited by R DS(on)

※ No tes :

1. TC = 25 oC

2. TJ = 150 oC

3. Single Pulse

ID, Drain Cur re nt [A]

VDS, Drain-Source Voltage [V]

-100 -50 0 50 100 150 200

0.0

0.5

1.0

1.5

2.0

2.5

※ Notes :

1. VGS = 10 V

2. ID = 17 A

RDS(ON) , (Normalized)

Drain-Source On-Resistance

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 200

0.8

0.9

1.0

1.1

1.2

※ Notes :

1 . VGS = 0 V

2 . ID = 250 μ

BV DSS , (N ormaliz e d )

Drain-Source Breakdow n Voltage

TJ, Junction Tem perature [oC]

Typical Characteristics (Continued)

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

Figu re 7. Breakdown Voltage Variati on

vs. Temperature Figure 8. On-Resistance Variation

vs. Temperature

Figure 11. Transient Thermal Respons e Cur ve

PDM

FQB34N20L / FQI34N20L

Rev. A, June 2000

Charge

VGS

5V Qg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

Charge

VGS

5V Qg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

VGS

VDS

10%

90%

td(on) tr

ton toff

td(off) tf

VDD

VDS RL

DUT

VGS

VDS

10%

90%

td(on) tr

ton toff

td(off) tf

VDD

VDS RL

DUT

VGS

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

t p

EAS =LI

AS2

----

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

t p

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

FQB34N20L / FQI34N20L

Rev. A, June 2000

Peak Diode Recover y dv /d t Test Circuit & Waveform s

DUT

VDS

Driver

RGSame Type

as DUT

VGS • dv/dt controlled by RG

•I

SD con troll ed by pulse period

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

DUT

VDS

Driver

RGSame Type

as DUT

VGS • dv/dt controlled by RG

•I

SD con troll ed by pulse period

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

FQB34N20L / FQI34N20L

Rev. A, June 2000

Package Dimensions

10.00 ±0.20

(8.00)

(4.40)

1.27 ±0.10 0.80 ±0.10

0.80 ±0.10

(2XR0.45)

9.90 ±0.20 4.50 ±0.20

0.10 ±0.15

2.40 ±0.20

2.54 ±0.30

15.30 ±0.30

9.20 ±0.20

4.90 ±0.20

1.40 ±0.20

2.00 ±0.10

(0.75)

(1.75)

(7.20)

0°~3°

1.20 ±0.20

9.20 ±0.20

15.30 ±0.30

4.90 ±0.20

(0.40)

2.54 TYP 2.54 TYP

1.30 +0.10

–0.05

0.50 +0.10

–0.05

D2PAK

FQB34N20L / FQI34N20L

Rev. A, June 2000

Package Dimensions (Continued)

9.90 ±0.20

2.40 ±0.20

4.50 ±0.20

1.27 ±0.10 1.47 ±0.10

(45°)

0.80 ±0.10

10.00 ±0.20

2.54 TYP2.54 TYP

13.08 ±0.20

9.20 ±0.20

1.20 ±0.20

10.08 ±0.20 MAX13.40

MAX 3.00

(0.40)

(1.46)

(0.94)

1.30 +0.10

–0.05

0.50 +0.10

–0.05

I2PAK

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Formative or

In Design

First Production

Full Production

Not In Production

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

QFET™

QS™

QT Optoelectronics™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

TinyLogic™

UHC™

FASTr™

GlobalOptoisolator™

GTO™

HiSeC™

ISOPLANAR™

MICROWIRE™

OPTOLOGIC™

OPTOPLANAR™

POP™

PowerTrench®

Rev. F1

ACEx™

Bottomless™

CoolFET™

CROSSVOLT™

DOME™

E2CMOSTM

EnSignaTM

FACT™

FACT Quiet Series™

FAST®

VCX™