Voltage Regulators AN8017SA 1.8-volt 2-channel step-up DC-DC converter control IC Overview Unit: mm 5.000.20 16 9 +0.10 0.15 -0.05 (1.0) 0 to 10 0.500.20 8 Features ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 1.4 max. (Overall height) 1 6.400.30 4.400.20 M Di ain sc te on na tin nc ue e/ d The AN8017SA is a two-channel PWM DC-DC converter control IC that features low-voltage operation. This IC can obtain the step-up voltage with a small number of external components. The minimum operating voltage is as low as 1.8 V so that it can operate with two dry batteries. In addition, since it uses the 16-pin surface mounting type package with 0.65 mm pitch, it is suitable for a miniaturized highly efficient potable power supply. 0.65 (0.225) * Wide operating supply voltage range (1.8 V to 14 V) Seating plane 0.22 * Incorporating a high precision reference voltage circuit (allowance: 2%) SSOP016-P-0225A * Control in a wide output frequency range is possible (20 kHz to 1 MHz) Note) The package of this product will be changed * Built-in wideband error amplifier to lead-free type (SSOP016-P-0225E). See the (single gain bandwidth: 10 MHz typical) package dimensions section later of this * A built-in timer latch short-circuit protection circuit datasheet. (charge current: 1.1 A typical) * Incorporating an under-voltage lock-out circuit (U.V.L.O.) (circuit operation-starting voltage: 1.67 V typical) * Dead-time is variable * Flatness of switching current can be obtained by staggering the turn-on timing of each channel * Built-in unlatch function When DT1 pin is low level or DT2 pin is high level, independent turn-off is possible. * Incorporating an on/off control function (active-high control input, standby mode current: 1 A maximum) * Parallel operation is possible * Totem pole output * Output source-current: -50 mA maximum (Constant current output with a less supply voltage fluctuation is possible by connecting an external resistor to pin 6 and pin 11) * Output sink-current: +80 mA maximum Applications Pl +0.10 -0.05 * LCD displays, digital still cameras, and PDAs Publication date: November 2001 SDH00007CEB 1 AN8017SA Off On/off control 4 1.19 V Reference voltage source VREF 5 DT1 OSC 1 VREF Triangular wave oscillation VCC 6 0.9 V M Di ain sc te on na tin nc ue e/ d FB1 15 16 9 VCC VREF Block Diagram 0.2 V IN-1 U.V.L.O. H L Latch R Q S 1.19 V 0.9 V IN+2 13 14 S.C.P. comp. 0.22 V Error amp.2 1.19 V VCC 11 Pin No. Symbol PWM2 0.9 V 2 3 10 S.C.P. IN-1 Out2 0.9 V Description Pin No. Symbol 8 GND Description Pin for connecting a oscillation timing 8 GND Grounding pin resistor and capacitor 9 VCC Power supply voltage application pin Pin for connecting the time constant set- 10 Out2 Out2 block push-pull type output pin ting capacitor for short-circuit protection 11 RB2 Out2 block output source current setting resistor connection pin Inverting input pin to error amplifier 1 block 12 DT2 PWM2 block dead-time setting pin 4 FB1 Output pin of error amplifier 1 block 13 FB2 Output pin of error amplifier 2 block 5 DT1 PWM1 block dead-time setting pin 14 IN+2 Error amplifier 2 block noninverting 6 RB1 Out1 block output source current 7 2 OSC RB2 VREF Pl 1 Out1 VREF Unlatch2 Pin Descriptions 7 ea s ht e v 2 S.C.P. tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s DT2 b em ou12 ic t la on te /e st -in in de for x. ma ht t m ion l . FB2 PWM1 Unlatch1 3 Error amp.1 RB1 Out1 input pin setting resistor connection pin 15 Off Out1 block push-pull type output pin 16 VREF SDH00007CEB On/off control pin Reference voltage output pin AN8017SA Absolute Maximum Ratings Parameter Supply voltage Off terminal allowable application voltage Symbol Rating Unit VCC 15 V VOFF 15 V IN-1 terminal allowable application voltage *2 VIN-1 6 V IN+2 terminal allowable application voltage *2 VIN+2 6 V ICC mA M Di ain sc te on na tin nc ue e/ d Supply current Output source current ISO(OUT) -50 mA Output sink current ISI(OUT) +80 mA PD 135 mW Operating ambient temperature Topr -30 to +85 C Storage temperature Tstg -55 to +150 C Power dissipation *1 ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Note) 1. Do not apply external currents or voltages to any pins not specifically mentioned. For the circuit currents, '+' denotes current flowing into the IC, and '-' denotes current flowing out of the IC. 2. Except for the power dissipation, operating ambient temperature and storage temperature, all ratings are for Ta = 25C. 3. *1: Ta = 85 C. For the independent IC without a heat sink. Note that applications must observe the derating curve for the relationship between the IC power consumption and the ambient temperature. *2: VIN-1 , VIN+2 = VCC when VCC < 6 V. Recommended Operating Range Parameter Supply voltage Symbol Range Unit VCC 1.8 to 14 V VOFF 0 to 14 V ISO(OUT) -40 (minimum) mA ISI(OUT) 70 (maximum) mA RT 1 to 51 k CT 100 to 10 000 pF fOUT 20 to 1 000 kHz CSCP 1 000 (minimum) pF RB 180 to 15 000 Off control terminal application voltage Output source current Output sink current Timing resistance Timing capacitance Oscillation frequency Short-circuit protection time constant setting capacitance Pl Output current setting resistance Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25C Parameter Symbol Conditions Min Typ Max Unit 1.166 1.19 1.214 V Reference voltage block Reference voltage VREF IREF = - 0.1 mA Input regulation with input fluctuation Line VCC = 1.8 V to 14 V 15 30 mV Load regulation Load IREF = - 0.1 mA to -1 mA -20 -5 mV 1.59 1.67 1.75 V U.V.L.O. block Circuit operation start voltage VUON SDH00007CEB 3 AN8017SA Min Typ Max Unit VTH1 1.16 1.19 1.22 V IB1 0.2 0.8 A High-level output voltage 1 VEH1 0.83 0.93 1.03 V Low-level output voltage 1 VEL1 0.2 V M Di ain sc te on na tin nc ue e/ d Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25C (continued) Parameter Symbol Conditions Error amplifier 1 block Input threshold voltage 1 Input bias current 1 Output source current 1 ISO(FB)1 -61 -47 -33 A Output sink current 1 ISI(FB)1 33 47 61 A VTH2 1.16 1.19 1.22 V IB2 0.2 0.8 A VEH2 0.83 0.93 1.03 V VEL2 0.2 V ISO(FB)2 -61 -47 -33 A ISI(FB)2 33 47 61 A VTH(OSC) 0.8 0.9 1.0 V 185 205 225 kHz 73 78 83 % Error amplifier 2 block Input threshold voltage 2 High-level output voltage 2 Low-level output voltage 2 Output source current 2 Output sink current 2 Oscillator block Output off threshold voltage Output 1 block Oscillation frequency 1 ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Input bias current 2 fOUT1 Output duty ratio 1 RT = 12 k, CT = 330 pF Du1 High-level output voltage 1 Low-level output voltage 1 Output source current 1 Output sink current 1 Pull-down resistance 1 VOH1 IO = -10 mA, RB = 820 1.4 V VOL1 IO = 10 mA, RB = 820 0.2 V ISO(OUT)1 VO = 0.7 V, RB = 820 -40 -30 -20 mA ISI(OUT)1 VO = 0.7 V, RB = 820 20 mA 20 30 40 k 185 205 225 kHz 72 77 82 % RO1 Output 2 block Oscillation frequency 2 fOUT2 Output duty ratio 2 RT = 12 k, CT = 330 pF Du2 VOH2 IO = -10 mA, RB = 820 1.4 V VOL2 IO = 10 mA, RB = 820 0.2 V Output source current 2 ISO(OUT)2 VO = 0.7 V, RB = 820 -40 -30 -20 mA Output sink current 2 ISI(OUT)2 VO = 0.7 V, RB = 820 20 mA 20 30 40 k 0.28 0.30 V Pl High-level output voltage 2 Low-level output voltage 2 Pull-down resistance 2 RO2 PWM1 block Output full-off input threshold voltage 1 4 VT0-1 Duty = 0% Output full-on input threshold voltage 1 VT100-1 Duty = 100% 0.65 0.72 V Input current 1 VDT1 = 0.5 V -1.1 - 0.5 A IDT1 SDH00007CEB AN8017SA Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25 C (continued) Parameter Symbol Conditions Min Typ Max Unit 0.65 0.72 V PWM2 block Duty = 0% Output full-off input threshold voltage 2 VT0-2 Output full-on input threshold voltage 2 VT100-2 Duty = 100% 0.28 0.30 V IDT2 VDT2 = 0.2 V -1.1 - 0.5 A Input current 2 M Di ain sc te on na tin nc ue e/ d Unlatch circuit 1 block Input threshold voltage 1 VTHUL1 0.15 0.20 0.25 V VTHUL2 0.8 0.9 1.0 V Input standby voltage VSTBY 60 120 mV Input threshold voltage 1 VTHPC1 0.8 0.9 1.0 V VTHPC2 0.17 0.22 0.27 V VIN 60 120 mV Unlatch circuit 2 block Input threshold voltage 2 Input threshold voltage 2 Input latch voltage Charge current ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Short-circuit protection circuit block ICHG On/off control block Input threshold voltage VSCP = 0 V VON(TH) Whole device -1.43 -1.1 - 0.77 A 0.8 1.0 1.3 V Output off consumption current ICC(OFF) RB = 820 , duty = 0% 7.0 9.8 mA Latch mode consumption current ICC(LA) RB = 820 5.6 7.8 mA Standby current ICC(SB) 1 A * Design reference data Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed. Parameter Symbol Reference voltage block VREF temperature characteristics Over-current protection drive current Reset voltage Pl U.V.L.O. block Conditions Min Typ Max Unit Ta = -30C to +85C -1 +1 % IOC -11 mA VR 0.8 V - 0.3 VREFdT Error amplifier 1/2 blocks VTH temperature characteristics VTHdT Ta = -30C to +85C + 0.3 mV/C Open-loop gain AV 57 dB Single gain bandwidth fBW 10 MHz RB terminal voltage VB 0.36 V Frequency supply voltage characteristics fdV -1 +1 % Frequency temperature characteristics fdT -3 +3 % Output 1/2 blocks SDH00007CEB 5 AN8017SA Electrical Characteristics at VCC = 2.4 V, CREF = 0.1 F, Ta = 25C (continued) * Design reference data (continued) Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed. Parameter Symbol Conditions Min Typ Max Unit VTHL 1.19 V IOFF 23 A Short-circuit protection block Comparator threshold voltage On/off control block M Di ain sc te on na tin nc ue e/ d Off terminal current Terminal Equivalent Circuits Equivalent circuit 1 VCC 0.2 V 1 2 Latch S Q R VCC 1.1 A Latch S Q R Output 1.19 V cut-off 2 k 2 VCC I/O OSC: The terminal used for connecting a timing capacitor/resistor to set oscillation frequency. Use a capacitance value within the range of 100 pF to 10 000 pF and a resistance value within the range of 1 k to 51 k. Use an oscillation frequency in the range of 20 kHz to 1 MHz. In a parallel synchronous operation, the channel 2 output stops when this pin becomes 0.9 V or more. (Refer to the "Application Notes, [7]" section.) O S.C.P.: The terminal for connecting a capacitor to set the time constant of the timer latch short-circuit protection circuit. Use a capacitance value in the range of 1 000 pF or more. The charge current ICHG is 1.1 A typical. O IN-1: The inverting input pin for error amplifier 1 block. I Pl 3 Description ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Pin No. 3 100 1.19 V 6 SDH00007CEB AN8017SA Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit 4 VCC 47 A OSC IN-1 PWM 47 A I/O FB1: The output pin for error amplifier 1 block. The source current is -47 A and the sink current is 47 A. Correct the frequency characteristics of the gain and the phase by connecting a resistor and a capacitor between this terminal and GND. O DT1: The pin for setting channel 1 output maximum duty ratio. If this terminal is set at a voltage of 0.20 V or less, FB1 terminal becomes low-level voltage and the protective function for channel 1 output short-circuit will stop (Unlatch function). I RB1: The pin for connecting a resistor for setting channel 1 output current. Use a resistance value in the range of 180 to 15 k. The terminal voltage is 0.36 V (at RB1 = 820 ). Please refer to the "Usage Notes [2]", if you intend to directly drive a n-channel MOSFET from this pin. I Out1: The pin is push-pull type output terminal. The absolute maximum ratings of output current are -50 mA for the source current and +80 mA for the sink current. A constant current output with less fluctuation with power supply voltage and dispersion can be obtained by the resistor externally attached to RB1 pin. VRB1 ISO(OUT)1 = 68 x [A] RB1 O GND: Grounding terminal VCC: The supply voltage application terminal Use the operating supply voltage in the range of 1.8 V to 14 V. M Di ain sc te on na tin nc ue e/ d 1.19 V Description 4 5 VCC PWM ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . FB1 OSC 0.20 V 5 6 VCC Out1 30 k 120 6 7 VCC RB1 ISO(OUT)1 7 Pl 30 k 8 8 9 9 SDH00007CEB 7 AN8017SA Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit 10 VCC RB2 I/O Out2: The pin is push-pull type output terminal. The absolute maximum ratings of output current are -50 mA for the source current and +80 mA for the sink current. A constant current output with less fluctuation with power supply voltage and dispersion can be obtained by the resistor externally attached to RB2 pin. VRB2 ISO(OUT)2 = 68 x [A] RB2 O RB2: The pin for connecting a resistor for setting channel 2 output current. Use a resistance value in the range of 180 to 15 k. The terminal voltage is 0.36 V (at RB2 = 820 ). Please refer to the "Usage Notes [2]", if you intend to directly drive a n-channel MOSFET from this pin. I DT2: The pin for setting channel 2 output maximum duty ratio. If this terminal is set at a voltage of 0.9 V or more, FB2 terminal becomes high-level voltage and the protective function for channel 2 output short-circuit will stop (Unlatch function). I FB2: The output pin for error amplifier. The source current is -47 A and the sink current is 47 A. Correct the frequency characteristics of the gain and the phase by connecting a resistor and a capacitor between this terminal and GND. O IN+2: The noninverting input pin for error amplifier 2 block. I M Di ain sc te on na tin nc ue e/ d ISO(OUT)2 Description 10 30 k VCC ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 11 Out2 30 k 120 11 12 VCC 0.9 V FB2 OSC 0.9 V 13 VCC 12 47 A OSC 1.19 V 47 A Pl IN+2 14 PWM 13 VCC 14 PWM 100 1.19 V 8 SDH00007CEB AN8017SA Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit 15 Internal circuit start/stop 30 k 15 I/O Off: The terminal for on/off control. High-level input: Normal operation (VOFF > 1.3 V) Low-level input: Standby state (VOFF < 0.8 V) The total current consumption in the standby state can be suppressed to a value of 1 A or less. I M Di ain sc te on na tin nc ue e/ d 60 k Description 16 VCC Usage Notes O ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 16 VREF: The output terminal for the internal reference voltage. The reference voltage is 1.19 V (allowance: 2%) at VCC = 2.4 V and IREF = - 0.1 mA. Connect a capacitor of 0.01 F or more between VREF and GND for phase compensation. [1] The loss, P of this IC increases in proportion to the supply voltage. Use the IC so as not to exceed the allowable power dissipation of package, PD . Reference formula: P = (VCC - VBEQ1) x ISO(OUT)1 x Du1 + (VCC - VBEQ2) x ISO(OUT)2 x Du2 + VCC x ICC < PD VBEQ1 : Base-emitter voltage of npn transistor Q1 ISO(OUT)1 : Out1 terminal output source current (set by RB1, ISO(OUT)1 = 40 mA maximum at RB1 = 820 ) Du1 : Output1 duty ratio VBEQ2 : Base-emitter voltage of npn transistor Q2 ISO(OUT)2 : Out2 terminal output source current (set by RB2, ISO(OUT)2 = 40 mA maximum at RB2 = 820 ) Du2 : Output2 duty ratio ICC : VCC terminal current (8.0 mA maximum where VCC = 2.4 V) [2] Since the output of the AN8017SA is assuming the bipolar transistor driving, it is necessary to pay attention to the following points when an n-channel MOSFET is driven directly. Pl 1. Select an n-channel MOSFET having a low input capacitance The AN8017SA is of the constant current (50 mA maximum) output source current type circuit assuming the bipolar transistor driving. Also, its sink current capability is around 80 mA maximum. For those reason, it is necessary to pay attention to the increase of loss due to the extension of the output rise time and the output fall time. If any problem arises, there is a method to solve it by amplifying with inverters as shown in figure 1. SDH00007CEB VIN SBD VOUT Pins 7,10 Out Figure 1. Output bootstrap circuit example 9 AN8017SA Usage Notes (continued) 2. Select an n-channel MOSFET having a low gate SBD VIN threshold value The high-level output voltage of out pin of the AN8017SA is VCC - 1.0 V minimum, so that it is necessary to select a low VT MOSFET having a sufficiently low on-state resistance in accordance with the using operating supply voltage. If a larger VGS is desired, there is a method to apply the double-voltage of the input to the IC's VCC pin by using the transformer as shown in figure 2. VCC VOUT SBD 9 M Di ain sc te on na tin nc ue e/ d Pins 7,10 Out VCC 2 x VIN - VD Figure 2. Gate drive voltage increasing method [3] In order to realize a low noise and high efficiency, care should be taken in the following points in designing the ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . board layout. 1. The wiring for ground line should be taken as wide as possible and grounded separately from the power system. 2. The input filter capacitor should be arranged in a place as close to VCC and GND pin as possible so as not to allow switching noise to enter into the IC inside. 3. The wiring between the Out terminal and switching device (transistor or MOSFET) should be as short as possible to obtain a clean switching waveform. 4. In wiring the detection resistor of the output voltage, the wiring for the low impedance side should be longer. [4] There is a case in which this IC does not start charging to the S.C.P. capacitor when the output is short-circuited due to the malfunction of U.V.L.O. circuit biased by VCC that has ripples generated by turning on and off of the switching transistor. The allowable range of the VCC ripple is as shown in the following figure. Reduce the VCC ripple by inserting a capacitor near the VCC terminal and GND terminal of this IC so that the VCC ripple is in this allowable range. However, this allowable range is design reference value and not the guaranteed value. VCC ripple allowable range 10 2 Recommended operating range 1 Pl VCC ripple frequency (MHz) 100 0.5 0.1 0 0.3 0.5 1 VCC ripple width (V[p-p]) 10 SDH00007CEB 1.5 AN8017SA Application Notes [1] PD Ta curves of SSOP016-P-0225A PD T a 700 Glass epoxy board (50 x 50 x t0.8 mm3) Rth(j-a) = 171.8C/W 500 M Di ain sc te on na tin nc ue e/ d Power dissipation PD (mW) 600 582 400 Independent IC without a heat sink Rth(j-a) = 295.6C/W 338 300 233 ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 200 135 100 0 0 25 50 75 85 100 125 Ambient temperature Ta (C) [2] Main characteristics VREF temperature characteristics Frequency characteristics 1M 1.195 CT = 100 pF fOUT (Hz) 1.190 100k CT = 0.01 F Pl VREF (V) CT = 330 pF 1.185 -30 -10 10k 10 30 50 70 90 1k 10k 100k RT () Ta (C) SDH00007CEB 11 AN8017SA Application Notes (continued) [2] Main characteristics (continued) ISO(OUT) RB ISI(OUT) RB 70 90 80 60 VCC = 2.4 V VCC = 14 V VCC = 14 V 70 50 ISI(OUT) (mA) 40 VCC = 7 V VCC = 2.4 V 50 VCC = 7 V M Di ain sc te on na tin nc ue e/ d ISO(OUT) (mA) 60 30 VCC = 1.8 V 40 VCC = 1.8 V 30 20 20 10 10 0 100 10k RB () 0 100 100k 1k Du2 VDT2 100 90 90 80 80 70 70 60 Du2 (%) Du1 (%) 100k RB () Du1 VDT1 100 10k ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 1k 50 40 30 60 50 40 30 20 20 10 10 0 0.2 0.4 0.3 0.5 0.6 0.7 0 0.2 0.8 VDT1 (V) 0.3 0.4 0.5 0.6 0.7 0.8 VDT2 (V) ICC(OFF) VCC ICC(OFF) RB 20 9 18 Pl 8 7 16 14 ICC(OFF) (mA) ICC(OFF) (mA) 6 5 4 3 10 8 6 2 4 1 2 0 0 0 2 4 6 8 10 12 14 100 1k RB () VCC (V) 12 12 SDH00007CEB 10k AN8017SA Application Notes (continued) [3] Timing chart VCC terminal voltage waveform 1.6 V M Di ain sc te on na tin nc ue e/ d 1.22 V Output short-circuit S.C.P. terminal voltage waveform FB1 Out1 terminal voltage waveform Pl Channel 2 OSC DT1 ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Channel 1 FB2 OSC DT2 Out2 terminal voltage waveform SDH00007CEB 13 AN8017SA Application Notes (continued) [4] Function descriptions 1. Reference voltage block This block is composed of the band gap circuit, and outputs the temperature compensated 1.19 V reference voltage. The reference voltage is stabilized when the supply voltage is 1.8 V or more. The reference voltage is also used as the reference voltage for the error amplifier 1 block and the error amplifier 2 block. VOSCH 0.75 V M Di ain sc te on na tin nc ue e/ d 2. Triangular wave oscillation block The sawtooth-waveform-like triangular wave having a peak of approximately 0.7 V and a trough of approximately 0.2 V can be generated by connecting the timing capacitor and resistor to the OSC terminal (pin 1). The oscillation frequency can be freely set by the value of CT and RT to be connected externally. The usable oscillation frequency is from 20 kHz to the maximum 1 MHz. The triangular wave is connected with the inverting input of PWM comparator for channel 1 side and the noninverting input of PWM comparator for channel 2 side within the IC inside. And refer to the experimentally determined graph of the frequency characteristics provided in the main characteristics section. VOSCL 0.2 V t2 t1 Discharging T ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Quick charging 3. Error amplifier 1 block The output voltage of DC-DC converter is detected by the npn-transistor-input type error amplifier and the amplified signal is input to the PWM comparator. The internal reference voltage 1.19 V is given to the noninverting input. Also, it is possible to perform the gain setting and the phase compensation arbitrarily by connecting a resistor and a capacitor from the FB1 terminal (pin 4) to GND in series. The output voltage VOUT1 can be set by making connection as shown in figure 2. VOUT1 R1 14 FB1 4 IN-1 3 Error amplifier 1 block R2 1.19 V VOUT1 = 1.19 x To PWM comparator input R1 + R2 R2 Figure 2. Connection method of error ampifier 1 block (Step-up output) VOUT2 R1 Pl 4. Error amplifier 2 block The output voltage of DC-DC converter is detected by the npn-transistor-input type error-amplifier and the amplified signal is input to the PWM comparator. The internal reference voltage 1.19 V is given to the noninverting input. Also, it is possible to perform the gain setting and the phase compensation arbitrarily by connecting a resistor and a capacitor from the FB2 terminal (pin 13) to GND in series. The output voltage VOUT2 can be set by making connection as shown in figure 3. Figure 1. Tiangular wave oscillation waveform R2 FB2 13 IN+2 14 Error amplifier 2 block 1.19 V VOUT2 = 1.19 x To PWM comparator input R1 + R2 R2 Figure 3. Connection method of error ampifier 2 block (Step-up output) SDH00007CEB AN8017SA Application Notes (continued) [4] Function descriptions (continued) M Di ain sc te on na tin nc ue e/ d 5. Timer latch short-circuit protection circuit This circuit protects the external main switching devices, flywheel diodes, and choke coils, etc. from destruction or deterioration if overload or short-circuit condition of power supply output lasts for a certain time. The timer latch short-circuit protection circuit detects the output level of the error amplifier. When the output voltage of DC-DC converter drops and the output level of error amplifier 1 block exceeds 0.9 V or the output level of error amplifier 2 block exceeds 0.22 V, the low-level output is given and the timer circuit is actuated to start the charge of the external protection-enable capacitor. If the output of the error amplifier does not return to a normal voltage range by the time when the voltage of this capacitor reaches 1.22 V, it sets the latch circuit, and cuts off the output drive transistor, and sets the dead-time to 100%. ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 6. Low input voltage malfunction prevention circuit (U.V.L.O.) This circuit protects the system from destruction or deterioration due to control malfunction when the supply voltage is low in the transient state of power on/off. The low input voltage malfunction prevention circuit detects the internal reference voltage which changes according to the supply voltage level. Until the supply voltage reaches 1.67 V during its rise time, it cuts off the output drive transistor, and sets the dead-time to 100%. At the same time, it holds the S.C.P. terminal (pin 2) and DT1 terminal (pin 5) to low-level and the OSC terminal (pin 1) and DT2 terminal (pin 12) to high-level. 7. PWM comparator block The PWM comparator controls the on-period of the output pulse according to the input voltage. The PWM1 and PWM2 block are reverse logic relation. The PWM1 block turns on the output transistor during the period when the triangular wave of OSC terminal (pin 1) is lower than any lower one of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage. The PWM2 block turns on the output transistor during the period when the triangular wave of OSC terminal (pin 1) is higher than any higher one of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage. The maximum duty ratio is variable from the outside. Also, the soft start which gradually extends on-period of the output pulse is activated by connecting a capacitor in parallel with the resistor-dividing for the maximum duty ratio setting. 8. Unlatch block The unlatch circuit 1 block fixes the FB1 terminal (pin 4) at low-level at the DT1 terminal (pin 5) is 0.20 V or less. The unlatch circuit 2 block fixes the FB2 terminal (pin 13) at high-level at the DT2 terminal (pin 12) is 0.9 V or less. Consequently, by controlling the DT terminal voltage, it is possible to operate only one channel or to start and stop each channel in any required sequence. Pl 9. Output 1 block This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB1 terminal, it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage. The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V. 10. Output 2 block This block uses a totem pole type output circuit. By connecting the current setting resistor to the RB2 terminal, it is possible to arbitrarily set a constant-current source-output having a small fluctuation with the supply voltage. The available constant-current source-output is up to 50 mA. The breakdown voltage of output terminal is 15 V. SDH00007CEB 15 AN8017SA Application Notes (continued) M Di ain sc te on na tin nc ue e/ d [5] About logic of PWM block The logic for channel 1 and channel 2 of this IC is reversed. Thereby an input current flatness is realized. At the same time, noise can be suppressed to a lower level by staggering the turn on timing. The PWM1 block turns on the output transistor during the period when the triangular wave of the OSC terminal (pin 1) is lower than both of the FB1 (pin 4) terminal voltage and the DT1 (pin 5) terminal voltage. The PWM2 block turns on the output transistor during the period when the triangular wave of the OSC terminal (pin 1) is higher than both of the FB2 (pin 13) terminal voltage and the DT2 (pin 12) terminal voltage. (Refer to figure 4.) OSC FB1 DT1 and DT2 are omitted. Out1 (totem pole output) Out2 (totem pole output) Channel 1 Switching transistor collector current IC1 Channel 2 Switching transistor collector current IC2 IC1 + IC2 ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . FB2 SBD Pl 10 Out2 VIN + IC2 Out1 7 SBD + IC1 Figure 4. PWM logic explanation chart 16 SDH00007CEB AN8017SA Application Notes (continued) tPE [s] = 1.08 x CSCP ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . M Di ain sc te on na tin nc ue e/ d [6] Time constant setting method for timer latch short-circuit protection circuit The constructional block diagram of protection latch circuit is shown in figure 6. The comparator for short-circuit protection compares the error amplifier 1 output FB1 with the reference voltage of 0.9 V for channel 1 side, and the error amplifier 2 output FB2 with the reference voltage of 0.18 V for channel 2 side at all the time. When the load conditions of DC-DC converter output is stabilized, there is no fluctuation of error amplifier output and the short-circuit protection comparator also keeps the balance. At this moment, the output transistor Q1 is in the conductive state and the S.C.P. terminal is held to approximately 60 mV. When the load conditions for channel 1 side suddenly change and high-level signal (0.9 V or more) is input from the error amplifier 1 block to the short-circuit protection comparator, the short-circuit protection comparator outputs the low-level signal to cut off the output transistor Q1. Also, when the load conditions for channel 2 side suddenly change and low-level signal (0.22 V or less) is inputted from the error amplifier 2 block to the short-circuit protection comparator, the short-circuit protection comparator outputs the low-level signal to cut off the output transistor Q1. The capacitor CSCP connected to the S.C.P. terminal starts charging. When the external capacitor CSCP has been charged to approximately 1.19 V with the constant current of approximately 1.1 A, the latch circuit is set, the output terminal is fixed to low-level, and the dead-time is set to 100%. Once the latch circuit is set, the S.C.P. terminal is discharged to approximately 40 mV. However, the latch circuit is not reset unless the power for the latch circuit is turned off or restarted by the on/off control. tPE VSCP [V] 1.19 V = ICHG x CSCP 1.22 When the power supply is turned on, the output is considered to be short-circuited state so that the S.C.P. terminal voltage starts charging. It is necessary to set the external capacitor so as to start up the DC-DC converter output voltage before setting the latch circuit in the later stage. Especially, pay attention to the delay of the start-up time when applying the soft-start. FB2 IN+2 3 13 14 t [s] Figure 5. S.C.P. terminal charging waveform On/off control Internal reference U.V.L.O. Error amp.1 1.1 A 1.22 V 0.9 V Q Output cut-off High-level detection comp. 1.19 V Error amp.2 1.22 V 0.18 V Latch R S S.C.P. comp. Q1 S.C.P. 2 IN-1 0.06 Pl FB1 4 Short-circuit detection time tPE Figure 6. Short-circuit protection circuit SDH00007CEB 17 AN8017SA Application Notes (continued) [7] Parallel synchronous operation of multiple ICs Multiple instances of this IC can be operated in parallel. If the OSC terminals (pin 1) and Off terminals (pin 15) are connected to each other as shown in figure 7, the ICs will operate at the same frequency. It is possible to operate this IC (the AN8017SA) with the two-channel 1.8-volt DC-DC converter control IC AN8018SA (open-collector output/each single-channel totem pole output) in parallel synchronous mode. 1. Usage notes M Di ain sc te on na tin nc ue e/ d 1) The parallel synchronous operation with the single-channel 1.8-volt DC-DC converter control IC AN8016SH/ AN8016NSH is not possible. 2) The remote on/off with the single IC itself is not possible. Only the simultaneous remote on/off of all ICs is possible. H L CC REF Off terminals connected together Figure 7. Slave operation circuit example 18 SDH00007CEB GND 8 7 Out1 RB1 6 5 DT1 FB1 4 3 IN-1 S.C.P. 2 OSC 1 Pl CC REF 0.1 F OSC terminals connected together Input ea OSC 1 16 V s 16 V ht e v tp 15isOff 15 Off S.C.P. 2 :// it pa fo llo 3 14 na 14 IN-1 IN+2 IN+2 so win ni g FB1 4 13 FB2 13 FB2 c. U co R .jp L aDT1 5 12 12 DT2 DT2 /s bo em RB1u6 11 RB2 11 RB2 ic t la on te 7 10 10 s Out1 /e Out2 Out2 -in t in de for 9 V 9 V GND 8 x. ma ht t m ion l . 0.1 F AN8017SA Application Notes (continued) [7] Parallel synchronous operation of multiple ICs (continued) 16 M Di ain sc te on na tin nc ue e/ d 2. About the operation of short-circuit protection at parallel synchronous operation In the case of the operation in parallel, if the single output (or multiple outputs) of them is short-circuited and the timer latch is applied to the IC which has that output, the output of other ICs will be also shut down. In figure 8, if the timer latch is applied to IC-2, Q1 turns on and the OSC terminal (pin 1) is raised to approximately 1.1 V. Then channel 1 of IC-1 logically turns off, and then for channel 2, the output of comparator whose reference voltage is 0.9 V becomes high-voltage and Out2 is forced to go off. The same goes with the case when the timer latch is applied to IC-1. Channel 2 goes off at high IC-1 0.9 V IC-2 Out1 OSC FB2 DT2 IC-2 latch IC-1 latch 1.19 V Since the OSC terminal voltage becomes higher than the DT1 terminal voltage, the Out1 becomes fully off state. Pl OSC DT1 FB1 When short-circuit protection function is actuated to apply latch, Q1 turns on and, VOSC = VREF - VCE(sat) becomes approximately 1.1 V Q1 IC-2 side output short-circuited S.C.P. ea 1 16 se ht v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 1 Oscillator high-level detection comparator Forced to be in off state inside the IC Out2 1.19 V S.C.P. Figure 8. Operation of short-circuit protection at parallel synchronous operation SDH00007CEB 19 AN8017SA Application Notes (continued) M Di ain sc te on na tin nc ue e/ d [8] Setting of Off-terminal connection resistor The start circuit starts its operation when Q1 is turned on. In an organization in which Q1 turns off/on when Q2 turns on/off in figure 9, the input voltage VIN at which the start circuit operates is obtained by the equation: VIN = VBEQ1 x (ROFF + R1 + R2) / R2 ROFF Therefore, ROFF can be set by: Off 15 ROFF = R2 * VIN / VBEQ1 - R1 - R2 Start circuit Also, in case of limiting the Off terminal current by ROFF , R1 set it by the above equation. However, take the values as: 30 k Q2 Q1 VBEQ1 = 0.7 V (T = 25C) R2 VBEQ1 fluctuation with temperature: -2 mV/C 60 k Temperature coefficient of R1 and R2: +6 000 PPM/C Figure 9. Off terminal peripheral circuit CC Q2 13 FB2 16 VREF 0.1 F ea s ht e v tp is :/DT1 12 DT2 /p 5 it fo a ll o RB1 6na 11 RB2 so win ni g Out1 7 c. U 10 Out2 co R .jp L9 aV GND 8 /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . [9] Sequential operation It is possible to turn on/off the output of DC-DC converter individually by turning on/off Q1 and Q2 as shown in figure 10. However, pay particular attention to the current flowing into the VREF terminal when Q2 is turned off since sink capability of VREF terminal is approximately 100 A. Unlatch2 0.9 V 0.9 V Unlatch1 1.19 V FB1 4 0.2 V V2 Pl Control block Q1 Figure 10 20 SDH00007CEB V1 AN8017SA Application Notes (continued) [9] Sequence operation (continued) V1 V2 M Di ain sc te on na tin nc ue e/ d DT1 Out1 DT2 Out2 Out1 operation ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Out2 operation Out1: Off at DT1 < 0.2 V Out2: Off at DT2 > 0.9 V Operation when each channel is turned on/off independently [10] Error amplifier phase-compensation setting method The equivalent circuit of error amplifier is shown in figure 11. The transfer function is: H= 1 / {S (CE1 + CO1)} 1 = RE1 + 1 / {S (CE1 + CO1)} SCO1 * RE1 + 1 (from CE1 << CO1) The cut-off frequency is variable by changing the externally attached phase compensation capacitor CO1 . Adjust by inserting a resistor RO1 between the FB1 terminal and CO1 in series as shown in figure 12 when it is required to have a gain on the high frequency side or desired to lead a phase. The transfer function is: SCO1 * RO1 + 1 SCO1 (RO1 + RE1) + 1 (from CE1 << CO1) RE1 1 M 57dB IN-1 CE1 5 pF RE1 1 M To PWM 57dB 1.19 V FB1 1.19 V To PWM CE1 5 pF FB1 IN-1 Pl H= CO1 RO1 CO1 Figure 11. Error amplifier equivalent circuit Figure 12. Error amplifier equivalent circuit (RO1 inserted) SDH00007CEB 21 AN8017SA AC Analysis Result * Simulation circuit IN-1 FB1 AC 1.19 V RO1 M Di ain sc te on na tin nc ue e/ d CO1 f Phase f Phase 180 180 RO1 = 10 k 1 k 140 100 Phase ( ) 80 1 k 100 120 1 100 RO1 = 10 k 140 10 120 Phase ( ) ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . 160 160 10 100 80 1 60 60 CO1 = 0.01 F CO1 = 1 000 pF 40 40 20 20 0 0 1 10 100 1k 10k f (Hz) 100k 1M 1 10M 100M 10 100 10k 100k 60 40 CO1 = 1 000 pF 40 RO1 = 10 k RO1 = 10 k 20 Gain (dB) 1 k 0 100 -20 Pl Gain (dB) 20 -40 1 k 0 100 -20 10 10 -40 1 -60 1 10 100 1k 10k 100k 1M 1 -60 -80 10M 100M f (Hz) 22 10M 100M f Gain CO1 = 0.01 F -80 1M f (Hz) f Gain 60 1k 1 10 100 1k 10k f (Hz) SDH00007CEB 100k 1M 10M 100M AN8017SA AC Analysis Result (continued) f Phase f Phase 180 180 RO1 = 0 160 160 RO1 = 10 k 0.001 F 140 120 Phase ( ) 0.1F 100 CO1 = 1 F 80 1 k 120 100 100 10 1 80 M Di ain sc te on na tin nc ue e/ d Phase ( ) 140 0.01 F 60 60 40 40 20 20 CO1 = 0.1 F 0 0 1 10 100 1k 10k 100k 1M 1 10M 100M 10 100 1k 10k 100k 1M ea s ht e v tp is :// it pa fo na llo so win ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . f Gain f Gain 60 60 CO1 = 0.1 F RO1 = 0 40 40 0.001 F -20 RO1 = 10 k 20 Gain (dB) CO1 = 1 F 0 0.01 0.1 F F 1 k 0 100 -20 10 -40 -40 1 -60 -60 -80 1 10 100 1k 10k f (Hz) 100k 1M 10M 100M 1 10 100 1k 10k 100k 1M 10M 100M f (Hz) Pl Gain (dB) 20 -80 10M 100M f (Hz) f (Hz) SDH00007CEB 23 AN8017SA Application Circuit Examples * Application circuit example 1 Input R10 C11 R9 L2 SBD2 C10 Output2 + C8 M Di ain sc te on na tin nc ue e/ d R12 Q2 C7 R8 C9 R13 - 9 VCC 11 RB2 10 Out2 RB2 12 DT2 13 FB2 15 Off 16 VREF 14 IN+2 CTL C6 R1 IN-1 3 ea FB1 4 se ht v tp is DT1 5 :// it pa fo RB1 6 na llo so win Out1 7 ni g c. U GND 8 co R L .jp a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . C1 S.C.P. 2 OSC 1 AN8017SA C2 L1 SBD1 R2 C3 R5 R6 Q1 R3 R4 * Evaluation board VIN R11 R9 Q2 On SW1 Off R10 SBO2 Pl C7 R8 C8 R13 R12 GND C11 L2 C6 L1 C10 Q1 SBO1 C5 C4 24 C2 VO1 R5 C5 R7 - C4 AN8017SA VO2 Output1 + R4 R3 R2 C3 SDH00007CEB R6 R7 C1 R1 AN8017SA Application Circuit Examples (continued) * Application circuit example 2 (Circuit using the AN8017SA/AN8018SA) Input voltage range: 1.8 V to 3.2 V Oscillation frequency: 450 kHz 22 k 68 k 10 H MA2Q738 (MA738*) 0.1 F 0.1 F Input 1.8 V to 3.2 V 5 V (STBY) 300 mA (max.) 9 VCC 12 DT2 11 RB2 10 Out2 820 10 k 13 FB2 14 IN+2 15 Off 16 VREF M Di ain sc te on na tin nc ue e/ d 0.1 F 39 k 2SD0874 (2SD874*) 12 k 10 F AN8018SA 1.19 V OSC 1 ea 16 V s S.C.P. 2 ht 15e vOff tp 14 IN+2 IN+1 3 :// isit pa fo 13 FB2 IN-1 4 na llo w FB1 5 12 DT2 so i ni ng c. U 11 RB2 DT1 6 co R Out1 7 .jp L a 10 Out2 /s bo 9 V GND 8 em u t ic la on te /e st -in in de for x. ma ht t m ion l . -10 V MA2Q738 10 mA (MA738*) (max.) 2SB1440 10 k 5.1 k 300 0.1 F 68 H 10 F 330 pF 68 k 75 k 1.5 k 22 k 47 k 75 k 68 k 1.19 V 0.1 F 22 k 0.1 F 0.1 F MA2Q738 10 H (MA738*) 5V 140 mA (max.) 0.1 F 820 CC REF 10 k 51 k 2SD0602 (2SD602*) 15 k 10 F 10 k 0.1 F 820 56 k 68 k GND 8 Out1 7 RB1 6 DT1 5 IN-1 3 S.C.P. 2 FB1 4 AN8017SA Pl OSC 1 Remote on/off control pin -10 V, 5 V, 18 V stop with high-level input. MA2Q738 18 H (MA738 *) 18 V 35 mA (max.) 56 k 2SD0602 (2SD602*) 10 F 3.9 k 0.1 F Note) *: Former part number SDH00007CEB 25 (0.225) 26 0.65 Seating plane 1 8 0.22+0.10 -0.05 0.20 SDH00007CEB 0.15-0.05 +0.10 4.400.20 6.400.20 16 0.10 ea s ht e v tp is :// it pa fo na llo so win 0.10 1.20 ni g c. U co R .jp L a /s bo em u ic t la on te /e st -in in de for x. ma ht t m ion l . Pl M Di ain sc te on na tin nc ue e/ d AN8017SA New Package Dimensions (Unit: mm) * SSOP016-P-0225E (Lead-free package) 5.000.20 9 (1.00) 0 to 10 0.500.20 Seating plane Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products, and no license is granted under any intellectual property right or other right owned by our company or any other company. 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